drm/amdgpu: add psp block for navy_flounder
Add psp and smu block for navy_flounder with psp firmware load type. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -527,6 +527,11 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &nv_common_ip_block);
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amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);
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amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
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is_support_sw_smu(adev))
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amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
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if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
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