net: qcom/emac: clean up some TX/RX error messages
Some of the error messages that are printed by the interrupt handlers are poorly written. For example, many don't include a device prefix, so there's no indication that they are EMAC errors. Also use rate limiting for all messages that could be printed from interrupt context. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -68,10 +68,10 @@ static void emac_sgmii_link_init(struct emac_adapter *adpt)
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writel(val, phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2);
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writel(val, phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2);
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}
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}
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static int emac_sgmii_irq_clear(struct emac_adapter *adpt, u32 irq_bits)
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static int emac_sgmii_irq_clear(struct emac_adapter *adpt, u8 irq_bits)
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{
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{
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struct emac_sgmii *phy = &adpt->phy;
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struct emac_sgmii *phy = &adpt->phy;
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u32 status;
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u8 status;
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writel_relaxed(irq_bits, phy->base + EMAC_SGMII_PHY_INTERRUPT_CLEAR);
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writel_relaxed(irq_bits, phy->base + EMAC_SGMII_PHY_INTERRUPT_CLEAR);
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writel_relaxed(IRQ_GLOBAL_CLEAR, phy->base + EMAC_SGMII_PHY_IRQ_CMD);
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writel_relaxed(IRQ_GLOBAL_CLEAR, phy->base + EMAC_SGMII_PHY_IRQ_CMD);
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@ -86,9 +86,8 @@ static int emac_sgmii_irq_clear(struct emac_adapter *adpt, u32 irq_bits)
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EMAC_SGMII_PHY_INTERRUPT_STATUS,
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EMAC_SGMII_PHY_INTERRUPT_STATUS,
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status, !(status & irq_bits), 1,
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status, !(status & irq_bits), 1,
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SGMII_PHY_IRQ_CLR_WAIT_TIME)) {
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SGMII_PHY_IRQ_CLR_WAIT_TIME)) {
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netdev_err(adpt->netdev,
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net_err_ratelimited("%s: failed to clear SGMII irq: status:0x%x bits:0x%x\n",
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"error: failed clear SGMII irq: status:0x%x bits:0x%x\n",
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adpt->netdev->name, status, irq_bits);
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status, irq_bits);
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return -EIO;
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return -EIO;
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}
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}
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@ -109,7 +108,7 @@ static irqreturn_t emac_sgmii_interrupt(int irq, void *data)
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{
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{
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struct emac_adapter *adpt = data;
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struct emac_adapter *adpt = data;
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struct emac_sgmii *phy = &adpt->phy;
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struct emac_sgmii *phy = &adpt->phy;
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u32 status;
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u8 status;
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status = readl(phy->base + EMAC_SGMII_PHY_INTERRUPT_STATUS);
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status = readl(phy->base + EMAC_SGMII_PHY_INTERRUPT_STATUS);
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status &= SGMII_ISR_MASK;
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status &= SGMII_ISR_MASK;
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@ -139,10 +138,8 @@ static irqreturn_t emac_sgmii_interrupt(int irq, void *data)
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atomic_set(&phy->decode_error_count, 0);
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atomic_set(&phy->decode_error_count, 0);
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}
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}
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if (emac_sgmii_irq_clear(adpt, status)) {
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if (emac_sgmii_irq_clear(adpt, status))
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netdev_warn(adpt->netdev, "failed to clear SGMII interrupt\n");
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schedule_work(&adpt->work_thread);
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schedule_work(&adpt->work_thread);
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}
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -148,9 +148,8 @@ static irqreturn_t emac_isr(int _irq, void *data)
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goto exit;
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goto exit;
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if (status & ISR_ERROR) {
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if (status & ISR_ERROR) {
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netif_warn(adpt, intr, adpt->netdev,
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net_err_ratelimited("%s: error interrupt 0x%lx\n",
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"warning: error irq status 0x%lx\n",
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adpt->netdev->name, status & ISR_ERROR);
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status & ISR_ERROR);
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/* reset MAC */
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/* reset MAC */
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schedule_work(&adpt->work_thread);
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schedule_work(&adpt->work_thread);
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}
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}
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@ -169,7 +168,8 @@ static irqreturn_t emac_isr(int _irq, void *data)
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emac_mac_tx_process(adpt, &adpt->tx_q);
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emac_mac_tx_process(adpt, &adpt->tx_q);
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if (status & ISR_OVER)
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if (status & ISR_OVER)
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net_warn_ratelimited("warning: TX/RX overflow\n");
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net_warn_ratelimited("%s: TX/RX overflow interrupt\n",
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adpt->netdev->name);
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exit:
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exit:
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/* enable the interrupt */
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/* enable the interrupt */
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