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PCI: designware: Make dw_pcie_rd_own_conf(), etc., static 

The following variables and functions are used only in pcie-designware.c,
so make them static:

  global_io_offset
  dw_pcie_rd_own_conf()
  dw_pcie_wr_own_conf()
  dw_pcie_setup()
  dw_pcie_scan_bus()
  dw_pcie_map_irq()

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
This commit is contained in:
Bjorn Helgaas 2013-10-09 09:12:37 -06:00
parent 18edf4512c
commit 73e408508b
2 changed files with 8 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/pci/host/pcie-designware.c
View File

@ -67,7 +67,7 @@
static struct hw_pci dw_pci; static struct hw_pci dw_pci;
unsigned long global_io_offset; static unsigned long global_io_offset;
static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys) static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
{ {
@ -118,8 +118,8 @@ static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 val, u32 reg)
writel(val, pp->dbi_base + reg); writel(val, pp->dbi_base + reg);
} }
int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
u32 *val) u32 *val)
{ {
int ret; int ret;
@ -131,8 +131,8 @@ int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
return ret; return ret;
} }
int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
u32 val) u32 val)
{ {
int ret; int ret;
@ -667,7 +667,7 @@ static struct pci_ops dw_pcie_ops = {
.write = dw_pcie_wr_conf, .write = dw_pcie_wr_conf,
}; };
int dw_pcie_setup(int nr, struct pci_sys_data *sys) static int dw_pcie_setup(int nr, struct pci_sys_data *sys)
{ {
struct pcie_port *pp; struct pcie_port *pp;
@ -690,7 +690,7 @@ int dw_pcie_setup(int nr, struct pci_sys_data *sys)
return 1; return 1;
} }
struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys) static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{ {
struct pci_bus *bus; struct pci_bus *bus;
struct pcie_port *pp = sys_to_pcie(sys); struct pcie_port *pp = sys_to_pcie(sys);
@ -707,7 +707,7 @@ struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
return bus; return bus;
} }
int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);

7
drivers/pci/host/pcie-designware.h
View File

@ -66,19 +66,12 @@ struct pcie_host_ops {
void (*host_init)(struct pcie_port *pp); void (*host_init)(struct pcie_port *pp);
}; };
extern unsigned long global_io_offset;
int cfg_read(void __iomem *addr, int where, int size, u32 *val); int cfg_read(void __iomem *addr, int where, int size, u32 *val);
int cfg_write(void __iomem *addr, int where, int size, u32 val); int cfg_write(void __iomem *addr, int where, int size, u32 val);
int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, u32 val);
int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, u32 *val);
void dw_handle_msi_irq(struct pcie_port *pp); void dw_handle_msi_irq(struct pcie_port *pp);
void dw_pcie_msi_init(struct pcie_port *pp); void dw_pcie_msi_init(struct pcie_port *pp);
int dw_pcie_link_up(struct pcie_port *pp); int dw_pcie_link_up(struct pcie_port *pp);
void dw_pcie_setup_rc(struct pcie_port *pp); void dw_pcie_setup_rc(struct pcie_port *pp);
int dw_pcie_host_init(struct pcie_port *pp); int dw_pcie_host_init(struct pcie_port *pp);
int dw_pcie_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys);
int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
#endif /* _PCIE_DESIGNWARE_H */ #endif /* _PCIE_DESIGNWARE_H */