net: ipa: tidy up register enum definitions
Update a few enumerated type definitions in "ipa_reg.h" so that the values assigned to each member align on the same column. Where a "TX" or "RX" (or both) comment is present, move that annotation into a separate comment between the member name and its value. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -363,10 +363,10 @@ enum ipa_pulse_gran {
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/** enum ipa_cs_offload_en - ENDP_INIT_CFG register CS_OFFLOAD_EN field value */
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enum ipa_cs_offload_en {
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IPA_CS_OFFLOAD_NONE = 0x0,
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IPA_CS_OFFLOAD_UL = 0x1, /* Before IPA v4.5 (TX) */
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IPA_CS_OFFLOAD_DL = 0x2, /* Before IPA v4.5 (RX) */
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IPA_CS_OFFLOAD_INLINE = 0x1, /* IPA v4.5 (TX and RX) */
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IPA_CS_OFFLOAD_NONE = 0x0,
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IPA_CS_OFFLOAD_UL /* TX */ = 0x1, /* Not IPA v4.5+ */
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IPA_CS_OFFLOAD_DL /* RX */ = 0x2, /* Not IPA v4.5+ */
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IPA_CS_OFFLOAD_INLINE /* TX and RX */ = 0x1, /* IPA v4.5+ */
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};
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/* Valid only for TX (IPA consumer) endpoints */
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@ -376,9 +376,9 @@ enum ipa_cs_offload_en {
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/** enum ipa_nat_en - ENDP_INIT_NAT register NAT_EN field value */
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enum ipa_nat_en {
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IPA_NAT_BYPASS = 0x0,
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IPA_NAT_SRC = 0x1,
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IPA_NAT_DST = 0x2,
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IPA_NAT_BYPASS = 0x0,
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IPA_NAT_SRC = 0x1,
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IPA_NAT_DST = 0x2,
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};
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#define IPA_REG_ENDP_INIT_HDR_N_OFFSET(ep) \
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@ -472,10 +472,10 @@ static inline u32 ipa_metadata_offset_encoded(enum ipa_version version,
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/** enum ipa_mode - ENDP_INIT_MODE register MODE field value */
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enum ipa_mode {
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IPA_BASIC = 0x0,
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IPA_ENABLE_FRAMING_HDLC = 0x1,
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IPA_ENABLE_DEFRAMING_HDLC = 0x2,
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IPA_DMA = 0x3,
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IPA_BASIC = 0x0,
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IPA_ENABLE_FRAMING_HDLC = 0x1,
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IPA_ENABLE_DEFRAMING_HDLC = 0x2,
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IPA_DMA = 0x3,
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};
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#define IPA_REG_ENDP_INIT_AGGR_N_OFFSET(ep) \
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@ -524,20 +524,20 @@ static inline u32 aggr_hard_byte_limit_enable_fmask(bool legacy)
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/** enum ipa_aggr_en - ENDP_INIT_AGGR register AGGR_EN field value */
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enum ipa_aggr_en {
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IPA_BYPASS_AGGR = 0x0, /* (TX, RX) */
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IPA_ENABLE_AGGR = 0x1, /* (RX) */
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IPA_ENABLE_DEAGGR = 0x2, /* (TX) */
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IPA_BYPASS_AGGR /* TX and RX */ = 0x0,
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IPA_ENABLE_AGGR /* RX */ = 0x1,
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IPA_ENABLE_DEAGGR /* TX */ = 0x2,
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};
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/** enum ipa_aggr_type - ENDP_INIT_AGGR register AGGR_TYPE field value */
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enum ipa_aggr_type {
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IPA_MBIM_16 = 0x0,
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IPA_HDLC = 0x1,
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IPA_TLP = 0x2,
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IPA_RNDIS = 0x3,
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IPA_GENERIC = 0x4,
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IPA_COALESCE = 0x5,
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IPA_QCMAP = 0x6,
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IPA_MBIM_16 = 0x0,
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IPA_HDLC = 0x1,
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IPA_TLP = 0x2,
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IPA_RNDIS = 0x3,
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IPA_GENERIC = 0x4,
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IPA_COALESCE = 0x5,
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IPA_QCMAP = 0x6,
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};
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/* Valid only for RX (IPA producer) endpoints */
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