powerpc/perf: Add basic assembly code to read BHRB entries on POWER8
This patch adds the basic assembly code to read BHRB buffer. BHRB entries are valid only after a PMU interrupt has happened (when MMCR0[PMAO]=1) and BHRB has been freezed. BHRB read should not be attempted when it is still enabled (MMCR0[PMAE]=1) and getting updated, as this can produce non-deterministic results. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -2,7 +2,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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obj-$(CONFIG_PERF_EVENTS) += callchain.o
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obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o
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obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
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obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
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power5+-pmu.o power6-pmu.o power7-pmu.o \
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power8-pmu.o
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@ -0,0 +1,44 @@
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/*
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* Basic assembly code to read BHRB entries
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*
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* Copyright 2013 Anshuman Khandual, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/ppc-opcode.h>
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.text
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.balign 8
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/* r3 = n (where n = [0-31])
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* The maximum number of BHRB entries supported with PPC_MFBHRBE instruction
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* is 1024. We have limited number of table entries here as POWER8 implements
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* 32 BHRB entries.
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*/
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/* .global read_bhrb */
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_GLOBAL(read_bhrb)
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cmpldi r3,31
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bgt 1f
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ld r4,bhrb_table@got(r2)
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sldi r3,r3,3
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add r3,r4,r3
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mtctr r3
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bctr
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1: li r3,0
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blr
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#define MFBHRB_TABLE1(n) PPC_MFBHRBE(R3,n); blr
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#define MFBHRB_TABLE2(n) MFBHRB_TABLE1(n); MFBHRB_TABLE1(n+1)
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#define MFBHRB_TABLE4(n) MFBHRB_TABLE2(n); MFBHRB_TABLE2(n+2)
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#define MFBHRB_TABLE8(n) MFBHRB_TABLE4(n); MFBHRB_TABLE4(n+4)
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#define MFBHRB_TABLE16(n) MFBHRB_TABLE8(n); MFBHRB_TABLE8(n+8)
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#define MFBHRB_TABLE32(n) MFBHRB_TABLE16(n); MFBHRB_TABLE16(n+16)
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bhrb_table:
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MFBHRB_TABLE32(0)
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