IOMMU Fixes for Linux 3.7-rc2

Two fixes this time:
 
 	1. Another fix for a broken BIOS to detect when AMD IOMMU
 	   interrupt remapping can not work reliably
 	2. Typo fix for NVidia IOMMU driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQiAx1AAoJECvwRC2XARrjJ4kP/3xcFxrjOAyGPlUXwITlz7iu
 Ae21CqkGiXe5ucSXSkiI7BqnwlCVz1BHmC3oOxj8jtNjwX6Qgjb606S9glmsxbHg
 oG1+vhjgfCfqIgDJSTlcZOra0TX9Rk1iXTehGBv5hLCJT21IDZNfKg4Fn6cALTno
 aWRb41C23NkfwVUyMW8qrkhxVDHM8LsGK8PRRklFDdPZqiHfD+d7azGo+it8iWZl
 Pdd3Vvc2AB8UkUGbBA792+DdOb3gRabliVQ1kwvj1ImA50GvN8t326U6nP6XW0Xq
 duTpRtRYcH2NPg0UcL3p1YA6xRoDtxjNXdjbHb+sGXiP6eTtPl6CaFrrlkvfR4ZK
 ScGg2PDWcXUBK8+QUqXz5Xrs0esk9NG380+mOft0z9VfyLt/SMxLe/PDyXaN/5kS
 q4IKz/tZ7LhtYG+tC2HRbvFSJwxRHodJgk8RTp9YUTvmbtwVyzhuj4XzGh1Jbta8
 +tEMPlJ8JibCVjU9R3OYByTcpudJapRa3y2WZhC7rx0D04xUS+N3ZwAACtJKBQFw
 9lh/j1zTCu404rOoHXl9ysHeW9EszX5e/+XJOWH1EyUZaRRf77dgs+LB3ZTl4l5y
 xRNjEsLzF6/pZX7vrng+0R6pEsZ3XXKlLx2HcTkw9KG1kLNgkwXndhC+j9Kbt68/
 WADoYK0DPL3zbL8FxOec
 =V9QJ
 -----END PGP SIGNATURE-----

Merge tag 'iommu-fixes-v3.7-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU fixes from Joerg Roedel:
 "Two fixes this time:

   1. Another fix for a broken BIOS to detect when AMD IOMMU interrupt
      remapping can not work reliably
   2. Typo fix for NVidia IOMMU driver"

* tag 'iommu-fixes-v3.7-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu/tegra: smmu: Fix deadly typo
  iommu/amd: Work around wrong IOAPIC device-id in IVRS table
This commit is contained in:
Linus Torvalds 2012-10-24 17:05:21 -07:00
commit 735f0a985a
2 changed files with 33 additions and 8 deletions

View File

@ -1599,21 +1599,46 @@ static void __init free_on_init_error(void)
#endif #endif
} }
/* SB IOAPIC is always on this device in AMD systems */
#define IOAPIC_SB_DEVID ((0x00 << 8) | PCI_DEVFN(0x14, 0))
static bool __init check_ioapic_information(void) static bool __init check_ioapic_information(void)
{ {
bool ret, has_sb_ioapic;
int idx; int idx;
for (idx = 0; idx < nr_ioapics; idx++) { has_sb_ioapic = false;
int id = mpc_ioapic_id(idx); ret = false;
if (get_ioapic_devid(id) < 0) { for (idx = 0; idx < nr_ioapics; idx++) {
pr_err(FW_BUG "AMD-Vi: IO-APIC[%d] not in IVRS table\n", id); int devid, id = mpc_ioapic_id(idx);
pr_err("AMD-Vi: Disabling interrupt remapping due to BIOS Bug\n");
return false; devid = get_ioapic_devid(id);
if (devid < 0) {
pr_err(FW_BUG "AMD-Vi: IOAPIC[%d] not in IVRS table\n", id);
ret = false;
} else if (devid == IOAPIC_SB_DEVID) {
has_sb_ioapic = true;
ret = true;
} }
} }
return true; if (!has_sb_ioapic) {
/*
* We expect the SB IOAPIC to be listed in the IVRS
* table. The system timer is connected to the SB IOAPIC
* and if we don't have it in the list the system will
* panic at boot time. This situation usually happens
* when the BIOS is buggy and provides us the wrong
* device id for the IOAPIC in the system.
*/
pr_err(FW_BUG "AMD-Vi: No southbridge IOAPIC found in IVRS table\n");
}
if (!ret)
pr_err("AMD-Vi: Disabling interrupt remapping due to BIOS Bug(s)\n");
return ret;
} }
static void __init free_dma_resources(void) static void __init free_dma_resources(void)

View File

@ -200,7 +200,7 @@ enum {
#define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12) #define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12)
#define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22) #define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22)
#define SMMU_PDN_TO_ADDR(addr) ((pdn) << 22) #define SMMU_PDN_TO_ADDR(pdn) ((pdn) << 22)
#define _READABLE (1 << SMMU_PTB_DATA_ASID_READABLE_SHIFT) #define _READABLE (1 << SMMU_PTB_DATA_ASID_READABLE_SHIFT)
#define _WRITABLE (1 << SMMU_PTB_DATA_ASID_WRITABLE_SHIFT) #define _WRITABLE (1 << SMMU_PTB_DATA_ASID_WRITABLE_SHIFT)