Merge branch 'mlx4'
Or Gerlitz says: ==================== mlx4 SRIOV fixes This series contains few SRIOV related fixes from Matan, please apply to net. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
7319a1a497
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@ -1680,7 +1680,7 @@ static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
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goto unlock;
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update_params.smac_index = new_smac_index;
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if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC,
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if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
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&update_params)) {
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release_mac = new_smac;
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goto unlock;
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@ -2389,6 +2389,22 @@ struct mlx4_slaves_pport mlx4_phys_to_slaves_pport_actv(
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}
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EXPORT_SYMBOL_GPL(mlx4_phys_to_slaves_pport_actv);
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static int mlx4_slaves_closest_port(struct mlx4_dev *dev, int slave, int port)
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{
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struct mlx4_active_ports actv_ports = mlx4_get_active_ports(dev, slave);
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int min_port = find_first_bit(actv_ports.ports, dev->caps.num_ports)
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+ 1;
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int max_port = min_port +
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bitmap_weight(actv_ports.ports, dev->caps.num_ports);
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if (port < min_port)
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port = min_port;
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else if (port >= max_port)
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port = max_port - 1;
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return port;
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}
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int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u64 mac)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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@ -2402,6 +2418,7 @@ int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u64 mac)
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if (slave < 0)
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return -EINVAL;
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port = mlx4_slaves_closest_port(dev, slave, port);
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s_info = &priv->mfunc.master.vf_admin[slave].vport[port];
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s_info->mac = mac;
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mlx4_info(dev, "default mac on vf %d port %d to %llX will take afect only after vf restart\n",
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@ -2428,6 +2445,7 @@ int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos)
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if (slave < 0)
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return -EINVAL;
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port = mlx4_slaves_closest_port(dev, slave, port);
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vf_admin = &priv->mfunc.master.vf_admin[slave].vport[port];
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if ((0 == vlan) && (0 == qos))
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@ -2455,6 +2473,7 @@ bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave,
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struct mlx4_priv *priv;
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priv = mlx4_priv(dev);
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port = mlx4_slaves_closest_port(dev, slave, port);
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vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
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if (MLX4_VGT != vp_oper->state.default_vlan) {
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@ -2482,6 +2501,7 @@ int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting)
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if (slave < 0)
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return -EINVAL;
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port = mlx4_slaves_closest_port(dev, slave, port);
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s_info = &priv->mfunc.master.vf_admin[slave].vport[port];
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s_info->spoofchk = setting;
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@ -2535,6 +2555,7 @@ int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_stat
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if (slave < 0)
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return -EINVAL;
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port = mlx4_slaves_closest_port(dev, slave, port);
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switch (link_state) {
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case IFLA_VF_LINK_STATE_AUTO:
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/* get current link state */
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@ -390,13 +390,14 @@ err_icm:
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EXPORT_SYMBOL_GPL(mlx4_qp_alloc);
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#define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC
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int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
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int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
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enum mlx4_update_qp_attr attr,
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struct mlx4_update_qp_params *params)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_update_qp_context *cmd;
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u64 pri_addr_path_mask = 0;
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u64 qp_mask = 0;
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int err = 0;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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@ -413,9 +414,16 @@ int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
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cmd->qp_context.pri_path.grh_mylmc = params->smac_index;
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}
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cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
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if (attr & MLX4_UPDATE_QP_VSD) {
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qp_mask |= 1ULL << MLX4_UPD_QP_MASK_VSD;
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if (params->flags & MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE)
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cmd->qp_context.param3 |= cpu_to_be32(MLX4_STRIP_VLAN);
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}
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err = mlx4_cmd(dev, mailbox->dma, qp->qpn & 0xffffff, 0,
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cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
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cmd->qp_mask = cpu_to_be64(qp_mask);
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err = mlx4_cmd(dev, mailbox->dma, qpn & 0xffffff, 0,
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MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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@ -702,11 +702,13 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
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struct mlx4_qp_context *qpc = inbox->buf + 8;
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struct mlx4_vport_oper_state *vp_oper;
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struct mlx4_priv *priv;
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u32 qp_type;
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int port;
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port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1;
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priv = mlx4_priv(dev);
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vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
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qp_type = (be32_to_cpu(qpc->flags) >> 16) & 0xff;
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if (MLX4_VGT != vp_oper->state.default_vlan) {
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/* the reserved QPs (special, proxy, tunnel)
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@ -715,8 +717,20 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
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if (mlx4_is_qp_reserved(dev, qpn))
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return 0;
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/* force strip vlan by clear vsd */
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qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN);
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/* force strip vlan by clear vsd, MLX QP refers to Raw Ethernet */
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if (qp_type == MLX4_QP_ST_UD ||
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(qp_type == MLX4_QP_ST_MLX && mlx4_is_eth(dev, port))) {
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if (dev->caps.bmme_flags & MLX4_BMME_FLAG_VSD_INIT2RTR) {
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*(__be32 *)inbox->buf =
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cpu_to_be32(be32_to_cpu(*(__be32 *)inbox->buf) |
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MLX4_QP_OPTPAR_VLAN_STRIPPING);
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qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN);
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} else {
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struct mlx4_update_qp_params params = {.flags = 0};
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mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, ¶ms);
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}
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}
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if (vp_oper->state.link_state == IFLA_VF_LINK_STATE_DISABLE &&
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dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) {
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@ -3998,13 +4012,17 @@ int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave,
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}
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port = (rqp->sched_queue >> 6 & 1) + 1;
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smac_index = cmd->qp_context.pri_path.grh_mylmc;
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err = mac_find_smac_ix_in_slave(dev, slave, port,
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smac_index, &mac);
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if (err) {
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mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n",
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qpn, smac_index);
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goto err_mac;
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if (pri_addr_path_mask & (1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX)) {
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smac_index = cmd->qp_context.pri_path.grh_mylmc;
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err = mac_find_smac_ix_in_slave(dev, slave, port,
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smac_index, &mac);
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if (err) {
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mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n",
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qpn, smac_index);
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goto err_mac;
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}
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}
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err = mlx4_cmd(dev, inbox->dma,
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@ -4818,7 +4836,7 @@ void mlx4_vf_immed_vlan_work_handler(struct work_struct *_work)
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MLX4_VLAN_CTRL_ETH_RX_BLOCK_UNTAGGED;
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upd_context = mailbox->buf;
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upd_context->qp_mask = cpu_to_be64(MLX4_UPD_QP_MASK_VSD);
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upd_context->qp_mask = cpu_to_be64(1ULL << MLX4_UPD_QP_MASK_VSD);
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spin_lock_irq(mlx4_tlock(dev));
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list_for_each_entry_safe(qp, tmp, qp_list, com.list) {
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@ -209,6 +209,7 @@ enum {
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MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9,
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MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10,
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MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11,
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MLX4_BMME_FLAG_VSD_INIT2RTR = 1 << 28,
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};
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enum mlx4_event {
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@ -56,7 +56,8 @@ enum mlx4_qp_optpar {
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MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13,
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MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14,
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MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16,
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MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20
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MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20,
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MLX4_QP_OPTPAR_VLAN_STRIPPING = 1 << 21,
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};
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enum mlx4_qp_state {
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@ -423,13 +424,20 @@ struct mlx4_wqe_inline_seg {
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enum mlx4_update_qp_attr {
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MLX4_UPDATE_QP_SMAC = 1 << 0,
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MLX4_UPDATE_QP_VSD = 1 << 2,
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MLX4_UPDATE_QP_SUPPORTED_ATTRS = (1 << 2) - 1
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};
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enum mlx4_update_qp_params_flags {
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MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE = 1 << 0,
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};
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struct mlx4_update_qp_params {
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u8 smac_index;
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u32 flags;
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};
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int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
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int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
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enum mlx4_update_qp_attr attr,
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struct mlx4_update_qp_params *params);
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int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
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