drm/amd/powerplay: implement dpm enable functions of uvd & vce for smu
add function of dpm enable uvd & vce for extern module use. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2347,7 +2347,13 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
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void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
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{
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if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
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int ret = 0;
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if (is_support_sw_smu(adev)) {
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ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_UVD, enable);
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if (ret)
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DRM_ERROR("[SW SMU]: dpm enable uvd failed, state = %s, ret = %d. \n",
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enable ? "true" : "false", ret);
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} else if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
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/* enable/disable UVD */
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mutex_lock(&adev->pm.mutex);
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amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable);
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@ -2368,7 +2374,13 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
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void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
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{
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if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
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int ret = 0;
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if (is_support_sw_smu(adev)) {
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ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_VCE, enable);
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if (ret)
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DRM_ERROR("[SW SMU]: dpm enable vce failed, state = %s, ret = %d. \n",
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enable ? "true" : "false", ret);
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} else if (adev->powerplay.pp_funcs->set_powergating_by_smu) {
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/* enable/disable VCE */
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mutex_lock(&adev->pm.mutex);
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amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable);
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@ -29,6 +29,25 @@
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#include "smu_v11_0.h"
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#include "atom.h"
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int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
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bool gate)
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{
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int ret = 0;
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switch (block_type) {
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case AMD_IP_BLOCK_TYPE_UVD:
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ret = smu_dpm_set_uvd_enable(smu, gate);
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break;
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case AMD_IP_BLOCK_TYPE_VCE:
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ret = smu_dpm_set_vce_enable(smu, gate);
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break;
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default:
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break;
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}
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return ret;
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}
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enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu)
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{
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/* not support power state */
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@ -698,5 +698,5 @@ extern int smu_display_configuration_change(struct smu_context *smu, const
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*display_config);
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extern int smu_get_current_clocks(struct smu_context *smu,
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struct amd_pp_clock_info *clocks);
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extern int smu_dpm_set_power_gate(struct smu_context *smu,uint32_t block_type, bool gate);
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#endif
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