drm/amdgpu: add new trace event for page table update
This patch adds a new trace event to track the PTE update events. This specific event will provide information like: - start and end of virtual memory mapping - HW engine flags for the map - physical address for mapping This will be particularly useful for memory profiling tools (like RMV) which are monitoring the page table update events. V2: Added physical address lookup logic in trace point V3: switch to use __dynamic_array added nptes int the TPprint arguments list added page size in the arg list V4: Addressed Christian's review comments add start/end instead of seg use incr instead of page_sz to be accurate V5: Addressed Christian's review comments: add pid and vm context information in the event V6: Re-sequence the variables (put pid and ctx_id first) Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -321,6 +321,49 @@ DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs,
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TP_ARGS(mapping)
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);
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TRACE_EVENT(amdgpu_vm_update_ptes,
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TP_PROTO(struct amdgpu_vm_update_params *p,
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uint64_t start, uint64_t end,
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unsigned int nptes, uint64_t dst,
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uint64_t incr, uint64_t flags,
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pid_t pid, uint64_t vm_ctx),
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TP_ARGS(p, start, end, nptes, dst, incr, flags, pid, vm_ctx),
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TP_STRUCT__entry(
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__field(u64, start)
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__field(u64, end)
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__field(u64, flags)
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__field(unsigned int, nptes)
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__field(u64, incr)
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__field(pid_t, pid)
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__field(u64, vm_ctx)
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__dynamic_array(u64, dst, nptes)
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),
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TP_fast_assign(
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unsigned int i;
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__entry->start = start;
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__entry->end = end;
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__entry->flags = flags;
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__entry->incr = incr;
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__entry->nptes = nptes;
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__entry->pid = pid;
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__entry->vm_ctx = vm_ctx;
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for (i = 0; i < nptes; ++i) {
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u64 addr = p->pages_addr ? amdgpu_vm_map_gart(
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p->pages_addr, dst) : dst;
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((u64 *)__get_dynamic_array(dst))[i] = addr;
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dst += incr;
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}
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),
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TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx,"
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" flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid,
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__entry->vm_ctx, __entry->start, __entry->end,
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__entry->flags, __entry->incr, __print_array(
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__get_dynamic_array(dst), __entry->nptes, 8))
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);
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TRACE_EVENT(amdgpu_vm_set_ptes,
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TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
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uint32_t incr, uint64_t flags, bool direct),
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@ -1513,19 +1513,26 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
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entry_end = min(entry_end, end);
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do {
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struct amdgpu_vm *vm = params->vm;
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uint64_t upd_end = min(entry_end, frag_end);
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unsigned nptes = (upd_end - frag_start) >> shift;
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uint64_t upd_flags = flags | AMDGPU_PTE_FRAG(frag);
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/* This can happen when we set higher level PDs to
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* silent to stop fault floods.
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*/
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nptes = max(nptes, 1u);
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trace_amdgpu_vm_update_ptes(params, frag_start, upd_end,
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nptes, dst, incr, upd_flags,
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vm->task_info.pid,
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vm->immediate.fence_context);
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amdgpu_vm_update_flags(params, pt, cursor.level,
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pe_start, dst, nptes, incr,
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flags | AMDGPU_PTE_FRAG(frag));
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upd_flags);
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pe_start += nptes * 8;
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dst += (uint64_t)nptes * AMDGPU_GPU_PAGE_SIZE << shift;
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dst += nptes * incr;
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frag_start = upd_end;
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if (frag_start >= frag_end) {
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