drm/i915: disable DIP while changing the port
The register specification says we need to do this. V2: Only write the register if the port is enabled. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -317,6 +317,7 @@ static void g4x_set_infoframes(struct drm_encoder *encoder,
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
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u32 reg = VIDEO_DIP_CTL;
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u32 val = I915_READ(reg);
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u32 port;
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/* If the registers were not initialized yet, they might be zeroes,
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* which means we're selecting the AVI DIP and we're setting its
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@ -337,18 +338,26 @@ static void g4x_set_infoframes(struct drm_encoder *encoder,
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return;
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}
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val &= ~VIDEO_DIP_PORT_MASK;
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switch (intel_hdmi->sdvox_reg) {
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case SDVOB:
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val |= VIDEO_DIP_PORT_B;
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port = VIDEO_DIP_PORT_B;
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break;
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case SDVOC:
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val |= VIDEO_DIP_PORT_C;
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port = VIDEO_DIP_PORT_C;
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break;
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default:
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return;
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}
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if (port != (val & VIDEO_DIP_PORT_MASK)) {
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if (val & VIDEO_DIP_ENABLE) {
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val &= ~VIDEO_DIP_ENABLE;
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I915_WRITE(reg, val);
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}
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val &= ~VIDEO_DIP_PORT_MASK;
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val |= port;
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}
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val |= VIDEO_DIP_ENABLE;
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val &= ~VIDEO_DIP_ENABLE_VENDOR;
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@ -366,6 +375,7 @@ static void ibx_set_infoframes(struct drm_encoder *encoder,
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
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u32 reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
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u32 val = I915_READ(reg);
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u32 port;
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/* See the big comment in g4x_set_infoframes() */
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val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC;
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@ -378,21 +388,29 @@ static void ibx_set_infoframes(struct drm_encoder *encoder,
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return;
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}
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val &= ~VIDEO_DIP_PORT_MASK;
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switch (intel_hdmi->sdvox_reg) {
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case HDMIB:
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val |= VIDEO_DIP_PORT_B;
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port = VIDEO_DIP_PORT_B;
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break;
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case HDMIC:
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val |= VIDEO_DIP_PORT_C;
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port = VIDEO_DIP_PORT_C;
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break;
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case HDMID:
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val |= VIDEO_DIP_PORT_D;
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port = VIDEO_DIP_PORT_D;
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break;
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default:
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return;
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}
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if (port != (val & VIDEO_DIP_PORT_MASK)) {
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if (val & VIDEO_DIP_ENABLE) {
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val &= ~VIDEO_DIP_ENABLE;
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I915_WRITE(reg, val);
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}
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val &= ~VIDEO_DIP_PORT_MASK;
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val |= port;
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}
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val |= VIDEO_DIP_ENABLE;
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val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT |
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VIDEO_DIP_ENABLE_GCP);
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