Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
ath.git patches for v5.17. Major changes: ath10k * fetch (pre-)calibration data via nvmem subsystem ath11k * enable 802.11 power save mode in station mode for qca6390 and wcn6855 * trace log support * proper board file detection for WCN6855 based on PCI ids * BSS color change support
This commit is contained in:
commit
728e26c3ac
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@ -153,6 +153,10 @@ static void ar5523_cmd_rx_cb(struct urb *urb)
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ar5523_err(ar, "Invalid reply to WDCMSG_TARGET_START");
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return;
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}
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if (!cmd->odata) {
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ar5523_err(ar, "Unexpected WDCMSG_TARGET_START reply");
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return;
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}
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memcpy(cmd->odata, hdr + 1, sizeof(u32));
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cmd->olen = sizeof(u32);
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cmd->res = 0;
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@ -12,6 +12,7 @@
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#include <linux/dmi.h>
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#include <linux/ctype.h>
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#include <linux/pm_qos.h>
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#include <linux/nvmem-consumer.h>
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#include <asm/byteorder.h>
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#include "core.h"
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@ -935,7 +936,8 @@ static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
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}
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if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
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ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
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ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
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ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
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bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
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else
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bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
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@ -1726,7 +1728,8 @@ static int ath10k_download_and_run_otp(struct ath10k *ar)
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/* As of now pre-cal is valid for 10_4 variants */
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if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
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ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
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ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
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ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
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bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
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ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
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@ -1853,6 +1856,39 @@ out_free:
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return ret;
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}
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static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
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{
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struct nvmem_cell *cell;
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void *buf;
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size_t len;
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int ret;
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cell = devm_nvmem_cell_get(ar->dev, cell_name);
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if (IS_ERR(cell)) {
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ret = PTR_ERR(cell);
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return ret;
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}
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buf = nvmem_cell_read(cell, &len);
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if (IS_ERR(buf))
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return PTR_ERR(buf);
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if (ar->hw_params.cal_data_len != len) {
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kfree(buf);
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ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
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cell_name, len, ar->hw_params.cal_data_len);
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return -EMSGSIZE;
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}
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ret = ath10k_download_board_data(ar, buf, len);
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kfree(buf);
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if (ret)
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ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
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cell_name, ret);
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return ret;
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}
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int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
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struct ath10k_fw_file *fw_file)
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{
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@ -2087,6 +2123,18 @@ static int ath10k_core_pre_cal_download(struct ath10k *ar)
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{
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int ret;
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ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
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if (ret == 0) {
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ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
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goto success;
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} else if (ret == -EPROBE_DEFER) {
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return ret;
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}
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
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ret);
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ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
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if (ret == 0) {
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ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
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@ -2153,6 +2201,18 @@ static int ath10k_download_cal_data(struct ath10k *ar)
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"pre cal download procedure failed, try cal file: %d\n",
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ret);
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ret = ath10k_download_cal_nvmem(ar, "calibration");
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if (ret == 0) {
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ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
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goto done;
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} else if (ret == -EPROBE_DEFER) {
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return ret;
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}
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot did not find a calibration nvmem-cell, try file next: %d\n",
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ret);
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ret = ath10k_download_cal_file(ar, ar->cal_file);
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if (ret == 0) {
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ar->cal_mode = ATH10K_CAL_MODE_FILE;
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@ -877,8 +877,10 @@ enum ath10k_cal_mode {
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ATH10K_CAL_MODE_FILE,
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ATH10K_CAL_MODE_OTP,
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ATH10K_CAL_MODE_DT,
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ATH10K_CAL_MODE_NVMEM,
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ATH10K_PRE_CAL_MODE_FILE,
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ATH10K_PRE_CAL_MODE_DT,
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ATH10K_PRE_CAL_MODE_NVMEM,
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ATH10K_CAL_MODE_EEPROM,
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};
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@ -898,10 +900,14 @@ static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
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return "otp";
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case ATH10K_CAL_MODE_DT:
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return "dt";
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case ATH10K_CAL_MODE_NVMEM:
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return "nvmem";
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case ATH10K_PRE_CAL_MODE_FILE:
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return "pre-cal-file";
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case ATH10K_PRE_CAL_MODE_DT:
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return "pre-cal-dt";
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case ATH10K_PRE_CAL_MODE_NVMEM:
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return "pre-cal-nvmem";
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case ATH10K_CAL_MODE_EEPROM:
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return "eeprom";
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}
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@ -14,6 +14,7 @@ const struct ce_attr ath11k_host_ce_config_ipq8074[] = {
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.src_nentries = 16,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE1: target->host HTT + HTC control */
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@ -40,6 +41,7 @@ const struct ce_attr ath11k_host_ce_config_ipq8074[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE4: host->target HTT */
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@ -73,11 +75,12 @@ const struct ce_attr ath11k_host_ce_config_ipq8074[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE8: target autonomous hif_memcpy */
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{
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.flags = CE_ATTR_FLAGS,
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.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
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.src_nentries = 0,
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.src_sz_max = 0,
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.dest_nentries = 0,
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@ -89,6 +92,7 @@ const struct ce_attr ath11k_host_ce_config_ipq8074[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE10: target->host HTT */
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@ -142,6 +146,7 @@ const struct ce_attr ath11k_host_ce_config_qca6390[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE4: host->target HTT */
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@ -175,6 +180,7 @@ const struct ce_attr ath11k_host_ce_config_qca6390[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE8: target autonomous hif_memcpy */
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@ -220,6 +226,7 @@ const struct ce_attr ath11k_host_ce_config_qcn9074[] = {
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.src_nentries = 32,
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.src_sz_max = 2048,
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.dest_nentries = 0,
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.send_cb = ath11k_htc_tx_completion_handler,
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},
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/* CE4: host->target HTT */
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@ -489,18 +496,32 @@ err_unlock:
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return skb;
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}
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static void ath11k_ce_send_done_cb(struct ath11k_ce_pipe *pipe)
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static void ath11k_ce_tx_process_cb(struct ath11k_ce_pipe *pipe)
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{
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struct ath11k_base *ab = pipe->ab;
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struct sk_buff *skb;
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struct sk_buff_head list;
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__skb_queue_head_init(&list);
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while (!IS_ERR(skb = ath11k_ce_completed_send_next(pipe))) {
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if (!skb)
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continue;
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dma_unmap_single(ab->dev, ATH11K_SKB_CB(skb)->paddr, skb->len,
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DMA_TO_DEVICE);
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dev_kfree_skb_any(skb);
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if ((!pipe->send_cb) || ab->hw_params.credit_flow) {
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dev_kfree_skb_any(skb);
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continue;
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}
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__skb_queue_tail(&list, skb);
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}
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while ((skb = __skb_dequeue(&list))) {
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ath11k_dbg(ab, ATH11K_DBG_AHB, "tx ce pipe %d len %d\n",
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pipe->pipe_num, skb->len);
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pipe->send_cb(ab, skb);
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}
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}
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@ -636,7 +657,7 @@ static int ath11k_ce_alloc_pipe(struct ath11k_base *ab, int ce_id)
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pipe->attr_flags = attr->flags;
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if (attr->src_nentries) {
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pipe->send_cb = ath11k_ce_send_done_cb;
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pipe->send_cb = attr->send_cb;
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nentries = roundup_pow_of_two(attr->src_nentries);
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desc_sz = ath11k_hal_ce_get_desc_size(HAL_CE_DESC_SRC);
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ring = ath11k_ce_alloc_ring(ab, nentries, desc_sz);
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@ -667,9 +688,10 @@ static int ath11k_ce_alloc_pipe(struct ath11k_base *ab, int ce_id)
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void ath11k_ce_per_engine_service(struct ath11k_base *ab, u16 ce_id)
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{
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struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[ce_id];
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const struct ce_attr *attr = &ab->hw_params.host_ce_config[ce_id];
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if (pipe->send_cb)
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pipe->send_cb(pipe);
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if (attr->src_nentries)
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ath11k_ce_tx_process_cb(pipe);
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if (pipe->recv_cb)
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ath11k_ce_recv_process_cb(pipe);
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@ -678,9 +700,10 @@ void ath11k_ce_per_engine_service(struct ath11k_base *ab, u16 ce_id)
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void ath11k_ce_poll_send_completed(struct ath11k_base *ab, u8 pipe_id)
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{
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struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[pipe_id];
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const struct ce_attr *attr = &ab->hw_params.host_ce_config[pipe_id];
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if ((pipe->attr_flags & CE_ATTR_DIS_INTR) && pipe->send_cb)
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pipe->send_cb(pipe);
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if ((pipe->attr_flags & CE_ATTR_DIS_INTR) && attr->src_nentries)
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ath11k_ce_tx_process_cb(pipe);
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}
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EXPORT_SYMBOL(ath11k_ce_per_engine_service);
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@ -953,6 +976,7 @@ int ath11k_ce_init_pipes(struct ath11k_base *ab)
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void ath11k_ce_free_pipes(struct ath11k_base *ab)
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{
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struct ath11k_ce_pipe *pipe;
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struct ath11k_ce_ring *ce_ring;
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int desc_sz;
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int i;
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@ -964,22 +988,24 @@ void ath11k_ce_free_pipes(struct ath11k_base *ab)
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if (pipe->src_ring) {
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desc_sz = ath11k_hal_ce_get_desc_size(HAL_CE_DESC_SRC);
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ce_ring = pipe->src_ring;
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dma_free_coherent(ab->dev,
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pipe->src_ring->nentries * desc_sz +
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CE_DESC_RING_ALIGN,
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pipe->src_ring->base_addr_owner_space,
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pipe->src_ring->base_addr_ce_space);
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ce_ring->base_addr_owner_space_unaligned,
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ce_ring->base_addr_ce_space_unaligned);
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kfree(pipe->src_ring);
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pipe->src_ring = NULL;
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}
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|
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if (pipe->dest_ring) {
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desc_sz = ath11k_hal_ce_get_desc_size(HAL_CE_DESC_DST);
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ce_ring = pipe->dest_ring;
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dma_free_coherent(ab->dev,
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pipe->dest_ring->nentries * desc_sz +
|
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CE_DESC_RING_ALIGN,
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pipe->dest_ring->base_addr_owner_space,
|
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pipe->dest_ring->base_addr_ce_space);
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ce_ring->base_addr_owner_space_unaligned,
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ce_ring->base_addr_ce_space_unaligned);
|
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kfree(pipe->dest_ring);
|
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pipe->dest_ring = NULL;
|
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}
|
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|
@ -987,11 +1013,12 @@ void ath11k_ce_free_pipes(struct ath11k_base *ab)
|
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if (pipe->status_ring) {
|
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desc_sz =
|
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ath11k_hal_ce_get_desc_size(HAL_CE_DESC_DST_STATUS);
|
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ce_ring = pipe->status_ring;
|
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dma_free_coherent(ab->dev,
|
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pipe->status_ring->nentries * desc_sz +
|
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CE_DESC_RING_ALIGN,
|
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pipe->status_ring->base_addr_owner_space,
|
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pipe->status_ring->base_addr_ce_space);
|
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ce_ring->base_addr_owner_space_unaligned,
|
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ce_ring->base_addr_ce_space_unaligned);
|
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kfree(pipe->status_ring);
|
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pipe->status_ring = NULL;
|
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}
|
||||
|
|
|
@ -101,6 +101,7 @@ struct ce_attr {
|
|||
unsigned int dest_nentries;
|
||||
|
||||
void (*recv_cb)(struct ath11k_base *, struct sk_buff *);
|
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void (*send_cb)(struct ath11k_base *, struct sk_buff *);
|
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};
|
||||
|
||||
#define CE_DESC_RING_ALIGN 8
|
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|
@ -154,7 +155,7 @@ struct ath11k_ce_pipe {
|
|||
unsigned int buf_sz;
|
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unsigned int rx_buf_needed;
|
||||
|
||||
void (*send_cb)(struct ath11k_ce_pipe *);
|
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void (*send_cb)(struct ath11k_base *, struct sk_buff *);
|
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void (*recv_cb)(struct ath11k_base *, struct sk_buff *);
|
||||
|
||||
struct tasklet_struct intr_tq;
|
||||
|
|
|
@ -76,12 +76,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
|
|||
.supports_monitor = true,
|
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.supports_shadow_regs = false,
|
||||
.idle_ps = false,
|
||||
.supports_sta_ps = false,
|
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.cold_boot_calib = true,
|
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.supports_suspend = false,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
|
||||
.fix_l1ss = true,
|
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.credit_flow = false,
|
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.max_tx_ring = DP_TCL_NUM_RING_MAX,
|
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.hal_params = &ath11k_hw_hal_params_ipq8074,
|
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.supports_dynamic_smps_6ghz = false,
|
||||
.alloc_cacheable_memory = true,
|
||||
.wakeup_mhi = false,
|
||||
},
|
||||
{
|
||||
.hw_rev = ATH11K_HW_IPQ6018_HW10,
|
||||
|
@ -125,12 +130,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
|
|||
.supports_monitor = true,
|
||||
.supports_shadow_regs = false,
|
||||
.idle_ps = false,
|
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.supports_sta_ps = false,
|
||||
.cold_boot_calib = true,
|
||||
.supports_suspend = false,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
|
||||
.fix_l1ss = true,
|
||||
.credit_flow = false,
|
||||
.max_tx_ring = DP_TCL_NUM_RING_MAX,
|
||||
.hal_params = &ath11k_hw_hal_params_ipq8074,
|
||||
.supports_dynamic_smps_6ghz = false,
|
||||
.alloc_cacheable_memory = true,
|
||||
.wakeup_mhi = false,
|
||||
},
|
||||
{
|
||||
.name = "qca6390 hw2.0",
|
||||
|
@ -173,12 +183,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
|
|||
.supports_monitor = false,
|
||||
.supports_shadow_regs = true,
|
||||
.idle_ps = true,
|
||||
.supports_sta_ps = true,
|
||||
.cold_boot_calib = false,
|
||||
.supports_suspend = true,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
|
||||
.fix_l1ss = true,
|
||||
.credit_flow = true,
|
||||
.max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
|
||||
.hal_params = &ath11k_hw_hal_params_qca6390,
|
||||
.supports_dynamic_smps_6ghz = false,
|
||||
.alloc_cacheable_memory = false,
|
||||
.wakeup_mhi = true,
|
||||
},
|
||||
{
|
||||
.name = "qcn9074 hw1.0",
|
||||
|
@ -221,12 +236,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
|
|||
.supports_monitor = true,
|
||||
.supports_shadow_regs = false,
|
||||
.idle_ps = false,
|
||||
.supports_sta_ps = false,
|
||||
.cold_boot_calib = false,
|
||||
.supports_suspend = false,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
|
||||
.fix_l1ss = true,
|
||||
.credit_flow = false,
|
||||
.max_tx_ring = DP_TCL_NUM_RING_MAX,
|
||||
.hal_params = &ath11k_hw_hal_params_ipq8074,
|
||||
.supports_dynamic_smps_6ghz = true,
|
||||
.alloc_cacheable_memory = true,
|
||||
.wakeup_mhi = false,
|
||||
},
|
||||
{
|
||||
.name = "wcn6855 hw2.0",
|
||||
|
@ -269,12 +289,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
|
|||
.supports_monitor = false,
|
||||
.supports_shadow_regs = true,
|
||||
.idle_ps = true,
|
||||
.supports_sta_ps = true,
|
||||
.cold_boot_calib = false,
|
||||
.supports_suspend = true,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
|
||||
.fix_l1ss = false,
|
||||
.credit_flow = true,
|
||||
.max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
|
||||
.hal_params = &ath11k_hw_hal_params_qca6390,
|
||||
.supports_dynamic_smps_6ghz = false,
|
||||
.alloc_cacheable_memory = false,
|
||||
.wakeup_mhi = true,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -392,11 +417,26 @@ static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
|
|||
scnprintf(variant, sizeof(variant), ",variant=%s",
|
||||
ab->qmi.target.bdf_ext);
|
||||
|
||||
scnprintf(name, name_len,
|
||||
"bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",
|
||||
ath11k_bus_str(ab->hif.bus),
|
||||
ab->qmi.target.chip_id,
|
||||
ab->qmi.target.board_id, variant);
|
||||
switch (ab->id.bdf_search) {
|
||||
case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
|
||||
scnprintf(name, name_len,
|
||||
"bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
|
||||
ath11k_bus_str(ab->hif.bus),
|
||||
ab->id.vendor, ab->id.device,
|
||||
ab->id.subsystem_vendor,
|
||||
ab->id.subsystem_device,
|
||||
ab->qmi.target.chip_id,
|
||||
ab->qmi.target.board_id,
|
||||
variant);
|
||||
break;
|
||||
default:
|
||||
scnprintf(name, name_len,
|
||||
"bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",
|
||||
ath11k_bus_str(ab->hif.bus),
|
||||
ab->qmi.target.chip_id,
|
||||
ab->qmi.target.board_id, variant);
|
||||
break;
|
||||
}
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot using board name '%s'\n", name);
|
||||
|
||||
|
@ -633,7 +673,7 @@ static int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define BOARD_NAME_SIZE 100
|
||||
#define BOARD_NAME_SIZE 200
|
||||
int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
|
||||
{
|
||||
char boardname[BOARD_NAME_SIZE];
|
||||
|
|
|
@ -47,6 +47,11 @@ enum ath11k_supported_bw {
|
|||
ATH11K_BW_160 = 3,
|
||||
};
|
||||
|
||||
enum ath11k_bdf_search {
|
||||
ATH11K_BDF_SEARCH_DEFAULT,
|
||||
ATH11K_BDF_SEARCH_BUS_AND_BOARD,
|
||||
};
|
||||
|
||||
enum wme_ac {
|
||||
WME_AC_BE,
|
||||
WME_AC_BK,
|
||||
|
@ -240,6 +245,7 @@ struct ath11k_vif {
|
|||
bool is_started;
|
||||
bool is_up;
|
||||
bool spectral_enabled;
|
||||
bool ps;
|
||||
u32 aid;
|
||||
u8 bssid[ETH_ALEN];
|
||||
struct cfg80211_bitrate_mask bitrate_mask;
|
||||
|
@ -249,6 +255,8 @@ struct ath11k_vif {
|
|||
int txpower;
|
||||
bool rsnie_present;
|
||||
bool wpaie_present;
|
||||
bool bcca_zero_sent;
|
||||
bool do_not_send_tmpl;
|
||||
struct ieee80211_chanctx_conf chanctx;
|
||||
};
|
||||
|
||||
|
@ -759,6 +767,14 @@ struct ath11k_base {
|
|||
|
||||
struct completion htc_suspend;
|
||||
|
||||
struct {
|
||||
enum ath11k_bdf_search bdf_search;
|
||||
u32 vendor;
|
||||
u32 device;
|
||||
u32 subsystem_vendor;
|
||||
u32 subsystem_device;
|
||||
} id;
|
||||
|
||||
/* must be last */
|
||||
u8 drv_priv[0] __aligned(sizeof(void *));
|
||||
};
|
||||
|
|
|
@ -87,17 +87,23 @@ static int ath11k_dbring_fill_bufs(struct ath11k *ar,
|
|||
req_entries = min(num_free, ring->bufs_max);
|
||||
num_remain = req_entries;
|
||||
align = ring->buf_align;
|
||||
size = sizeof(*buff) + ring->buf_sz + align - 1;
|
||||
size = ring->buf_sz + align - 1;
|
||||
|
||||
while (num_remain > 0) {
|
||||
buff = kzalloc(size, GFP_ATOMIC);
|
||||
buff = kzalloc(sizeof(*buff), GFP_ATOMIC);
|
||||
if (!buff)
|
||||
break;
|
||||
|
||||
buff->payload = kzalloc(size, GFP_ATOMIC);
|
||||
if (!buff->payload) {
|
||||
kfree(buff);
|
||||
break;
|
||||
}
|
||||
ret = ath11k_dbring_bufs_replenish(ar, ring, buff);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n",
|
||||
num_remain, req_entries);
|
||||
kfree(buff->payload);
|
||||
kfree(buff);
|
||||
break;
|
||||
}
|
||||
|
@ -282,7 +288,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
|
|||
|
||||
srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
|
||||
num_entry = ev->fixed.num_buf_release_entry;
|
||||
size = sizeof(*buff) + ring->buf_sz + ring->buf_align - 1;
|
||||
size = ring->buf_sz + ring->buf_align - 1;
|
||||
num_buff_reaped = 0;
|
||||
|
||||
spin_lock_bh(&srng->lock);
|
||||
|
@ -319,7 +325,8 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
|
|||
ring->handler(ar, &handler_data);
|
||||
}
|
||||
|
||||
memset(buff, 0, size);
|
||||
buff->paddr = 0;
|
||||
memset(buff->payload, 0, size);
|
||||
ath11k_dbring_bufs_replenish(ar, ring, buff);
|
||||
}
|
||||
|
||||
|
@ -346,6 +353,7 @@ void ath11k_dbring_buf_cleanup(struct ath11k *ar, struct ath11k_dbring *ring)
|
|||
idr_remove(&ring->bufs_idr, buf_id);
|
||||
dma_unmap_single(ar->ab->dev, buff->paddr,
|
||||
ring->buf_sz, DMA_FROM_DEVICE);
|
||||
kfree(buff->payload);
|
||||
kfree(buff);
|
||||
}
|
||||
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
struct ath11k_dbring_element {
|
||||
dma_addr_t paddr;
|
||||
u8 payload[0];
|
||||
u8 *payload;
|
||||
};
|
||||
|
||||
struct ath11k_dbring_data {
|
||||
|
|
|
@ -17,7 +17,7 @@ void ath11k_info(struct ath11k_base *ab, const char *fmt, ...)
|
|||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
dev_info(ab->dev, "%pV", &vaf);
|
||||
/* TODO: Trace the log */
|
||||
trace_ath11k_log_info(ab, &vaf);
|
||||
va_end(args);
|
||||
}
|
||||
EXPORT_SYMBOL(ath11k_info);
|
||||
|
@ -32,7 +32,7 @@ void ath11k_err(struct ath11k_base *ab, const char *fmt, ...)
|
|||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
dev_err(ab->dev, "%pV", &vaf);
|
||||
/* TODO: Trace the log */
|
||||
trace_ath11k_log_err(ab, &vaf);
|
||||
va_end(args);
|
||||
}
|
||||
EXPORT_SYMBOL(ath11k_err);
|
||||
|
@ -47,7 +47,7 @@ void ath11k_warn(struct ath11k_base *ab, const char *fmt, ...)
|
|||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
dev_warn_ratelimited(ab->dev, "%pV", &vaf);
|
||||
/* TODO: Trace the log */
|
||||
trace_ath11k_log_warn(ab, &vaf);
|
||||
va_end(args);
|
||||
}
|
||||
EXPORT_SYMBOL(ath11k_warn);
|
||||
|
@ -68,7 +68,7 @@ void __ath11k_dbg(struct ath11k_base *ab, enum ath11k_debug_mask mask,
|
|||
if (ath11k_debug_mask & mask)
|
||||
dev_printk(KERN_DEBUG, ab->dev, "%pV", &vaf);
|
||||
|
||||
/* TODO: trace log */
|
||||
trace_ath11k_log_dbg(ab, mask, &vaf);
|
||||
|
||||
va_end(args);
|
||||
}
|
||||
|
@ -100,6 +100,10 @@ void ath11k_dbg_dump(struct ath11k_base *ab,
|
|||
dev_printk(KERN_DEBUG, ab->dev, "%s\n", linebuf);
|
||||
}
|
||||
}
|
||||
|
||||
/* tracing code doesn't like null strings */
|
||||
trace_ath11k_log_dbg_dump(ab, msg ? msg : "", prefix ? prefix : "",
|
||||
buf, len);
|
||||
}
|
||||
EXPORT_SYMBOL(ath11k_dbg_dump);
|
||||
|
||||
|
|
|
@ -60,7 +60,8 @@ static inline void ath11k_dbg_dump(struct ath11k_base *ab,
|
|||
|
||||
#define ath11k_dbg(ar, dbg_mask, fmt, ...) \
|
||||
do { \
|
||||
if (ath11k_debug_mask & dbg_mask) \
|
||||
if ((ath11k_debug_mask & dbg_mask) || \
|
||||
trace_ath11k_log_dbg_enabled()) \
|
||||
__ath11k_dbg(ar, dbg_mask, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
|
|
|
@ -195,7 +195,7 @@ static int ath11k_debugfs_fw_stats_request(struct ath11k *ar,
|
|||
* received 'update stats' event, we keep a 3 seconds timeout in case,
|
||||
* fw_stats_done is not marked yet
|
||||
*/
|
||||
timeout = jiffies + msecs_to_jiffies(3 * HZ);
|
||||
timeout = jiffies + msecs_to_jiffies(3 * 1000);
|
||||
|
||||
ath11k_debugfs_fw_stats_reset(ar);
|
||||
|
||||
|
|
|
@ -101,8 +101,11 @@ void ath11k_dp_srng_cleanup(struct ath11k_base *ab, struct dp_srng *ring)
|
|||
if (!ring->vaddr_unaligned)
|
||||
return;
|
||||
|
||||
dma_free_coherent(ab->dev, ring->size, ring->vaddr_unaligned,
|
||||
ring->paddr_unaligned);
|
||||
if (ring->cached)
|
||||
kfree(ring->vaddr_unaligned);
|
||||
else
|
||||
dma_free_coherent(ab->dev, ring->size, ring->vaddr_unaligned,
|
||||
ring->paddr_unaligned);
|
||||
|
||||
ring->vaddr_unaligned = NULL;
|
||||
}
|
||||
|
@ -222,6 +225,7 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,
|
|||
int entry_sz = ath11k_hal_srng_get_entrysize(ab, type);
|
||||
int max_entries = ath11k_hal_srng_get_max_entries(ab, type);
|
||||
int ret;
|
||||
bool cached = false;
|
||||
|
||||
if (max_entries < 0 || entry_sz < 0)
|
||||
return -EINVAL;
|
||||
|
@ -230,9 +234,29 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,
|
|||
num_entries = max_entries;
|
||||
|
||||
ring->size = (num_entries * entry_sz) + HAL_RING_BASE_ALIGN - 1;
|
||||
ring->vaddr_unaligned = dma_alloc_coherent(ab->dev, ring->size,
|
||||
&ring->paddr_unaligned,
|
||||
GFP_KERNEL);
|
||||
|
||||
if (ab->hw_params.alloc_cacheable_memory) {
|
||||
/* Allocate the reo dst and tx completion rings from cacheable memory */
|
||||
switch (type) {
|
||||
case HAL_REO_DST:
|
||||
case HAL_WBM2SW_RELEASE:
|
||||
cached = true;
|
||||
break;
|
||||
default:
|
||||
cached = false;
|
||||
}
|
||||
|
||||
if (cached) {
|
||||
ring->vaddr_unaligned = kzalloc(ring->size, GFP_KERNEL);
|
||||
ring->paddr_unaligned = virt_to_phys(ring->vaddr_unaligned);
|
||||
}
|
||||
}
|
||||
|
||||
if (!cached)
|
||||
ring->vaddr_unaligned = dma_alloc_coherent(ab->dev, ring->size,
|
||||
&ring->paddr_unaligned,
|
||||
GFP_KERNEL);
|
||||
|
||||
if (!ring->vaddr_unaligned)
|
||||
return -ENOMEM;
|
||||
|
||||
|
@ -292,6 +316,11 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (cached) {
|
||||
params.flags |= HAL_SRNG_FLAGS_CACHED;
|
||||
ring->cached = 1;
|
||||
}
|
||||
|
||||
ret = ath11k_hal_srng_setup(ab, type, ring_num, mac_id, ¶ms);
|
||||
if (ret < 0) {
|
||||
ath11k_warn(ab, "failed to setup srng: %d ring_id %d\n",
|
||||
|
@ -742,13 +771,12 @@ int ath11k_dp_service_srng(struct ath11k_base *ab,
|
|||
const struct ath11k_hw_hal_params *hal_params;
|
||||
int grp_id = irq_grp->grp_id;
|
||||
int work_done = 0;
|
||||
int i = 0, j;
|
||||
int i, j;
|
||||
int tot_work_done = 0;
|
||||
|
||||
while (ab->hw_params.ring_mask->tx[grp_id] >> i) {
|
||||
if (ab->hw_params.ring_mask->tx[grp_id] & BIT(i))
|
||||
ath11k_dp_tx_completion_handler(ab, i);
|
||||
i++;
|
||||
if (ab->hw_params.ring_mask->tx[grp_id]) {
|
||||
i = __fls(ab->hw_params.ring_mask->tx[grp_id]);
|
||||
ath11k_dp_tx_completion_handler(ab, i);
|
||||
}
|
||||
|
||||
if (ab->hw_params.ring_mask->rx_err[grp_id]) {
|
||||
|
|
|
@ -64,6 +64,7 @@ struct dp_srng {
|
|||
dma_addr_t paddr;
|
||||
int size;
|
||||
u32 ring_id;
|
||||
u8 cached;
|
||||
};
|
||||
|
||||
struct dp_rxdma_ring {
|
||||
|
@ -517,7 +518,8 @@ struct htt_ppdu_stats_cfg_cmd {
|
|||
} __packed;
|
||||
|
||||
#define HTT_PPDU_STATS_CFG_MSG_TYPE GENMASK(7, 0)
|
||||
#define HTT_PPDU_STATS_CFG_PDEV_ID GENMASK(15, 8)
|
||||
#define HTT_PPDU_STATS_CFG_SOC_STATS BIT(8)
|
||||
#define HTT_PPDU_STATS_CFG_PDEV_ID GENMASK(15, 9)
|
||||
#define HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK GENMASK(31, 16)
|
||||
|
||||
enum htt_ppdu_stats_tag_type {
|
||||
|
|
|
@ -20,13 +20,15 @@
|
|||
|
||||
#define ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS (2 * HZ)
|
||||
|
||||
static u8 *ath11k_dp_rx_h_80211_hdr(struct ath11k_base *ab, struct hal_rx_desc *desc)
|
||||
static inline
|
||||
u8 *ath11k_dp_rx_h_80211_hdr(struct ath11k_base *ab, struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_hdr_status(desc);
|
||||
}
|
||||
|
||||
static enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline
|
||||
enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
if (!ab->hw_params.hw_ops->rx_desc_encrypt_valid(desc))
|
||||
return HAL_ENCRYPT_TYPE_OPEN;
|
||||
|
@ -34,32 +36,34 @@ static enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct ath11k_bas
|
|||
return ab->hw_params.hw_ops->rx_desc_get_encrypt_type(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_decap_type(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_decap_type(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_decap_type(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline
|
||||
u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mesh_ctl(desc);
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline
|
||||
bool ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_seq_ctl_vld(desc);
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_mpdu_start_fc_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline bool ath11k_dp_rx_h_mpdu_start_fc_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_fc_valid(desc);
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
static inline bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_hdr *hdr;
|
||||
|
||||
|
@ -67,8 +71,8 @@ static bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,
|
|||
return ieee80211_has_morefrags(hdr->frame_control);
|
||||
}
|
||||
|
||||
static u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
static inline u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_hdr *hdr;
|
||||
|
||||
|
@ -76,37 +80,37 @@ static u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct ath11k_base *ab,
|
|||
return le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
|
||||
}
|
||||
|
||||
static u16 ath11k_dp_rx_h_mpdu_start_seq_no(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u16 ath11k_dp_rx_h_mpdu_start_seq_no(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_start_seq_no(desc);
|
||||
}
|
||||
|
||||
static void *ath11k_dp_rx_get_attention(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline void *ath11k_dp_rx_get_attention(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_attention(desc);
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_attn_msdu_done(struct rx_attention *attn)
|
||||
static inline bool ath11k_dp_rx_h_attn_msdu_done(struct rx_attention *attn)
|
||||
{
|
||||
return !!FIELD_GET(RX_ATTENTION_INFO2_MSDU_DONE,
|
||||
__le32_to_cpu(attn->info2));
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_attn_l4_cksum_fail(struct rx_attention *attn)
|
||||
static inline bool ath11k_dp_rx_h_attn_l4_cksum_fail(struct rx_attention *attn)
|
||||
{
|
||||
return !!FIELD_GET(RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL,
|
||||
__le32_to_cpu(attn->info1));
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_attn_ip_cksum_fail(struct rx_attention *attn)
|
||||
static inline bool ath11k_dp_rx_h_attn_ip_cksum_fail(struct rx_attention *attn)
|
||||
{
|
||||
return !!FIELD_GET(RX_ATTENTION_INFO1_IP_CKSUM_FAIL,
|
||||
__le32_to_cpu(attn->info1));
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_attn_is_decrypted(struct rx_attention *attn)
|
||||
static inline bool ath11k_dp_rx_h_attn_is_decrypted(struct rx_attention *attn)
|
||||
{
|
||||
return (FIELD_GET(RX_ATTENTION_INFO2_DCRYPT_STATUS_CODE,
|
||||
__le32_to_cpu(attn->info2)) ==
|
||||
|
@ -154,68 +158,68 @@ static bool ath11k_dp_rx_h_attn_msdu_len_err(struct ath11k_base *ab,
|
|||
return errmap & DP_RX_MPDU_ERR_MSDU_LEN;
|
||||
}
|
||||
|
||||
static u16 ath11k_dp_rx_h_msdu_start_msdu_len(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u16 ath11k_dp_rx_h_msdu_start_msdu_len(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_len(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_sgi(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_sgi(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_sgi(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_rate_mcs(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_rate_mcs(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_rate_mcs(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_rx_bw(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_rx_bw(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_rx_bw(desc);
|
||||
}
|
||||
|
||||
static u32 ath11k_dp_rx_h_msdu_start_freq(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u32 ath11k_dp_rx_h_msdu_start_freq(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_freq(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_pkt_type(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_pkt_type(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_msdu_pkt_type(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_start_nss(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_start_nss(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return hweight8(ab->hw_params.hw_ops->rx_desc_get_msdu_nss(desc));
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_mpdu_start_tid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_mpdu_start_tid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_tid(desc);
|
||||
}
|
||||
|
||||
static u16 ath11k_dp_rx_h_mpdu_start_peer_id(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u16 ath11k_dp_rx_h_mpdu_start_peer_id(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_peer_id(desc);
|
||||
}
|
||||
|
||||
static u8 ath11k_dp_rx_h_msdu_end_l3pad(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline u8 ath11k_dp_rx_h_msdu_end_l3pad(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_l3_pad_bytes(desc);
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rx_h_msdu_end_first_msdu(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
static inline bool ath11k_dp_rx_h_msdu_end_first_msdu(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_first_msdu(desc);
|
||||
}
|
||||
|
@ -233,14 +237,14 @@ static void ath11k_dp_rx_desc_end_tlv_copy(struct ath11k_base *ab,
|
|||
ab->hw_params.hw_ops->rx_desc_copy_attn_end_tlv(fdesc, ldesc);
|
||||
}
|
||||
|
||||
static u32 ath11k_dp_rxdesc_get_mpdulen_err(struct rx_attention *attn)
|
||||
static inline u32 ath11k_dp_rxdesc_get_mpdulen_err(struct rx_attention *attn)
|
||||
{
|
||||
return FIELD_GET(RX_ATTENTION_INFO1_MPDU_LEN_ERR,
|
||||
__le32_to_cpu(attn->info1));
|
||||
}
|
||||
|
||||
static u8 *ath11k_dp_rxdesc_get_80211hdr(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
static inline u8 *ath11k_dp_rxdesc_get_80211hdr(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
{
|
||||
u8 *rx_pkt_hdr;
|
||||
|
||||
|
@ -249,8 +253,8 @@ static u8 *ath11k_dp_rxdesc_get_80211hdr(struct ath11k_base *ab,
|
|||
return rx_pkt_hdr;
|
||||
}
|
||||
|
||||
static bool ath11k_dp_rxdesc_mpdu_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
static inline bool ath11k_dp_rxdesc_mpdu_valid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
{
|
||||
u32 tlv_tag;
|
||||
|
||||
|
@ -259,15 +263,15 @@ static bool ath11k_dp_rxdesc_mpdu_valid(struct ath11k_base *ab,
|
|||
return tlv_tag == HAL_RX_MPDU_START;
|
||||
}
|
||||
|
||||
static u32 ath11k_dp_rxdesc_get_ppduid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
static inline u32 ath11k_dp_rxdesc_get_ppduid(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *rx_desc)
|
||||
{
|
||||
return ab->hw_params.hw_ops->rx_desc_get_mpdu_ppdu_id(rx_desc);
|
||||
}
|
||||
|
||||
static void ath11k_dp_rxdesc_set_msdu_len(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc,
|
||||
u16 len)
|
||||
static inline void ath11k_dp_rxdesc_set_msdu_len(struct ath11k_base *ab,
|
||||
struct hal_rx_desc *desc,
|
||||
u16 len)
|
||||
{
|
||||
ab->hw_params.hw_ops->rx_desc_set_msdu_len(desc, len);
|
||||
}
|
||||
|
@ -2596,36 +2600,30 @@ free_out:
|
|||
static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,
|
||||
struct napi_struct *napi,
|
||||
struct sk_buff_head *msdu_list,
|
||||
int *quota, int ring_id)
|
||||
int mac_id)
|
||||
{
|
||||
struct ath11k_skb_rxcb *rxcb;
|
||||
struct sk_buff *msdu;
|
||||
struct ath11k *ar;
|
||||
struct ieee80211_rx_status rx_status = {0};
|
||||
u8 mac_id;
|
||||
int ret;
|
||||
|
||||
if (skb_queue_empty(msdu_list))
|
||||
return;
|
||||
|
||||
rcu_read_lock();
|
||||
if (unlikely(!rcu_access_pointer(ab->pdevs_active[mac_id]))) {
|
||||
__skb_queue_purge(msdu_list);
|
||||
return;
|
||||
}
|
||||
|
||||
while (*quota && (msdu = __skb_dequeue(msdu_list))) {
|
||||
rxcb = ATH11K_SKB_RXCB(msdu);
|
||||
mac_id = rxcb->mac_id;
|
||||
ar = ab->pdevs[mac_id].ar;
|
||||
if (!rcu_dereference(ab->pdevs_active[mac_id])) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
continue;
|
||||
}
|
||||
ar = ab->pdevs[mac_id].ar;
|
||||
if (unlikely(test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags))) {
|
||||
__skb_queue_purge(msdu_list);
|
||||
return;
|
||||
}
|
||||
|
||||
while ((msdu = __skb_dequeue(msdu_list))) {
|
||||
ret = ath11k_dp_rx_process_msdu(ar, msdu, msdu_list, &rx_status);
|
||||
if (ret) {
|
||||
if (unlikely(ret)) {
|
||||
ath11k_dbg(ab, ATH11K_DBG_DATA,
|
||||
"Unable to process msdu %d", ret);
|
||||
dev_kfree_skb_any(msdu);
|
||||
|
@ -2633,10 +2631,7 @@ static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,
|
|||
}
|
||||
|
||||
ath11k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_status);
|
||||
(*quota)--;
|
||||
}
|
||||
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
||||
|
@ -2645,19 +2640,21 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
|||
struct ath11k_dp *dp = &ab->dp;
|
||||
struct dp_rxdma_ring *rx_ring;
|
||||
int num_buffs_reaped[MAX_RADIOS] = {0};
|
||||
struct sk_buff_head msdu_list;
|
||||
struct sk_buff_head msdu_list[MAX_RADIOS];
|
||||
struct ath11k_skb_rxcb *rxcb;
|
||||
int total_msdu_reaped = 0;
|
||||
struct hal_srng *srng;
|
||||
struct sk_buff *msdu;
|
||||
int quota = budget;
|
||||
bool done = false;
|
||||
int buf_id, mac_id;
|
||||
struct ath11k *ar;
|
||||
u32 *rx_desc;
|
||||
struct hal_reo_dest_ring *desc;
|
||||
enum hal_reo_dest_ring_push_reason push_reason;
|
||||
u32 cookie;
|
||||
int i;
|
||||
|
||||
__skb_queue_head_init(&msdu_list);
|
||||
for (i = 0; i < MAX_RADIOS; i++)
|
||||
__skb_queue_head_init(&msdu_list[i]);
|
||||
|
||||
srng = &ab->hal.srng_list[dp->reo_dst_ring[ring_id].ring_id];
|
||||
|
||||
|
@ -2666,13 +2663,11 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
|||
ath11k_hal_srng_access_begin(ab, srng);
|
||||
|
||||
try_again:
|
||||
while ((rx_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
|
||||
struct hal_reo_dest_ring desc = *(struct hal_reo_dest_ring *)rx_desc;
|
||||
enum hal_reo_dest_ring_push_reason push_reason;
|
||||
u32 cookie;
|
||||
|
||||
while (likely(desc =
|
||||
(struct hal_reo_dest_ring *)ath11k_hal_srng_dst_get_next_entry(ab,
|
||||
srng))) {
|
||||
cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
|
||||
desc.buf_addr_info.info1);
|
||||
desc->buf_addr_info.info1);
|
||||
buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
|
||||
cookie);
|
||||
mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
|
||||
|
@ -2681,7 +2676,7 @@ try_again:
|
|||
rx_ring = &ar->dp.rx_refill_buf_ring;
|
||||
spin_lock_bh(&rx_ring->idr_lock);
|
||||
msdu = idr_find(&rx_ring->bufs_idr, buf_id);
|
||||
if (!msdu) {
|
||||
if (unlikely(!msdu)) {
|
||||
ath11k_warn(ab, "frame rx with invalid buf_id %d\n",
|
||||
buf_id);
|
||||
spin_unlock_bh(&rx_ring->idr_lock);
|
||||
|
@ -2697,37 +2692,41 @@ try_again:
|
|||
DMA_FROM_DEVICE);
|
||||
|
||||
num_buffs_reaped[mac_id]++;
|
||||
total_msdu_reaped++;
|
||||
|
||||
push_reason = FIELD_GET(HAL_REO_DEST_RING_INFO0_PUSH_REASON,
|
||||
desc.info0);
|
||||
if (push_reason !=
|
||||
HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION) {
|
||||
desc->info0);
|
||||
if (unlikely(push_reason !=
|
||||
HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION)) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
ab->soc_stats.hal_reo_error[dp->reo_dst_ring[ring_id].ring_id]++;
|
||||
continue;
|
||||
}
|
||||
|
||||
rxcb->is_first_msdu = !!(desc.rx_msdu_info.info0 &
|
||||
rxcb->is_first_msdu = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU);
|
||||
rxcb->is_last_msdu = !!(desc.rx_msdu_info.info0 &
|
||||
rxcb->is_last_msdu = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU);
|
||||
rxcb->is_continuation = !!(desc.rx_msdu_info.info0 &
|
||||
rxcb->is_continuation = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_MSDU_CONTINUATION);
|
||||
rxcb->peer_id = FIELD_GET(RX_MPDU_DESC_META_DATA_PEER_ID,
|
||||
desc.rx_mpdu_info.meta_data);
|
||||
desc->rx_mpdu_info.meta_data);
|
||||
rxcb->seq_no = FIELD_GET(RX_MPDU_DESC_INFO0_SEQ_NUM,
|
||||
desc.rx_mpdu_info.info0);
|
||||
desc->rx_mpdu_info.info0);
|
||||
rxcb->tid = FIELD_GET(HAL_REO_DEST_RING_INFO0_RX_QUEUE_NUM,
|
||||
desc.info0);
|
||||
desc->info0);
|
||||
|
||||
rxcb->mac_id = mac_id;
|
||||
__skb_queue_tail(&msdu_list, msdu);
|
||||
__skb_queue_tail(&msdu_list[mac_id], msdu);
|
||||
|
||||
if (total_msdu_reaped >= quota && !rxcb->is_continuation) {
|
||||
if (rxcb->is_continuation) {
|
||||
done = false;
|
||||
} else {
|
||||
total_msdu_reaped++;
|
||||
done = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if (total_msdu_reaped >= budget)
|
||||
break;
|
||||
}
|
||||
|
||||
/* Hw might have updated the head pointer after we cached it.
|
||||
|
@ -2736,7 +2735,7 @@ try_again:
|
|||
* head pointer so that we can reap complete MPDU in the current
|
||||
* rx processing.
|
||||
*/
|
||||
if (!done && ath11k_hal_srng_dst_num_free(ab, srng, true)) {
|
||||
if (unlikely(!done && ath11k_hal_srng_dst_num_free(ab, srng, true))) {
|
||||
ath11k_hal_srng_access_end(ab, srng);
|
||||
goto try_again;
|
||||
}
|
||||
|
@ -2745,25 +2744,23 @@ try_again:
|
|||
|
||||
spin_unlock_bh(&srng->lock);
|
||||
|
||||
if (!total_msdu_reaped)
|
||||
if (unlikely(!total_msdu_reaped))
|
||||
goto exit;
|
||||
|
||||
for (i = 0; i < ab->num_radios; i++) {
|
||||
if (!num_buffs_reaped[i])
|
||||
continue;
|
||||
|
||||
ath11k_dp_rx_process_received_packets(ab, napi, &msdu_list[i], i);
|
||||
|
||||
ar = ab->pdevs[i].ar;
|
||||
rx_ring = &ar->dp.rx_refill_buf_ring;
|
||||
|
||||
ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],
|
||||
ab->hw_params.hal_params->rx_buf_rbm);
|
||||
}
|
||||
|
||||
ath11k_dp_rx_process_received_packets(ab, napi, &msdu_list,
|
||||
"a, ring_id);
|
||||
|
||||
exit:
|
||||
return budget - quota;
|
||||
return total_msdu_reaped;
|
||||
}
|
||||
|
||||
static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,
|
||||
|
@ -4829,7 +4826,7 @@ static struct sk_buff *
|
|||
ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar,
|
||||
u32 mac_id, struct sk_buff *head_msdu,
|
||||
struct sk_buff *last_msdu,
|
||||
struct ieee80211_rx_status *rxs)
|
||||
struct ieee80211_rx_status *rxs, bool *fcs_err)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct sk_buff *msdu, *prev_buf;
|
||||
|
@ -4839,12 +4836,17 @@ ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar,
|
|||
u8 *dest, decap_format;
|
||||
struct ieee80211_hdr_3addr *wh;
|
||||
struct rx_attention *rx_attention;
|
||||
u32 err_bitmap;
|
||||
|
||||
if (!head_msdu)
|
||||
goto err_merge_fail;
|
||||
|
||||
rx_desc = (struct hal_rx_desc *)head_msdu->data;
|
||||
rx_attention = ath11k_dp_rx_get_attention(ab, rx_desc);
|
||||
err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);
|
||||
|
||||
if (err_bitmap & DP_RX_MPDU_ERR_FCS)
|
||||
*fcs_err = true;
|
||||
|
||||
if (ath11k_dp_rxdesc_get_mpdulen_err(rx_attention))
|
||||
return NULL;
|
||||
|
@ -4933,9 +4935,10 @@ static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,
|
|||
struct ath11k_pdev_dp *dp = &ar->dp;
|
||||
struct sk_buff *mon_skb, *skb_next, *header;
|
||||
struct ieee80211_rx_status *rxs = &dp->rx_status;
|
||||
bool fcs_err = false;
|
||||
|
||||
mon_skb = ath11k_dp_rx_mon_merg_msdus(ar, mac_id, head_msdu,
|
||||
tail_msdu, rxs);
|
||||
tail_msdu, rxs, &fcs_err);
|
||||
|
||||
if (!mon_skb)
|
||||
goto mon_deliver_fail;
|
||||
|
@ -4943,6 +4946,10 @@ static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,
|
|||
header = mon_skb;
|
||||
|
||||
rxs->flag = 0;
|
||||
|
||||
if (fcs_err)
|
||||
rxs->flag = RX_FLAG_FAILED_FCS_CRC;
|
||||
|
||||
do {
|
||||
skb_next = mon_skb->next;
|
||||
if (!skb_next)
|
||||
|
|
|
@ -95,11 +95,11 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
|
|||
u8 ring_selector = 0, ring_map = 0;
|
||||
bool tcl_ring_retry;
|
||||
|
||||
if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags))
|
||||
if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)))
|
||||
return -ESHUTDOWN;
|
||||
|
||||
if (!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
|
||||
!ieee80211_is_data(hdr->frame_control))
|
||||
if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
|
||||
!ieee80211_is_data(hdr->frame_control)))
|
||||
return -ENOTSUPP;
|
||||
|
||||
pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
|
||||
|
@ -127,7 +127,7 @@ tcl_ring_sel:
|
|||
DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
|
||||
if (ret < 0) {
|
||||
if (unlikely(ret < 0)) {
|
||||
if (ring_map == (BIT(ab->hw_params.max_tx_ring) - 1)) {
|
||||
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
|
||||
return -ENOSPC;
|
||||
|
@ -152,7 +152,7 @@ tcl_ring_sel:
|
|||
ti.meta_data_flags = arvif->tcl_metadata;
|
||||
}
|
||||
|
||||
if (ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW) {
|
||||
if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) {
|
||||
if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {
|
||||
ti.encrypt_type =
|
||||
ath11k_dp_tx_get_encrypt_type(skb_cb->cipher);
|
||||
|
@ -173,8 +173,8 @@ tcl_ring_sel:
|
|||
ti.bss_ast_idx = arvif->ast_idx;
|
||||
ti.dscp_tid_tbl_idx = 0;
|
||||
|
||||
if (skb->ip_summed == CHECKSUM_PARTIAL &&
|
||||
ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW) {
|
||||
if (likely(skb->ip_summed == CHECKSUM_PARTIAL &&
|
||||
ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) {
|
||||
ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
|
||||
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
|
||||
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
|
||||
|
@ -211,7 +211,7 @@ tcl_ring_sel:
|
|||
}
|
||||
|
||||
ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
|
||||
if (dma_mapping_error(ab->dev, ti.paddr)) {
|
||||
if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) {
|
||||
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
|
||||
ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
|
||||
ret = -ENOMEM;
|
||||
|
@ -231,7 +231,7 @@ tcl_ring_sel:
|
|||
ath11k_hal_srng_access_begin(ab, tcl_ring);
|
||||
|
||||
hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
|
||||
if (!hal_tcl_desc) {
|
||||
if (unlikely(!hal_tcl_desc)) {
|
||||
/* NOTE: It is highly unlikely we'll be running out of tcl_ring
|
||||
* desc because the desc is directly enqueued onto hw queue.
|
||||
*/
|
||||
|
@ -245,7 +245,7 @@ tcl_ring_sel:
|
|||
* checking this ring earlier for each pkt tx.
|
||||
* Restart ring selection if some rings are not checked yet.
|
||||
*/
|
||||
if (ring_map != (BIT(ab->hw_params.max_tx_ring) - 1) &&
|
||||
if (unlikely(ring_map != (BIT(ab->hw_params.max_tx_ring)) - 1) &&
|
||||
ab->hw_params.max_tx_ring > 1) {
|
||||
tcl_ring_retry = true;
|
||||
ring_selector++;
|
||||
|
@ -293,20 +293,18 @@ static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
|
|||
struct sk_buff *msdu;
|
||||
struct ath11k_skb_cb *skb_cb;
|
||||
|
||||
spin_lock_bh(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
|
||||
if (!msdu) {
|
||||
spin_lock(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
|
||||
spin_unlock(&tx_ring->tx_idr_lock);
|
||||
|
||||
if (unlikely(!msdu)) {
|
||||
ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
|
||||
msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
skb_cb = ATH11K_SKB_CB(msdu);
|
||||
|
||||
idr_remove(&tx_ring->txbuf_idr, msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
|
||||
dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
|
||||
dev_kfree_skb_any(msdu);
|
||||
|
||||
|
@ -325,12 +323,13 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
|
|||
struct ath11k_skb_cb *skb_cb;
|
||||
struct ath11k *ar;
|
||||
|
||||
spin_lock_bh(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_find(&tx_ring->txbuf_idr, ts->msdu_id);
|
||||
if (!msdu) {
|
||||
spin_lock(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
|
||||
spin_unlock(&tx_ring->tx_idr_lock);
|
||||
|
||||
if (unlikely(!msdu)) {
|
||||
ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
|
||||
ts->msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -339,9 +338,6 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
|
|||
|
||||
ar = skb_cb->ar;
|
||||
|
||||
idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
|
||||
if (atomic_dec_and_test(&ar->dp.num_tx_pending))
|
||||
wake_up(&ar->dp.tx_empty_waitq);
|
||||
|
||||
|
@ -435,16 +431,14 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
|
|||
|
||||
dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
if (!rcu_dereference(ab->pdevs_active[ar->pdev_idx])) {
|
||||
if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
goto exit;
|
||||
return;
|
||||
}
|
||||
|
||||
if (!skb_cb->vif) {
|
||||
if (unlikely(!skb_cb->vif)) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
goto exit;
|
||||
return;
|
||||
}
|
||||
|
||||
info = IEEE80211_SKB_CB(msdu);
|
||||
|
@ -465,7 +459,7 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
|
|||
(info->flags & IEEE80211_TX_CTL_NO_ACK))
|
||||
info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
|
||||
|
||||
if (ath11k_debugfs_is_extd_tx_stats_enabled(ar)) {
|
||||
if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar))) {
|
||||
if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
|
||||
if (ar->last_ppdu_id == 0) {
|
||||
ar->last_ppdu_id = ts->ppdu_id;
|
||||
|
@ -494,9 +488,6 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
|
|||
*/
|
||||
|
||||
ieee80211_tx_status(ar->hw, msdu);
|
||||
|
||||
exit:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
|
||||
|
@ -505,11 +496,11 @@ static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
|
|||
{
|
||||
ts->buf_rel_source =
|
||||
FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
|
||||
if (ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
|
||||
ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)
|
||||
if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
|
||||
ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM))
|
||||
return;
|
||||
|
||||
if (ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)
|
||||
if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW))
|
||||
return;
|
||||
|
||||
ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
|
||||
|
@ -556,8 +547,9 @@ void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
|
|||
ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
|
||||
}
|
||||
|
||||
if ((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
|
||||
(ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) == tx_ring->tx_status_tail)) {
|
||||
if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
|
||||
(ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) ==
|
||||
tx_ring->tx_status_tail))) {
|
||||
/* TODO: Process pending tx_status messages when kfifo_is_full() */
|
||||
ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
|
||||
}
|
||||
|
@ -580,7 +572,7 @@ void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
|
|||
mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
|
||||
msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
|
||||
|
||||
if (ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) {
|
||||
if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) {
|
||||
ath11k_dp_tx_process_htt_tx_complete(ab,
|
||||
(void *)tx_status,
|
||||
mac_id, msdu_id,
|
||||
|
@ -588,16 +580,16 @@ void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
|
|||
continue;
|
||||
}
|
||||
|
||||
spin_lock_bh(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
|
||||
if (!msdu) {
|
||||
spin_lock(&tx_ring->tx_idr_lock);
|
||||
msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
|
||||
if (unlikely(!msdu)) {
|
||||
ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
|
||||
msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
spin_unlock(&tx_ring->tx_idr_lock);
|
||||
continue;
|
||||
}
|
||||
idr_remove(&tx_ring->txbuf_idr, msdu_id);
|
||||
spin_unlock_bh(&tx_ring->tx_idr_lock);
|
||||
|
||||
spin_unlock(&tx_ring->tx_idr_lock);
|
||||
|
||||
ar = ab->pdevs[mac_id].ar;
|
||||
|
||||
|
@ -903,7 +895,7 @@ int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
|
|||
cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
|
||||
HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
|
||||
|
||||
pdev_mask = 1 << (i + 1);
|
||||
pdev_mask = 1 << (ar->pdev_idx + i);
|
||||
cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
|
||||
cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
|
||||
|
||||
|
|
|
@ -627,6 +627,21 @@ u32 *ath11k_hal_srng_dst_peek(struct ath11k_base *ab, struct hal_srng *srng)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static void ath11k_hal_srng_prefetch_desc(struct ath11k_base *ab,
|
||||
struct hal_srng *srng)
|
||||
{
|
||||
u32 *desc;
|
||||
|
||||
/* prefetch only if desc is available */
|
||||
desc = ath11k_hal_srng_dst_peek(ab, srng);
|
||||
if (likely(desc)) {
|
||||
dma_sync_single_for_cpu(ab->dev, virt_to_phys(desc),
|
||||
(srng->entry_size * sizeof(u32)),
|
||||
DMA_FROM_DEVICE);
|
||||
prefetch(desc);
|
||||
}
|
||||
}
|
||||
|
||||
u32 *ath11k_hal_srng_dst_get_next_entry(struct ath11k_base *ab,
|
||||
struct hal_srng *srng)
|
||||
{
|
||||
|
@ -639,8 +654,15 @@ u32 *ath11k_hal_srng_dst_get_next_entry(struct ath11k_base *ab,
|
|||
|
||||
desc = srng->ring_base_vaddr + srng->u.dst_ring.tp;
|
||||
|
||||
srng->u.dst_ring.tp = (srng->u.dst_ring.tp + srng->entry_size) %
|
||||
srng->ring_size;
|
||||
srng->u.dst_ring.tp += srng->entry_size;
|
||||
|
||||
/* wrap around to start of ring*/
|
||||
if (srng->u.dst_ring.tp == srng->ring_size)
|
||||
srng->u.dst_ring.tp = 0;
|
||||
|
||||
/* Try to prefetch the next descriptor in the ring */
|
||||
if (srng->flags & HAL_SRNG_FLAGS_CACHED)
|
||||
ath11k_hal_srng_prefetch_desc(ab, srng);
|
||||
|
||||
return desc;
|
||||
}
|
||||
|
@ -775,11 +797,16 @@ void ath11k_hal_srng_access_begin(struct ath11k_base *ab, struct hal_srng *srng)
|
|||
{
|
||||
lockdep_assert_held(&srng->lock);
|
||||
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC)
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.cached_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
else
|
||||
} else {
|
||||
srng->u.dst_ring.cached_hp = *srng->u.dst_ring.hp_addr;
|
||||
|
||||
/* Try to prefetch the next descriptor in the ring */
|
||||
if (srng->flags & HAL_SRNG_FLAGS_CACHED)
|
||||
ath11k_hal_srng_prefetch_desc(ab, srng);
|
||||
}
|
||||
}
|
||||
|
||||
/* Update cached ring head/tail pointers to HW. ath11k_hal_srng_access_begin()
|
||||
|
|
|
@ -513,6 +513,7 @@ enum hal_srng_dir {
|
|||
#define HAL_SRNG_FLAGS_DATA_TLV_SWAP 0x00000020
|
||||
#define HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN 0x00010000
|
||||
#define HAL_SRNG_FLAGS_MSI_INTR 0x00020000
|
||||
#define HAL_SRNG_FLAGS_CACHED 0x20000000
|
||||
#define HAL_SRNG_FLAGS_LMAC_RING 0x80000000
|
||||
|
||||
#define HAL_SRNG_TLV_HDR_TAG GENMASK(9, 1)
|
||||
|
|
|
@ -81,6 +81,8 @@ int ath11k_htc_send(struct ath11k_htc *htc,
|
|||
struct ath11k_base *ab = htc->ab;
|
||||
int credits = 0;
|
||||
int ret;
|
||||
bool credit_flow_enabled = (ab->hw_params.credit_flow &&
|
||||
ep->tx_credit_flow_enabled);
|
||||
|
||||
if (eid >= ATH11K_HTC_EP_COUNT) {
|
||||
ath11k_warn(ab, "Invalid endpoint id: %d\n", eid);
|
||||
|
@ -89,7 +91,7 @@ int ath11k_htc_send(struct ath11k_htc *htc,
|
|||
|
||||
skb_push(skb, sizeof(struct ath11k_htc_hdr));
|
||||
|
||||
if (ep->tx_credit_flow_enabled) {
|
||||
if (credit_flow_enabled) {
|
||||
credits = DIV_ROUND_UP(skb->len, htc->target_credit_size);
|
||||
spin_lock_bh(&htc->tx_lock);
|
||||
if (ep->tx_credits < credits) {
|
||||
|
@ -126,7 +128,7 @@ int ath11k_htc_send(struct ath11k_htc *htc,
|
|||
err_unmap:
|
||||
dma_unmap_single(dev, skb_cb->paddr, skb->len, DMA_TO_DEVICE);
|
||||
err_credits:
|
||||
if (ep->tx_credit_flow_enabled) {
|
||||
if (credit_flow_enabled) {
|
||||
spin_lock_bh(&htc->tx_lock);
|
||||
ep->tx_credits += credits;
|
||||
ath11k_dbg(ab, ATH11K_DBG_HTC,
|
||||
|
@ -203,23 +205,25 @@ static int ath11k_htc_process_trailer(struct ath11k_htc *htc,
|
|||
break;
|
||||
}
|
||||
|
||||
switch (record->hdr.id) {
|
||||
case ATH11K_HTC_RECORD_CREDITS:
|
||||
len = sizeof(struct ath11k_htc_credit_report);
|
||||
if (record->hdr.len < len) {
|
||||
ath11k_warn(ab, "Credit report too long\n");
|
||||
status = -EINVAL;
|
||||
if (ab->hw_params.credit_flow) {
|
||||
switch (record->hdr.id) {
|
||||
case ATH11K_HTC_RECORD_CREDITS:
|
||||
len = sizeof(struct ath11k_htc_credit_report);
|
||||
if (record->hdr.len < len) {
|
||||
ath11k_warn(ab, "Credit report too long\n");
|
||||
status = -EINVAL;
|
||||
break;
|
||||
}
|
||||
ath11k_htc_process_credit_report(htc,
|
||||
record->credit_report,
|
||||
record->hdr.len,
|
||||
src_eid);
|
||||
break;
|
||||
default:
|
||||
ath11k_warn(ab, "Unhandled record: id:%d length:%d\n",
|
||||
record->hdr.id, record->hdr.len);
|
||||
break;
|
||||
}
|
||||
ath11k_htc_process_credit_report(htc,
|
||||
record->credit_report,
|
||||
record->hdr.len,
|
||||
src_eid);
|
||||
break;
|
||||
default:
|
||||
ath11k_warn(ab, "Unhandled record: id:%d length:%d\n",
|
||||
record->hdr.id, record->hdr.len);
|
||||
break;
|
||||
}
|
||||
|
||||
if (status)
|
||||
|
@ -245,6 +249,29 @@ static void ath11k_htc_suspend_complete(struct ath11k_base *ab, bool ack)
|
|||
complete(&ab->htc_suspend);
|
||||
}
|
||||
|
||||
void ath11k_htc_tx_completion_handler(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k_htc *htc = &ab->htc;
|
||||
struct ath11k_htc_ep *ep;
|
||||
void (*ep_tx_complete)(struct ath11k_base *, struct sk_buff *);
|
||||
u8 eid;
|
||||
|
||||
eid = ATH11K_SKB_CB(skb)->eid;
|
||||
if (eid >= ATH11K_HTC_EP_COUNT)
|
||||
return;
|
||||
|
||||
ep = &htc->endpoint[eid];
|
||||
spin_lock_bh(&htc->tx_lock);
|
||||
ep_tx_complete = ep->ep_ops.ep_tx_complete;
|
||||
spin_unlock_bh(&htc->tx_lock);
|
||||
if (!ep_tx_complete) {
|
||||
dev_kfree_skb_any(skb);
|
||||
return;
|
||||
}
|
||||
ep_tx_complete(htc->ab, skb);
|
||||
}
|
||||
|
||||
void ath11k_htc_rx_completion_handler(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
|
@ -607,6 +634,11 @@ int ath11k_htc_connect_service(struct ath11k_htc *htc,
|
|||
disable_credit_flow_ctrl = true;
|
||||
}
|
||||
|
||||
if (!ab->hw_params.credit_flow) {
|
||||
flags |= ATH11K_HTC_CONN_FLAGS_DISABLE_CREDIT_FLOW_CTRL;
|
||||
disable_credit_flow_ctrl = true;
|
||||
}
|
||||
|
||||
req_msg->flags_len = FIELD_PREP(HTC_SVC_MSG_CONNECTIONFLAGS, flags);
|
||||
req_msg->msg_svc_id |= FIELD_PREP(HTC_SVC_MSG_SERVICE_ID,
|
||||
conn_req->service_id);
|
||||
|
@ -732,7 +764,10 @@ int ath11k_htc_start(struct ath11k_htc *htc)
|
|||
msg->msg_id = FIELD_PREP(HTC_MSG_MESSAGEID,
|
||||
ATH11K_HTC_MSG_SETUP_COMPLETE_EX_ID);
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_HTC, "HTC is using TX credit flow control\n");
|
||||
if (ab->hw_params.credit_flow)
|
||||
ath11k_dbg(ab, ATH11K_DBG_HTC, "HTC is using TX credit flow control\n");
|
||||
else
|
||||
msg->flags |= ATH11K_GLOBAL_DISABLE_CREDIT_FLOW;
|
||||
|
||||
status = ath11k_htc_send(htc, ATH11K_HTC_EP_0, skb);
|
||||
if (status) {
|
||||
|
|
|
@ -83,8 +83,8 @@ enum ath11k_htc_conn_flags {
|
|||
ATH11K_HTC_CONN_FLAGS_THRESHOLD_LEVEL_ONE_HALF = 0x1,
|
||||
ATH11K_HTC_CONN_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS = 0x2,
|
||||
ATH11K_HTC_CONN_FLAGS_THRESHOLD_LEVEL_UNITY = 0x3,
|
||||
ATH11K_HTC_CONN_FLAGS_REDUCE_CREDIT_DRIBBLE = 1 << 2,
|
||||
ATH11K_HTC_CONN_FLAGS_DISABLE_CREDIT_FLOW_CTRL = 1 << 3
|
||||
ATH11K_HTC_CONN_FLAGS_REDUCE_CREDIT_DRIBBLE = 0x4,
|
||||
ATH11K_HTC_CONN_FLAGS_DISABLE_CREDIT_FLOW_CTRL = 0x8,
|
||||
};
|
||||
|
||||
enum ath11k_htc_conn_svc_status {
|
||||
|
@ -116,6 +116,8 @@ struct ath11k_htc_conn_svc_resp {
|
|||
u32 svc_meta_pad;
|
||||
} __packed;
|
||||
|
||||
#define ATH11K_GLOBAL_DISABLE_CREDIT_FLOW BIT(1)
|
||||
|
||||
struct ath11k_htc_setup_complete_extended {
|
||||
u32 msg_id;
|
||||
u32 flags;
|
||||
|
@ -305,5 +307,6 @@ int ath11k_htc_send(struct ath11k_htc *htc, enum ath11k_htc_ep_id eid,
|
|||
struct sk_buff *ath11k_htc_alloc_skb(struct ath11k_base *ar, int size);
|
||||
void ath11k_htc_rx_completion_handler(struct ath11k_base *ar,
|
||||
struct sk_buff *skb);
|
||||
|
||||
void ath11k_htc_tx_completion_handler(struct ath11k_base *ab,
|
||||
struct sk_buff *skb);
|
||||
#endif
|
||||
|
|
|
@ -1061,8 +1061,6 @@ const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074 = {
|
|||
const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390 = {
|
||||
.tx = {
|
||||
ATH11K_TX_RING_MASK_0,
|
||||
ATH11K_TX_RING_MASK_1,
|
||||
ATH11K_TX_RING_MASK_2,
|
||||
},
|
||||
.rx_mon_status = {
|
||||
0, 0, 0, 0,
|
||||
|
|
|
@ -170,12 +170,17 @@ struct ath11k_hw_params {
|
|||
bool supports_monitor;
|
||||
bool supports_shadow_regs;
|
||||
bool idle_ps;
|
||||
bool supports_sta_ps;
|
||||
bool cold_boot_calib;
|
||||
bool supports_suspend;
|
||||
u32 hal_desc_sz;
|
||||
bool fix_l1ss;
|
||||
bool credit_flow;
|
||||
u8 max_tx_ring;
|
||||
const struct ath11k_hw_hal_params *hal_params;
|
||||
bool supports_dynamic_smps_6ghz;
|
||||
bool alloc_cacheable_memory;
|
||||
bool wakeup_mhi;
|
||||
};
|
||||
|
||||
struct ath11k_hw_ops {
|
||||
|
|
|
@ -775,9 +775,9 @@ static int ath11k_mac_monitor_vdev_start(struct ath11k *ar, int vdev_id,
|
|||
arg.channel.chan_radar = !!(channel->flags & IEEE80211_CHAN_RADAR);
|
||||
|
||||
arg.channel.min_power = 0;
|
||||
arg.channel.max_power = channel->max_power * 2;
|
||||
arg.channel.max_reg_power = channel->max_reg_power * 2;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain * 2;
|
||||
arg.channel.max_power = channel->max_power;
|
||||
arg.channel.max_reg_power = channel->max_reg_power;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain;
|
||||
|
||||
arg.pref_tx_streams = ar->num_tx_chains;
|
||||
arg.pref_rx_streams = ar->num_rx_chains;
|
||||
|
@ -1049,6 +1049,83 @@ static int ath11k_mac_monitor_stop(struct ath11k *ar)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ath11k_mac_vif_setup_ps(struct ath11k_vif *arvif)
|
||||
{
|
||||
struct ath11k *ar = arvif->ar;
|
||||
struct ieee80211_vif *vif = arvif->vif;
|
||||
struct ieee80211_conf *conf = &ar->hw->conf;
|
||||
enum wmi_sta_powersave_param param;
|
||||
enum wmi_sta_ps_mode psmode;
|
||||
int ret;
|
||||
int timeout;
|
||||
bool enable_ps;
|
||||
|
||||
lockdep_assert_held(&arvif->ar->conf_mutex);
|
||||
|
||||
if (arvif->vif->type != NL80211_IFTYPE_STATION)
|
||||
return 0;
|
||||
|
||||
enable_ps = arvif->ps;
|
||||
|
||||
if (!arvif->is_started) {
|
||||
/* mac80211 can update vif powersave state while disconnected.
|
||||
* Firmware doesn't behave nicely and consumes more power than
|
||||
* necessary if PS is disabled on a non-started vdev. Hence
|
||||
* force-enable PS for non-running vdevs.
|
||||
*/
|
||||
psmode = WMI_STA_PS_MODE_ENABLED;
|
||||
} else if (enable_ps) {
|
||||
psmode = WMI_STA_PS_MODE_ENABLED;
|
||||
param = WMI_STA_PS_PARAM_INACTIVITY_TIME;
|
||||
|
||||
timeout = conf->dynamic_ps_timeout;
|
||||
if (timeout == 0) {
|
||||
/* firmware doesn't like 0 */
|
||||
timeout = ieee80211_tu_to_usec(vif->bss_conf.beacon_int) / 1000;
|
||||
}
|
||||
|
||||
ret = ath11k_wmi_set_sta_ps_param(ar, arvif->vdev_id, param,
|
||||
timeout);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to set inactivity time for vdev %d: %i\n",
|
||||
arvif->vdev_id, ret);
|
||||
return ret;
|
||||
}
|
||||
} else {
|
||||
psmode = WMI_STA_PS_MODE_DISABLED;
|
||||
}
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "mac vdev %d psmode %s\n",
|
||||
arvif->vdev_id, psmode ? "enable" : "disable");
|
||||
|
||||
ret = ath11k_wmi_pdev_set_ps_mode(ar, arvif->vdev_id, psmode);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to set sta power save mode %d for vdev %d: %d\n",
|
||||
psmode, arvif->vdev_id, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath11k_mac_config_ps(struct ath11k *ar)
|
||||
{
|
||||
struct ath11k_vif *arvif;
|
||||
int ret = 0;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
list_for_each_entry(arvif, &ar->arvifs, list) {
|
||||
ret = ath11k_mac_vif_setup_ps(arvif);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to setup powersave: %d\n", ret);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath11k_mac_op_config(struct ieee80211_hw *hw, u32 changed)
|
||||
{
|
||||
struct ath11k *ar = hw->priv;
|
||||
|
@ -1137,11 +1214,15 @@ static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
|
|||
|
||||
if (cfg80211_find_ie(WLAN_EID_RSN, ies, (skb_tail_pointer(bcn) - ies)))
|
||||
arvif->rsnie_present = true;
|
||||
else
|
||||
arvif->rsnie_present = false;
|
||||
|
||||
if (cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
|
||||
WLAN_OUI_TYPE_MICROSOFT_WPA,
|
||||
ies, (skb_tail_pointer(bcn) - ies)))
|
||||
arvif->wpaie_present = true;
|
||||
else
|
||||
arvif->wpaie_present = false;
|
||||
|
||||
ret = ath11k_wmi_bcn_tmpl(ar, arvif->vdev_id, &offs, bcn);
|
||||
|
||||
|
@ -1154,6 +1235,26 @@ static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif)
|
||||
{
|
||||
struct ieee80211_vif *vif = arvif->vif;
|
||||
|
||||
if (!vif->color_change_active && !arvif->bcca_zero_sent)
|
||||
return;
|
||||
|
||||
if (vif->color_change_active && ieee80211_beacon_cntdwn_is_complete(vif)) {
|
||||
arvif->bcca_zero_sent = true;
|
||||
ieee80211_color_change_finish(vif);
|
||||
return;
|
||||
}
|
||||
|
||||
arvif->bcca_zero_sent = false;
|
||||
|
||||
if (vif->color_change_active)
|
||||
ieee80211_beacon_update_cntdwn(vif);
|
||||
ath11k_mac_setup_bcn_tmpl(arvif);
|
||||
}
|
||||
|
||||
static void ath11k_control_beaconing(struct ath11k_vif *arvif,
|
||||
struct ieee80211_bss_conf *info)
|
||||
{
|
||||
|
@ -2397,6 +2498,8 @@ static void ath11k_bss_assoc(struct ieee80211_hw *hw,
|
|||
struct ath11k_vif *arvif = (void *)vif->drv_priv;
|
||||
struct peer_assoc_params peer_arg;
|
||||
struct ieee80211_sta *ap_sta;
|
||||
struct ath11k_peer *peer;
|
||||
bool is_auth = false;
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
@ -2418,6 +2521,7 @@ static void ath11k_bss_assoc(struct ieee80211_hw *hw,
|
|||
|
||||
rcu_read_unlock();
|
||||
|
||||
peer_arg.is_assoc = true;
|
||||
ret = ath11k_wmi_send_peer_assoc_cmd(ar, &peer_arg);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to run peer assoc for %pM vdev %i: %d\n",
|
||||
|
@ -2458,13 +2562,22 @@ static void ath11k_bss_assoc(struct ieee80211_hw *hw,
|
|||
"mac vdev %d up (associated) bssid %pM aid %d\n",
|
||||
arvif->vdev_id, bss_conf->bssid, bss_conf->aid);
|
||||
|
||||
/* Authorize BSS Peer */
|
||||
ret = ath11k_wmi_set_peer_param(ar, arvif->bssid,
|
||||
arvif->vdev_id,
|
||||
WMI_PEER_AUTHORIZE,
|
||||
1);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "Unable to authorize BSS peer: %d\n", ret);
|
||||
spin_lock_bh(&ar->ab->base_lock);
|
||||
|
||||
peer = ath11k_peer_find(ar->ab, arvif->vdev_id, arvif->bssid);
|
||||
if (peer && peer->is_authorized)
|
||||
is_auth = true;
|
||||
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
|
||||
if (is_auth) {
|
||||
ret = ath11k_wmi_set_peer_param(ar, arvif->bssid,
|
||||
arvif->vdev_id,
|
||||
WMI_PEER_AUTHORIZE,
|
||||
1);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "Unable to authorize BSS peer: %d\n", ret);
|
||||
}
|
||||
|
||||
ret = ath11k_wmi_send_obss_spr_cmd(ar, arvif->vdev_id,
|
||||
&bss_conf->he_obss_pd);
|
||||
|
@ -2805,10 +2918,17 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw,
|
|||
"Set staggered beacon mode for VDEV: %d\n",
|
||||
arvif->vdev_id);
|
||||
|
||||
ret = ath11k_mac_setup_bcn_tmpl(arvif);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "failed to update bcn template: %d\n",
|
||||
ret);
|
||||
if (!arvif->do_not_send_tmpl || !arvif->bcca_zero_sent) {
|
||||
ret = ath11k_mac_setup_bcn_tmpl(arvif);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "failed to update bcn template: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
if (arvif->bcca_zero_sent)
|
||||
arvif->do_not_send_tmpl = true;
|
||||
else
|
||||
arvif->do_not_send_tmpl = false;
|
||||
}
|
||||
|
||||
if (changed & (BSS_CHANGED_BEACON_INFO | BSS_CHANGED_BEACON)) {
|
||||
|
@ -2942,6 +3062,16 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw,
|
|||
ath11k_mac_txpower_recalc(ar);
|
||||
}
|
||||
|
||||
if (changed & BSS_CHANGED_PS &&
|
||||
ar->ab->hw_params.supports_sta_ps) {
|
||||
arvif->ps = vif->bss_conf.ps;
|
||||
|
||||
ret = ath11k_mac_config_ps(ar);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "failed to setup ps on vdev %i: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
}
|
||||
|
||||
if (changed & BSS_CHANGED_MCAST_RATE &&
|
||||
!ath11k_mac_vif_chan(arvif->vif, &def)) {
|
||||
band = def.chan->band;
|
||||
|
@ -3009,6 +3139,25 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw,
|
|||
if (ret)
|
||||
ath11k_warn(ar->ab, "failed to set bss color collision on vdev %i: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
|
||||
param_id = WMI_VDEV_PARAM_BSS_COLOR;
|
||||
if (info->he_bss_color.enabled)
|
||||
param_value = info->he_bss_color.color <<
|
||||
IEEE80211_HE_OPERATION_BSS_COLOR_OFFSET;
|
||||
else
|
||||
param_value = IEEE80211_HE_OPERATION_BSS_COLOR_DISABLED;
|
||||
|
||||
ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id,
|
||||
param_id,
|
||||
param_value);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab,
|
||||
"failed to set bss color param on vdev %i: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
|
||||
"bss color param 0x%x set on vdev %i\n",
|
||||
param_value, arvif->vdev_id);
|
||||
} else if (vif->type == NL80211_IFTYPE_STATION) {
|
||||
ret = ath11k_wmi_send_bss_color_change_enable_cmd(ar,
|
||||
arvif->vdev_id,
|
||||
|
@ -3316,9 +3465,7 @@ static int ath11k_install_key(struct ath11k_vif *arvif,
|
|||
return 0;
|
||||
|
||||
if (cmd == DISABLE_KEY) {
|
||||
/* TODO: Check if FW expects value other than NONE for del */
|
||||
/* arg.key_cipher = WMI_CIPHER_NONE; */
|
||||
arg.key_len = 0;
|
||||
arg.key_cipher = WMI_CIPHER_NONE;
|
||||
arg.key_data = NULL;
|
||||
goto install;
|
||||
}
|
||||
|
@ -3685,6 +3832,7 @@ static int ath11k_station_assoc(struct ath11k *ar,
|
|||
|
||||
ath11k_peer_assoc_prepare(ar, vif, sta, &peer_arg, reassoc);
|
||||
|
||||
peer_arg.is_assoc = true;
|
||||
ret = ath11k_wmi_send_peer_assoc_cmd(ar, &peer_arg);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to run peer assoc for STA %pM vdev %i: %d\n",
|
||||
|
@ -3824,11 +3972,27 @@ static void ath11k_sta_rc_update_wk(struct work_struct *wk)
|
|||
ath11k_mac_max_he_nss(he_mcs_mask)));
|
||||
|
||||
if (changed & IEEE80211_RC_BW_CHANGED) {
|
||||
err = ath11k_wmi_set_peer_param(ar, sta->addr, arvif->vdev_id,
|
||||
WMI_PEER_CHWIDTH, bw);
|
||||
if (err)
|
||||
ath11k_warn(ar->ab, "failed to update STA %pM peer bw %d: %d\n",
|
||||
sta->addr, bw, err);
|
||||
/* Send peer assoc command before set peer bandwidth param to
|
||||
* avoid the mismatch between the peer phymode and the peer
|
||||
* bandwidth.
|
||||
*/
|
||||
ath11k_peer_assoc_prepare(ar, arvif->vif, sta, &peer_arg, true);
|
||||
|
||||
peer_arg.is_assoc = false;
|
||||
err = ath11k_wmi_send_peer_assoc_cmd(ar, &peer_arg);
|
||||
if (err) {
|
||||
ath11k_warn(ar->ab, "failed to send peer assoc for STA %pM vdev %i: %d\n",
|
||||
sta->addr, arvif->vdev_id, err);
|
||||
} else if (wait_for_completion_timeout(&ar->peer_assoc_done, 1 * HZ)) {
|
||||
err = ath11k_wmi_set_peer_param(ar, sta->addr, arvif->vdev_id,
|
||||
WMI_PEER_CHWIDTH, bw);
|
||||
if (err)
|
||||
ath11k_warn(ar->ab, "failed to update STA %pM peer bw %d: %d\n",
|
||||
sta->addr, bw, err);
|
||||
} else {
|
||||
ath11k_warn(ar->ab, "failed to get peer assoc conf event for %pM vdev %i\n",
|
||||
sta->addr, arvif->vdev_id);
|
||||
}
|
||||
}
|
||||
|
||||
if (changed & IEEE80211_RC_NSS_CHANGED) {
|
||||
|
@ -3896,6 +4060,7 @@ static void ath11k_sta_rc_update_wk(struct work_struct *wk)
|
|||
ath11k_peer_assoc_prepare(ar, arvif->vif, sta,
|
||||
&peer_arg, true);
|
||||
|
||||
peer_arg.is_assoc = false;
|
||||
err = ath11k_wmi_send_peer_assoc_cmd(ar, &peer_arg);
|
||||
if (err)
|
||||
ath11k_warn(ar->ab, "failed to run peer assoc for STA %pM vdev %i: %d\n",
|
||||
|
@ -4095,6 +4260,10 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw,
|
|||
new_state == IEEE80211_STA_NOTEXIST)) {
|
||||
ath11k_dp_peer_cleanup(ar, arvif->vdev_id, sta->addr);
|
||||
|
||||
if (ar->ab->hw_params.vdev_start_delay &&
|
||||
vif->type == NL80211_IFTYPE_STATION)
|
||||
goto free;
|
||||
|
||||
ret = ath11k_peer_delete(ar, arvif->vdev_id, sta->addr);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "Failed to delete peer: %pM for VDEV: %d\n",
|
||||
|
@ -4116,6 +4285,7 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw,
|
|||
}
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
|
||||
free:
|
||||
kfree(arsta->tx_stats);
|
||||
arsta->tx_stats = NULL;
|
||||
|
||||
|
@ -4130,6 +4300,34 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw,
|
|||
if (ret)
|
||||
ath11k_warn(ar->ab, "Failed to associate station: %pM\n",
|
||||
sta->addr);
|
||||
} else if (old_state == IEEE80211_STA_ASSOC &&
|
||||
new_state == IEEE80211_STA_AUTHORIZED) {
|
||||
spin_lock_bh(&ar->ab->base_lock);
|
||||
|
||||
peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr);
|
||||
if (peer)
|
||||
peer->is_authorized = true;
|
||||
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_STATION && arvif->is_up) {
|
||||
ret = ath11k_wmi_set_peer_param(ar, sta->addr,
|
||||
arvif->vdev_id,
|
||||
WMI_PEER_AUTHORIZE,
|
||||
1);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab, "Unable to authorize peer %pM vdev %d: %d\n",
|
||||
sta->addr, arvif->vdev_id, ret);
|
||||
}
|
||||
} else if (old_state == IEEE80211_STA_AUTHORIZED &&
|
||||
new_state == IEEE80211_STA_ASSOC) {
|
||||
spin_lock_bh(&ar->ab->base_lock);
|
||||
|
||||
peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr);
|
||||
if (peer)
|
||||
peer->is_authorized = false;
|
||||
|
||||
spin_unlock_bh(&ar->ab->base_lock);
|
||||
} else if (old_state == IEEE80211_STA_ASSOC &&
|
||||
new_state == IEEE80211_STA_AUTH &&
|
||||
(vif->type == NL80211_IFTYPE_AP ||
|
||||
|
@ -4561,6 +4759,10 @@ ath11k_create_vht_cap(struct ath11k *ar, u32 rate_cap_tx_chainmask,
|
|||
vht_cap.vht_supported = 1;
|
||||
vht_cap.cap = ar->pdev->cap.vht_cap;
|
||||
|
||||
if (ar->pdev->cap.nss_ratio_enabled)
|
||||
vht_cap.vht_mcs.tx_highest |=
|
||||
cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
|
||||
|
||||
ath11k_set_vht_txbf_cap(ar, &vht_cap.cap);
|
||||
|
||||
rxmcs_map = 0;
|
||||
|
@ -5048,13 +5250,15 @@ static void ath11k_mgmt_over_wmi_tx_work(struct work_struct *work)
|
|||
arvif = ath11k_vif_to_arvif(skb_cb->vif);
|
||||
if (ar->allocated_vdev_map & (1LL << arvif->vdev_id) &&
|
||||
arvif->is_started) {
|
||||
atomic_inc(&ar->num_pending_mgmt_tx);
|
||||
ret = ath11k_mac_mgmt_tx_wmi(ar, arvif, skb);
|
||||
if (ret) {
|
||||
if (atomic_dec_if_positive(&ar->num_pending_mgmt_tx) < 0)
|
||||
WARN_ON_ONCE(1);
|
||||
|
||||
ath11k_warn(ar->ab, "failed to tx mgmt frame, vdev_id %d :%d\n",
|
||||
arvif->vdev_id, ret);
|
||||
ieee80211_free_txskb(ar->hw, skb);
|
||||
} else {
|
||||
atomic_inc(&ar->num_pending_mgmt_tx);
|
||||
}
|
||||
} else {
|
||||
ath11k_warn(ar->ab,
|
||||
|
@ -5138,7 +5342,7 @@ static void ath11k_mac_op_tx(struct ieee80211_hw *hw,
|
|||
arsta = (struct ath11k_sta *)control->sta->drv_priv;
|
||||
|
||||
ret = ath11k_dp_tx(ar, arvif, arsta, skb);
|
||||
if (ret) {
|
||||
if (unlikely(ret)) {
|
||||
ath11k_warn(ar->ab, "failed to transmit frame %d\n", ret);
|
||||
ieee80211_free_txskb(ar->hw, skb);
|
||||
}
|
||||
|
@ -5484,7 +5688,7 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
|
|||
u32 param_id, param_value;
|
||||
u16 nss;
|
||||
int i;
|
||||
int ret;
|
||||
int ret, fbret;
|
||||
int bit;
|
||||
|
||||
vif->driver_flags |= IEEE80211_VIF_SUPPORTS_UAPSD;
|
||||
|
@ -5638,7 +5842,8 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
|
|||
goto err_peer_del;
|
||||
}
|
||||
|
||||
ret = ath11k_wmi_pdev_set_ps_mode(ar, arvif->vdev_id, false);
|
||||
ret = ath11k_wmi_pdev_set_ps_mode(ar, arvif->vdev_id,
|
||||
WMI_STA_PS_MODE_DISABLED);
|
||||
if (ret) {
|
||||
ath11k_warn(ar->ab, "failed to disable vdev %d ps mode: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
|
@ -5686,17 +5891,17 @@ err_peer_del:
|
|||
if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
|
||||
reinit_completion(&ar->peer_delete_done);
|
||||
|
||||
ret = ath11k_wmi_send_peer_delete_cmd(ar, vif->addr,
|
||||
arvif->vdev_id);
|
||||
if (ret) {
|
||||
fbret = ath11k_wmi_send_peer_delete_cmd(ar, vif->addr,
|
||||
arvif->vdev_id);
|
||||
if (fbret) {
|
||||
ath11k_warn(ar->ab, "failed to delete peer vdev_id %d addr %pM\n",
|
||||
arvif->vdev_id, vif->addr);
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = ath11k_wait_for_peer_delete_done(ar, arvif->vdev_id,
|
||||
vif->addr);
|
||||
if (ret)
|
||||
fbret = ath11k_wait_for_peer_delete_done(ar, arvif->vdev_id,
|
||||
vif->addr);
|
||||
if (fbret)
|
||||
goto err;
|
||||
|
||||
ar->num_peers--;
|
||||
|
@ -5831,7 +6036,6 @@ static void ath11k_mac_op_configure_filter(struct ieee80211_hw *hw,
|
|||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
changed_flags &= SUPPORTED_FILTERS;
|
||||
*total_flags &= SUPPORTED_FILTERS;
|
||||
ar->filter_flags = *total_flags;
|
||||
|
||||
|
@ -5969,9 +6173,9 @@ ath11k_mac_vdev_start_restart(struct ath11k_vif *arvif,
|
|||
ath11k_phymodes[chandef->chan->band][chandef->width];
|
||||
|
||||
arg.channel.min_power = 0;
|
||||
arg.channel.max_power = chandef->chan->max_power * 2;
|
||||
arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
|
||||
arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain * 2;
|
||||
arg.channel.max_power = chandef->chan->max_power;
|
||||
arg.channel.max_reg_power = chandef->chan->max_reg_power;
|
||||
arg.channel.max_antenna_gain = chandef->chan->max_antenna_gain;
|
||||
|
||||
arg.pref_tx_streams = ar->num_tx_chains;
|
||||
arg.pref_rx_streams = ar->num_rx_chains;
|
||||
|
@ -6467,6 +6671,19 @@ ath11k_mac_op_unassign_vif_chanctx(struct ieee80211_hw *hw,
|
|||
|
||||
arvif->is_started = false;
|
||||
|
||||
if (ab->hw_params.vdev_start_delay &&
|
||||
arvif->vdev_type == WMI_VDEV_TYPE_STA) {
|
||||
ret = ath11k_peer_delete(ar, arvif->vdev_id, arvif->bssid);
|
||||
if (ret)
|
||||
ath11k_warn(ar->ab,
|
||||
"failed to delete peer %pM for vdev %d: %d\n",
|
||||
arvif->bssid, arvif->vdev_id, ret);
|
||||
else
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
|
||||
"mac removed peer %pM vdev %d after vdev stop\n",
|
||||
arvif->bssid, arvif->vdev_id);
|
||||
}
|
||||
|
||||
if (ab->hw_params.vdev_start_delay &&
|
||||
arvif->vdev_type == WMI_VDEV_TYPE_MONITOR)
|
||||
ath11k_wmi_vdev_down(ar, arvif->vdev_id);
|
||||
|
@ -7277,21 +7494,20 @@ static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,
|
|||
sinfo->tx_duration = arsta->tx_duration;
|
||||
sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_DURATION);
|
||||
|
||||
if (!arsta->txrate.legacy && !arsta->txrate.nss)
|
||||
return;
|
||||
|
||||
if (arsta->txrate.legacy) {
|
||||
sinfo->txrate.legacy = arsta->txrate.legacy;
|
||||
} else {
|
||||
sinfo->txrate.mcs = arsta->txrate.mcs;
|
||||
sinfo->txrate.nss = arsta->txrate.nss;
|
||||
sinfo->txrate.bw = arsta->txrate.bw;
|
||||
sinfo->txrate.he_gi = arsta->txrate.he_gi;
|
||||
sinfo->txrate.he_dcm = arsta->txrate.he_dcm;
|
||||
sinfo->txrate.he_ru_alloc = arsta->txrate.he_ru_alloc;
|
||||
if (arsta->txrate.legacy || arsta->txrate.nss) {
|
||||
if (arsta->txrate.legacy) {
|
||||
sinfo->txrate.legacy = arsta->txrate.legacy;
|
||||
} else {
|
||||
sinfo->txrate.mcs = arsta->txrate.mcs;
|
||||
sinfo->txrate.nss = arsta->txrate.nss;
|
||||
sinfo->txrate.bw = arsta->txrate.bw;
|
||||
sinfo->txrate.he_gi = arsta->txrate.he_gi;
|
||||
sinfo->txrate.he_dcm = arsta->txrate.he_dcm;
|
||||
sinfo->txrate.he_ru_alloc = arsta->txrate.he_ru_alloc;
|
||||
}
|
||||
sinfo->txrate.flags = arsta->txrate.flags;
|
||||
sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
|
||||
}
|
||||
sinfo->txrate.flags = arsta->txrate.flags;
|
||||
sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
|
||||
|
||||
/* TODO: Use real NF instead of default one. */
|
||||
sinfo->signal = arsta->rssi_comb + ATH11K_DEFAULT_NOISE_FLOOR;
|
||||
|
@ -7672,7 +7888,8 @@ static int __ath11k_mac_register(struct ath11k *ar)
|
|||
* for each band for a dual band capable radio. It will be tricky to
|
||||
* handle it when the ht capability different for each band.
|
||||
*/
|
||||
if (ht_cap & WMI_HT_CAP_DYNAMIC_SMPS || ar->supports_6ghz)
|
||||
if (ht_cap & WMI_HT_CAP_DYNAMIC_SMPS ||
|
||||
(ar->supports_6ghz && ab->hw_params.supports_dynamic_smps_6ghz))
|
||||
ar->hw->wiphy->features |= NL80211_FEATURE_DYNAMIC_SMPS;
|
||||
|
||||
ar->hw->wiphy->max_scan_ssids = WLAN_SCAN_PARAMS_MAX_SSID;
|
||||
|
@ -7703,6 +7920,9 @@ static int __ath11k_mac_register(struct ath11k *ar)
|
|||
|
||||
wiphy_ext_feature_set(ar->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
|
||||
wiphy_ext_feature_set(ar->hw->wiphy, NL80211_EXT_FEATURE_STA_TX_PWR);
|
||||
if (test_bit(WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD, ar->ab->wmi_ab.svc_map))
|
||||
wiphy_ext_feature_set(ar->hw->wiphy,
|
||||
NL80211_EXT_FEATURE_BSS_COLOR);
|
||||
|
||||
ar->hw->wiphy->cipher_suites = cipher_suites;
|
||||
ar->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
|
||||
|
|
|
@ -155,4 +155,5 @@ enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw b
|
|||
enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher);
|
||||
void ath11k_mac_handle_beacon(struct ath11k *ar, struct sk_buff *skb);
|
||||
void ath11k_mac_handle_beacon_miss(struct ath11k *ar, u32 vdev_id);
|
||||
void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif);
|
||||
#endif
|
||||
|
|
|
@ -182,7 +182,8 @@ void ath11k_pci_write32(struct ath11k_base *ab, u32 offset, u32 value)
|
|||
/* for offset beyond BAR + 4K - 32, may
|
||||
* need to wakeup MHI to access.
|
||||
*/
|
||||
if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
if (ab->hw_params.wakeup_mhi &&
|
||||
test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
offset >= ACCESS_ALWAYS_OFF)
|
||||
mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev);
|
||||
|
||||
|
@ -206,7 +207,8 @@ void ath11k_pci_write32(struct ath11k_base *ab, u32 offset, u32 value)
|
|||
}
|
||||
}
|
||||
|
||||
if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
if (ab->hw_params.wakeup_mhi &&
|
||||
test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
offset >= ACCESS_ALWAYS_OFF)
|
||||
mhi_device_put(ab_pci->mhi_ctrl->mhi_dev);
|
||||
}
|
||||
|
@ -219,7 +221,8 @@ u32 ath11k_pci_read32(struct ath11k_base *ab, u32 offset)
|
|||
/* for offset beyond BAR + 4K - 32, may
|
||||
* need to wakeup MHI to access.
|
||||
*/
|
||||
if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
if (ab->hw_params.wakeup_mhi &&
|
||||
test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
offset >= ACCESS_ALWAYS_OFF)
|
||||
mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev);
|
||||
|
||||
|
@ -243,7 +246,8 @@ u32 ath11k_pci_read32(struct ath11k_base *ab, u32 offset)
|
|||
}
|
||||
}
|
||||
|
||||
if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
if (ab->hw_params.wakeup_mhi &&
|
||||
test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
|
||||
offset >= ACCESS_ALWAYS_OFF)
|
||||
mhi_device_put(ab_pci->mhi_ctrl->mhi_dev);
|
||||
|
||||
|
@ -1251,6 +1255,15 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
|
|||
goto err_free_core;
|
||||
}
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_BOOT, "pci probe %04x:%04x %04x:%04x\n",
|
||||
pdev->vendor, pdev->device,
|
||||
pdev->subsystem_vendor, pdev->subsystem_device);
|
||||
|
||||
ab->id.vendor = pdev->vendor;
|
||||
ab->id.device = pdev->device;
|
||||
ab->id.subsystem_vendor = pdev->subsystem_vendor;
|
||||
ab->id.subsystem_device = pdev->subsystem_device;
|
||||
|
||||
switch (pci_dev->device) {
|
||||
case QCA6390_DEVICE_ID:
|
||||
ath11k_pci_read_hw_version(ab, &soc_hw_version_major,
|
||||
|
@ -1273,6 +1286,7 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
|
|||
ab->hw_rev = ATH11K_HW_QCN9074_HW10;
|
||||
break;
|
||||
case WCN6855_DEVICE_ID:
|
||||
ab->id.bdf_search = ATH11K_BDF_SEARCH_BUS_AND_BOARD;
|
||||
ath11k_pci_read_hw_version(ab, &soc_hw_version_major,
|
||||
&soc_hw_version_minor);
|
||||
switch (soc_hw_version_major) {
|
||||
|
|
|
@ -28,6 +28,7 @@ struct ath11k_peer {
|
|||
u8 ucast_keyidx;
|
||||
u16 sec_type;
|
||||
u16 sec_type_grp;
|
||||
bool is_authorized;
|
||||
};
|
||||
|
||||
void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id);
|
||||
|
|
|
@ -1586,7 +1586,7 @@ static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
|
|||
{
|
||||
struct qmi_wlanfw_host_cap_req_msg_v01 req;
|
||||
struct qmi_wlanfw_host_cap_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0;
|
||||
|
||||
memset(&req, 0, sizeof(req));
|
||||
|
@ -1640,6 +1640,7 @@ static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
|
|||
QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_host_cap_req_msg_v01_ei, &req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send host capability request: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
@ -1705,6 +1706,7 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
|
|||
QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_ind_register_req_msg_v01_ei, req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send indication register request: %d\n",
|
||||
ret);
|
||||
goto out;
|
||||
|
@ -1734,7 +1736,7 @@ static int ath11k_qmi_respond_fw_mem_request(struct ath11k_base *ab)
|
|||
{
|
||||
struct qmi_wlanfw_respond_mem_req_msg_v01 *req;
|
||||
struct qmi_wlanfw_respond_mem_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0, i;
|
||||
bool delayed;
|
||||
|
||||
|
@ -1783,6 +1785,7 @@ static int ath11k_qmi_respond_fw_mem_request(struct ath11k_base *ab)
|
|||
QMI_WLANFW_RESPOND_MEM_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_respond_mem_req_msg_v01_ei, req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to respond qmi memory request: %d\n",
|
||||
ret);
|
||||
goto out;
|
||||
|
@ -1911,7 +1914,7 @@ static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
|
|||
{
|
||||
struct qmi_wlanfw_cap_req_msg_v01 req;
|
||||
struct qmi_wlanfw_cap_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0;
|
||||
int r;
|
||||
|
||||
|
@ -1930,6 +1933,7 @@ static int ath11k_qmi_request_target_cap(struct ath11k_base *ab)
|
|||
QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_cap_req_msg_v01_ei, &req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send qmi cap request: %d\n",
|
||||
ret);
|
||||
goto out;
|
||||
|
@ -2000,7 +2004,7 @@ static int ath11k_qmi_load_file_target_mem(struct ath11k_base *ab,
|
|||
{
|
||||
struct qmi_wlanfw_bdf_download_req_msg_v01 *req;
|
||||
struct qmi_wlanfw_bdf_download_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
const u8 *temp = data;
|
||||
void __iomem *bdf_addr = NULL;
|
||||
int ret;
|
||||
|
@ -2245,7 +2249,7 @@ static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)
|
|||
struct m3_mem_region *m3_mem = &ab->qmi.m3_mem;
|
||||
struct qmi_wlanfw_m3_info_req_msg_v01 req;
|
||||
struct qmi_wlanfw_m3_info_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0;
|
||||
|
||||
memset(&req, 0, sizeof(req));
|
||||
|
@ -2277,6 +2281,7 @@ static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)
|
|||
QMI_WLANFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
|
||||
qmi_wlanfw_m3_info_req_msg_v01_ei, &req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send m3 information request: %d\n",
|
||||
ret);
|
||||
goto out;
|
||||
|
@ -2303,7 +2308,7 @@ static int ath11k_qmi_wlanfw_mode_send(struct ath11k_base *ab,
|
|||
{
|
||||
struct qmi_wlanfw_wlan_mode_req_msg_v01 req;
|
||||
struct qmi_wlanfw_wlan_mode_resp_msg_v01 resp;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0;
|
||||
|
||||
memset(&req, 0, sizeof(req));
|
||||
|
@ -2325,6 +2330,7 @@ static int ath11k_qmi_wlanfw_mode_send(struct ath11k_base *ab,
|
|||
QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_wlan_mode_req_msg_v01_ei, &req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send wlan mode request (mode %d): %d\n",
|
||||
mode, ret);
|
||||
goto out;
|
||||
|
@ -2358,7 +2364,7 @@ static int ath11k_qmi_wlanfw_wlan_cfg_send(struct ath11k_base *ab)
|
|||
struct qmi_wlanfw_wlan_cfg_resp_msg_v01 resp;
|
||||
struct ce_pipe_config *ce_cfg;
|
||||
struct service_to_pipe *svc_cfg;
|
||||
struct qmi_txn txn = {};
|
||||
struct qmi_txn txn;
|
||||
int ret = 0, pipe_num;
|
||||
|
||||
ce_cfg = (struct ce_pipe_config *)ab->qmi.ce_cfg.tgt_ce;
|
||||
|
@ -2419,6 +2425,7 @@ static int ath11k_qmi_wlanfw_wlan_cfg_send(struct ath11k_base *ab)
|
|||
QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN,
|
||||
qmi_wlanfw_wlan_cfg_req_msg_v01_ei, req);
|
||||
if (ret < 0) {
|
||||
qmi_txn_cancel(&txn);
|
||||
ath11k_warn(ab, "failed to send wlan config request: %d\n",
|
||||
ret);
|
||||
goto out;
|
||||
|
|
|
@ -456,6 +456,9 @@ ath11k_reg_adjust_bw(u16 start_freq, u16 end_freq, u16 max_bw)
|
|||
{
|
||||
u16 bw;
|
||||
|
||||
if (end_freq <= start_freq)
|
||||
return 0;
|
||||
|
||||
bw = end_freq - start_freq;
|
||||
bw = min_t(u16, bw, max_bw);
|
||||
|
||||
|
@ -463,8 +466,10 @@ ath11k_reg_adjust_bw(u16 start_freq, u16 end_freq, u16 max_bw)
|
|||
bw = 80;
|
||||
else if (bw >= 40 && bw < 80)
|
||||
bw = 40;
|
||||
else if (bw < 40)
|
||||
else if (bw >= 20 && bw < 40)
|
||||
bw = 20;
|
||||
else
|
||||
bw = 0;
|
||||
|
||||
return bw;
|
||||
}
|
||||
|
@ -488,73 +493,77 @@ ath11k_reg_update_weather_radar_band(struct ath11k_base *ab,
|
|||
struct cur_reg_rule *reg_rule,
|
||||
u8 *rule_idx, u32 flags, u16 max_bw)
|
||||
{
|
||||
u32 start_freq;
|
||||
u32 end_freq;
|
||||
u16 bw;
|
||||
u8 i;
|
||||
|
||||
i = *rule_idx;
|
||||
|
||||
/* there might be situations when even the input rule must be dropped */
|
||||
i--;
|
||||
|
||||
/* frequencies below weather radar */
|
||||
bw = ath11k_reg_adjust_bw(reg_rule->start_freq,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW, max_bw);
|
||||
if (bw > 0) {
|
||||
i++;
|
||||
|
||||
ath11k_reg_update_rule(regd->reg_rules + i, reg_rule->start_freq,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
flags);
|
||||
ath11k_reg_update_rule(regd->reg_rules + i,
|
||||
reg_rule->start_freq,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
flags);
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, reg_rule->start_freq, ETSI_WEATHER_RADAR_BAND_LOW,
|
||||
bw, reg_rule->ant_gain, reg_rule->reg_power,
|
||||
regd->reg_rules[i].dfs_cac_ms,
|
||||
flags);
|
||||
|
||||
if (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_HIGH)
|
||||
end_freq = ETSI_WEATHER_RADAR_BAND_HIGH;
|
||||
else
|
||||
end_freq = reg_rule->end_freq;
|
||||
|
||||
bw = ath11k_reg_adjust_bw(ETSI_WEATHER_RADAR_BAND_LOW, end_freq,
|
||||
max_bw);
|
||||
|
||||
i++;
|
||||
|
||||
ath11k_reg_update_rule(regd->reg_rules + i,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW, end_freq, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
flags);
|
||||
|
||||
regd->reg_rules[i].dfs_cac_ms = ETSI_WEATHER_RADAR_BAND_CAC_TIMEOUT;
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, ETSI_WEATHER_RADAR_BAND_LOW, end_freq,
|
||||
bw, reg_rule->ant_gain, reg_rule->reg_power,
|
||||
regd->reg_rules[i].dfs_cac_ms,
|
||||
flags);
|
||||
|
||||
if (end_freq == reg_rule->end_freq) {
|
||||
regd->n_reg_rules--;
|
||||
*rule_idx = i;
|
||||
return;
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, reg_rule->start_freq,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW, bw, reg_rule->ant_gain,
|
||||
reg_rule->reg_power, regd->reg_rules[i].dfs_cac_ms,
|
||||
flags);
|
||||
}
|
||||
|
||||
/* weather radar frequencies */
|
||||
start_freq = max_t(u32, reg_rule->start_freq,
|
||||
ETSI_WEATHER_RADAR_BAND_LOW);
|
||||
end_freq = min_t(u32, reg_rule->end_freq, ETSI_WEATHER_RADAR_BAND_HIGH);
|
||||
|
||||
bw = ath11k_reg_adjust_bw(start_freq, end_freq, max_bw);
|
||||
if (bw > 0) {
|
||||
i++;
|
||||
|
||||
ath11k_reg_update_rule(regd->reg_rules + i, start_freq,
|
||||
end_freq, bw, reg_rule->ant_gain,
|
||||
reg_rule->reg_power, flags);
|
||||
|
||||
regd->reg_rules[i].dfs_cac_ms = ETSI_WEATHER_RADAR_BAND_CAC_TIMEOUT;
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, start_freq, end_freq, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
regd->reg_rules[i].dfs_cac_ms, flags);
|
||||
}
|
||||
|
||||
/* frequencies above weather radar */
|
||||
bw = ath11k_reg_adjust_bw(ETSI_WEATHER_RADAR_BAND_HIGH,
|
||||
reg_rule->end_freq, max_bw);
|
||||
if (bw > 0) {
|
||||
i++;
|
||||
|
||||
i++;
|
||||
ath11k_reg_update_rule(regd->reg_rules + i,
|
||||
ETSI_WEATHER_RADAR_BAND_HIGH,
|
||||
reg_rule->end_freq, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
flags);
|
||||
|
||||
ath11k_reg_update_rule(regd->reg_rules + i, ETSI_WEATHER_RADAR_BAND_HIGH,
|
||||
reg_rule->end_freq, bw,
|
||||
reg_rule->ant_gain, reg_rule->reg_power,
|
||||
flags);
|
||||
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, ETSI_WEATHER_RADAR_BAND_HIGH, reg_rule->end_freq,
|
||||
bw, reg_rule->ant_gain, reg_rule->reg_power,
|
||||
regd->reg_rules[i].dfs_cac_ms,
|
||||
flags);
|
||||
ath11k_dbg(ab, ATH11K_DBG_REG,
|
||||
"\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
|
||||
i + 1, ETSI_WEATHER_RADAR_BAND_HIGH,
|
||||
reg_rule->end_freq, bw, reg_rule->ant_gain,
|
||||
reg_rule->reg_power, regd->reg_rules[i].dfs_cac_ms,
|
||||
flags);
|
||||
}
|
||||
|
||||
*rule_idx = i;
|
||||
}
|
||||
|
|
|
@ -7,3 +7,4 @@
|
|||
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include "trace.h"
|
||||
EXPORT_SYMBOL(__tracepoint_ath11k_log_dbg);
|
||||
|
|
|
@ -14,12 +14,24 @@
|
|||
#if !defined(CONFIG_ATH11K_TRACING)
|
||||
#undef TRACE_EVENT
|
||||
#define TRACE_EVENT(name, proto, ...) \
|
||||
static inline void trace_ ## name(proto) {} \
|
||||
static inline bool trace_##name##_enabled(void) \
|
||||
{ \
|
||||
return false; \
|
||||
}
|
||||
|
||||
#undef DECLARE_EVENT_CLASS
|
||||
#define DECLARE_EVENT_CLASS(...)
|
||||
#undef DEFINE_EVENT
|
||||
#define DEFINE_EVENT(evt_class, name, proto, ...) \
|
||||
static inline void trace_ ## name(proto) {}
|
||||
#endif /* !CONFIG_ATH11K_TRACING || __CHECKER__ */
|
||||
|
||||
#undef TRACE_SYSTEM
|
||||
#define TRACE_SYSTEM ath11k
|
||||
|
||||
#define ATH11K_MSG_MAX 400
|
||||
|
||||
TRACE_EVENT(ath11k_htt_pktlog,
|
||||
TP_PROTO(struct ath11k *ar, const void *buf, u16 buf_len,
|
||||
u32 pktlog_checksum),
|
||||
|
@ -108,6 +120,166 @@ TRACE_EVENT(ath11k_htt_rxdesc,
|
|||
)
|
||||
);
|
||||
|
||||
DECLARE_EVENT_CLASS(ath11k_log_event,
|
||||
TP_PROTO(struct ath11k_base *ab, struct va_format *vaf),
|
||||
TP_ARGS(ab, vaf),
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ab->dev))
|
||||
__string(driver, dev_driver_string(ab->dev))
|
||||
__dynamic_array(char, msg, ATH11K_MSG_MAX)
|
||||
),
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ab->dev));
|
||||
__assign_str(driver, dev_driver_string(ab->dev));
|
||||
WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
|
||||
ATH11K_MSG_MAX,
|
||||
vaf->fmt,
|
||||
*vaf->va) >= ATH11K_MSG_MAX);
|
||||
),
|
||||
TP_printk(
|
||||
"%s %s %s",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__get_str(msg)
|
||||
)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath11k_log_event, ath11k_log_err,
|
||||
TP_PROTO(struct ath11k_base *ab, struct va_format *vaf),
|
||||
TP_ARGS(ab, vaf)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath11k_log_event, ath11k_log_warn,
|
||||
TP_PROTO(struct ath11k_base *ab, struct va_format *vaf),
|
||||
TP_ARGS(ab, vaf)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath11k_log_event, ath11k_log_info,
|
||||
TP_PROTO(struct ath11k_base *ab, struct va_format *vaf),
|
||||
TP_ARGS(ab, vaf)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath11k_wmi_cmd,
|
||||
TP_PROTO(struct ath11k_base *ab, int id, const void *buf, size_t buf_len),
|
||||
|
||||
TP_ARGS(ab, id, buf, buf_len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ab->dev))
|
||||
__string(driver, dev_driver_string(ab->dev))
|
||||
__field(unsigned int, id)
|
||||
__field(size_t, buf_len)
|
||||
__dynamic_array(u8, buf, buf_len)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ab->dev));
|
||||
__assign_str(driver, dev_driver_string(ab->dev));
|
||||
__entry->id = id;
|
||||
__entry->buf_len = buf_len;
|
||||
memcpy(__get_dynamic_array(buf), buf, buf_len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s id %d len %zu",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__entry->id,
|
||||
__entry->buf_len
|
||||
)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath11k_wmi_event,
|
||||
TP_PROTO(struct ath11k_base *ab, int id, const void *buf, size_t buf_len),
|
||||
|
||||
TP_ARGS(ab, id, buf, buf_len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ab->dev))
|
||||
__string(driver, dev_driver_string(ab->dev))
|
||||
__field(unsigned int, id)
|
||||
__field(size_t, buf_len)
|
||||
__dynamic_array(u8, buf, buf_len)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ab->dev));
|
||||
__assign_str(driver, dev_driver_string(ab->dev));
|
||||
__entry->id = id;
|
||||
__entry->buf_len = buf_len;
|
||||
memcpy(__get_dynamic_array(buf), buf, buf_len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s id %d len %zu",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__entry->id,
|
||||
__entry->buf_len
|
||||
)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath11k_log_dbg,
|
||||
TP_PROTO(struct ath11k_base *ab, unsigned int level, struct va_format *vaf),
|
||||
|
||||
TP_ARGS(ab, level, vaf),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ab->dev))
|
||||
__string(driver, dev_driver_string(ab->dev))
|
||||
__field(unsigned int, level)
|
||||
__dynamic_array(char, msg, ATH11K_MSG_MAX)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ab->dev));
|
||||
__assign_str(driver, dev_driver_string(ab->dev));
|
||||
__entry->level = level;
|
||||
WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
|
||||
ATH11K_MSG_MAX, vaf->fmt,
|
||||
*vaf->va) >= ATH11K_MSG_MAX);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s %s",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__get_str(msg)
|
||||
)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath11k_log_dbg_dump,
|
||||
TP_PROTO(struct ath11k_base *ab, const char *msg, const char *prefix,
|
||||
const void *buf, size_t buf_len),
|
||||
|
||||
TP_ARGS(ab, msg, prefix, buf, buf_len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ab->dev))
|
||||
__string(driver, dev_driver_string(ab->dev))
|
||||
__string(msg, msg)
|
||||
__string(prefix, prefix)
|
||||
__field(size_t, buf_len)
|
||||
__dynamic_array(u8, buf, buf_len)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ab->dev));
|
||||
__assign_str(driver, dev_driver_string(ab->dev));
|
||||
__assign_str(msg, msg);
|
||||
__assign_str(prefix, prefix);
|
||||
__entry->buf_len = buf_len;
|
||||
memcpy(__get_dynamic_array(buf), buf, buf_len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s %s/%s\n",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__get_str(prefix),
|
||||
__get_str(msg)
|
||||
)
|
||||
);
|
||||
#endif /* _TRACE_H_ || TRACE_HEADER_MULTI_READ*/
|
||||
|
||||
/* we don't want to use include/trace/events */
|
||||
|
|
|
@ -128,6 +128,8 @@ static const struct wmi_tlv_policy wmi_tlv_policies[] = {
|
|||
.min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
|
||||
[WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
|
||||
.min_len = sizeof(struct wmi_vdev_delete_resp_event) },
|
||||
[WMI_TAG_OBSS_COLOR_COLLISION_EVT] = {
|
||||
.min_len = sizeof(struct wmi_obss_color_collision_event) },
|
||||
};
|
||||
|
||||
#define PRIMAP(_hw_mode_) \
|
||||
|
@ -249,6 +251,8 @@ static int ath11k_wmi_cmd_send_nowait(struct ath11k_pdev_wmi *wmi, struct sk_buf
|
|||
cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
|
||||
cmd_hdr->cmd_id = cmd;
|
||||
|
||||
trace_ath11k_wmi_cmd(ab, cmd_id, skb->data, skb->len);
|
||||
|
||||
memset(skb_cb, 0, sizeof(*skb_cb));
|
||||
ret = ath11k_htc_send(&ab->htc, wmi->eid, skb);
|
||||
|
||||
|
@ -267,21 +271,39 @@ int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
|
|||
{
|
||||
struct ath11k_wmi_base *wmi_sc = wmi->wmi_ab;
|
||||
int ret = -EOPNOTSUPP;
|
||||
struct ath11k_base *ab = wmi_sc->ab;
|
||||
|
||||
might_sleep();
|
||||
|
||||
wait_event_timeout(wmi_sc->tx_credits_wq, ({
|
||||
ret = ath11k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
|
||||
if (ab->hw_params.credit_flow) {
|
||||
wait_event_timeout(wmi_sc->tx_credits_wq, ({
|
||||
ret = ath11k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
|
||||
|
||||
if (ret && test_bit(ATH11K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags))
|
||||
ret = -ESHUTDOWN;
|
||||
if (ret && test_bit(ATH11K_FLAG_CRASH_FLUSH,
|
||||
&wmi_sc->ab->dev_flags))
|
||||
ret = -ESHUTDOWN;
|
||||
|
||||
(ret != -EAGAIN);
|
||||
}), WMI_SEND_TIMEOUT_HZ);
|
||||
(ret != -EAGAIN);
|
||||
}), WMI_SEND_TIMEOUT_HZ);
|
||||
} else {
|
||||
wait_event_timeout(wmi->tx_ce_desc_wq, ({
|
||||
ret = ath11k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
|
||||
|
||||
if (ret && test_bit(ATH11K_FLAG_CRASH_FLUSH,
|
||||
&wmi_sc->ab->dev_flags))
|
||||
ret = -ESHUTDOWN;
|
||||
|
||||
(ret != -ENOBUFS);
|
||||
}), WMI_SEND_TIMEOUT_HZ);
|
||||
}
|
||||
|
||||
if (ret == -EAGAIN)
|
||||
ath11k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id);
|
||||
|
||||
if (ret == -ENOBUFS)
|
||||
ath11k_warn(wmi_sc->ab, "ce desc not available for wmi command %d\n",
|
||||
cmd_id);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1244,7 +1266,8 @@ int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
|
|||
return ret;
|
||||
}
|
||||
|
||||
int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable)
|
||||
int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
|
||||
enum wmi_sta_ps_mode psmode)
|
||||
{
|
||||
struct ath11k_pdev_wmi *wmi = ar->wmi;
|
||||
struct wmi_pdev_set_ps_mode_cmd *cmd;
|
||||
|
@ -1259,7 +1282,7 @@ int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable)
|
|||
cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_STA_POWERSAVE_MODE_CMD) |
|
||||
FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);
|
||||
cmd->vdev_id = vdev_id;
|
||||
cmd->sta_ps_mode = enable;
|
||||
cmd->sta_ps_mode = psmode;
|
||||
|
||||
ret = ath11k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
|
||||
if (ret) {
|
||||
|
@ -1269,7 +1292,7 @@ int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable)
|
|||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
|
||||
"WMI vdev set psmode %d vdev id %d\n",
|
||||
enable, vdev_id);
|
||||
psmode, vdev_id);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -1612,6 +1635,15 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
|
|||
void *ptr;
|
||||
int ret, len;
|
||||
size_t aligned_len = roundup(bcn->len, 4);
|
||||
struct ieee80211_vif *vif;
|
||||
struct ath11k_vif *arvif = ath11k_mac_get_arvif(ar, vdev_id);
|
||||
|
||||
if (!arvif) {
|
||||
ath11k_warn(ar->ab, "failed to find arvif with vdev id %d\n", vdev_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
vif = arvif->vif;
|
||||
|
||||
len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
|
||||
|
||||
|
@ -1624,8 +1656,12 @@ int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
|
|||
FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);
|
||||
cmd->vdev_id = vdev_id;
|
||||
cmd->tim_ie_offset = offs->tim_offset;
|
||||
cmd->csa_switch_count_offset = offs->cntdwn_counter_offs[0];
|
||||
cmd->ext_csa_switch_count_offset = offs->cntdwn_counter_offs[1];
|
||||
|
||||
if (vif->csa_active) {
|
||||
cmd->csa_switch_count_offset = offs->cntdwn_counter_offs[0];
|
||||
cmd->ext_csa_switch_count_offset = offs->cntdwn_counter_offs[1];
|
||||
}
|
||||
|
||||
cmd->buf_len = bcn->len;
|
||||
|
||||
ptr = skb->data + sizeof(*cmd);
|
||||
|
@ -1689,7 +1725,8 @@ int ath11k_wmi_vdev_install_key(struct ath11k *ar,
|
|||
tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
|
||||
tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |
|
||||
FIELD_PREP(WMI_TLV_LEN, key_len_aligned);
|
||||
memcpy(tlv->value, (u8 *)arg->key_data, key_len_aligned);
|
||||
if (arg->key_data)
|
||||
memcpy(tlv->value, (u8 *)arg->key_data, key_len_aligned);
|
||||
|
||||
ret = ath11k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
|
||||
if (ret) {
|
||||
|
@ -1762,7 +1799,7 @@ ath11k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
|
|||
cmd->peer_flags |= WMI_PEER_AUTH;
|
||||
if (param->need_ptk_4_way) {
|
||||
cmd->peer_flags |= WMI_PEER_NEED_PTK_4_WAY;
|
||||
if (!hw_crypto_disabled)
|
||||
if (!hw_crypto_disabled && param->is_assoc)
|
||||
cmd->peer_flags &= ~WMI_PEER_AUTH;
|
||||
}
|
||||
if (param->need_gtk_2_way)
|
||||
|
@ -2386,6 +2423,8 @@ int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
|
|||
tchan_info->reg_class_id);
|
||||
*reg2 |= FIELD_PREP(WMI_CHAN_REG_INFO2_ANT_MAX,
|
||||
tchan_info->antennamax);
|
||||
*reg2 |= FIELD_PREP(WMI_CHAN_REG_INFO2_MAX_TX_PWR,
|
||||
tchan_info->maxregpower);
|
||||
|
||||
ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
|
||||
"WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
|
||||
|
@ -3427,6 +3466,53 @@ int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
ath11k_wmi_obss_color_collision_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
const void **tb;
|
||||
const struct wmi_obss_color_collision_event *ev;
|
||||
struct ath11k_vif *arvif;
|
||||
int ret;
|
||||
|
||||
tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
|
||||
if (IS_ERR(tb)) {
|
||||
ret = PTR_ERR(tb);
|
||||
ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
ev = tb[WMI_TAG_OBSS_COLOR_COLLISION_EVT];
|
||||
if (!ev) {
|
||||
ath11k_warn(ab, "failed to fetch obss color collision ev");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
arvif = ath11k_mac_get_arvif_by_vdev_id(ab, ev->vdev_id);
|
||||
if (!arvif) {
|
||||
ath11k_warn(ab, "failed to find arvif with vedv id %d in obss_color_collision_event\n",
|
||||
ev->vdev_id);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
switch (ev->evt_type) {
|
||||
case WMI_BSS_COLOR_COLLISION_DETECTION:
|
||||
ieeee80211_obss_color_collision_notify(arvif->vif, ev->obss_color_bitmap);
|
||||
ath11k_dbg(ab, ATH11K_DBG_WMI,
|
||||
"OBSS color collision detected vdev:%d, event:%d, bitmap:%08llx\n",
|
||||
ev->vdev_id, ev->evt_type, ev->obss_color_bitmap);
|
||||
break;
|
||||
case WMI_BSS_COLOR_COLLISION_DISABLE:
|
||||
case WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY:
|
||||
case WMI_BSS_COLOR_FREE_SLOT_AVAILABLE:
|
||||
break;
|
||||
default:
|
||||
ath11k_warn(ab, "received unknown obss color collision detetction event\n");
|
||||
}
|
||||
|
||||
exit:
|
||||
kfree(tb);
|
||||
}
|
||||
|
||||
static void
|
||||
ath11k_fill_band_to_mac_param(struct ath11k_base *soc,
|
||||
struct wmi_host_pdev_band_to_mac *band_to_mac)
|
||||
|
@ -5813,7 +5899,30 @@ static void ath11k_wmi_op_ep_tx_credits(struct ath11k_base *ab)
|
|||
static void ath11k_wmi_htc_tx_complete(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k_pdev_wmi *wmi = NULL;
|
||||
u32 i;
|
||||
u8 wmi_ep_count;
|
||||
u8 eid;
|
||||
|
||||
eid = ATH11K_SKB_CB(skb)->eid;
|
||||
dev_kfree_skb(skb);
|
||||
|
||||
if (eid >= ATH11K_HTC_EP_COUNT)
|
||||
return;
|
||||
|
||||
wmi_ep_count = ab->htc.wmi_ep_count;
|
||||
if (wmi_ep_count > ab->hw_params.max_radios)
|
||||
return;
|
||||
|
||||
for (i = 0; i < ab->htc.wmi_ep_count; i++) {
|
||||
if (ab->wmi_ab.wmi[i].eid == eid) {
|
||||
wmi = &ab->wmi_ab.wmi[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (wmi)
|
||||
wake_up(&wmi->tx_ce_desc_wq);
|
||||
}
|
||||
|
||||
static bool ath11k_reg_is_world_alpha(char *alpha)
|
||||
|
@ -6111,6 +6220,7 @@ static void ath11k_vdev_start_resp_event(struct ath11k_base *ab, struct sk_buff
|
|||
|
||||
static void ath11k_bcn_tx_status_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k_vif *arvif;
|
||||
u32 vdev_id, tx_status;
|
||||
|
||||
if (ath11k_pull_bcn_tx_status_ev(ab, skb->data, skb->len,
|
||||
|
@ -6118,6 +6228,14 @@ static void ath11k_bcn_tx_status_event(struct ath11k_base *ab, struct sk_buff *s
|
|||
ath11k_warn(ab, "failed to extract bcn tx status");
|
||||
return;
|
||||
}
|
||||
|
||||
arvif = ath11k_mac_get_arvif_by_vdev_id(ab, vdev_id);
|
||||
if (!arvif) {
|
||||
ath11k_warn(ab, "invalid vdev id %d in bcn_tx_status",
|
||||
vdev_id);
|
||||
return;
|
||||
}
|
||||
ath11k_mac_bcn_tx_event(arvif);
|
||||
}
|
||||
|
||||
static void ath11k_vdev_stopped_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
|
@ -6398,6 +6516,7 @@ static void ath11k_peer_sta_kickout_event(struct ath11k_base *ab, struct sk_buff
|
|||
struct ieee80211_sta *sta;
|
||||
struct ath11k_peer *peer;
|
||||
struct ath11k *ar;
|
||||
u32 vdev_id;
|
||||
|
||||
if (ath11k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
|
||||
ath11k_warn(ab, "failed to extract peer sta kickout event");
|
||||
|
@ -6413,10 +6532,15 @@ static void ath11k_peer_sta_kickout_event(struct ath11k_base *ab, struct sk_buff
|
|||
if (!peer) {
|
||||
ath11k_warn(ab, "peer not found %pM\n",
|
||||
arg.mac_addr);
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
ar = ath11k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
|
||||
vdev_id = peer->vdev_id;
|
||||
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
ar = ath11k_mac_get_ar_by_vdev_id(ab, vdev_id);
|
||||
if (!ar) {
|
||||
ath11k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
|
||||
peer->vdev_id);
|
||||
|
@ -6437,7 +6561,6 @@ static void ath11k_peer_sta_kickout_event(struct ath11k_base *ab, struct sk_buff
|
|||
ieee80211_report_low_ack(sta, 10);
|
||||
|
||||
exit:
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
|
@ -7054,6 +7177,8 @@ static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb)
|
|||
cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
|
||||
id = FIELD_GET(WMI_CMD_HDR_CMD_ID, (cmd_hdr->cmd_id));
|
||||
|
||||
trace_ath11k_wmi_event(ab, id, skb->data, skb->len);
|
||||
|
||||
if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
|
||||
goto out;
|
||||
|
||||
|
@ -7138,6 +7263,9 @@ static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb)
|
|||
case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
|
||||
ath11k_probe_resp_tx_status_event(ab, skb);
|
||||
break;
|
||||
case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
|
||||
ath11k_wmi_obss_color_collision_event(ab, skb);
|
||||
break;
|
||||
/* add Unsupported events here */
|
||||
case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
|
||||
case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
|
||||
|
@ -7199,6 +7327,7 @@ static int ath11k_connect_pdev_htc_service(struct ath11k_base *ab,
|
|||
ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
|
||||
ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
|
||||
ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
|
||||
init_waitqueue_head(&ab->wmi_ab.wmi[pdev_idx].tx_ce_desc_wq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -774,6 +774,8 @@ enum wmi_tlv_event_id {
|
|||
WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
|
||||
WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
|
||||
WMI_SAP_OFL_DEL_STA_EVENTID,
|
||||
WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
|
||||
WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
|
||||
WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
|
||||
WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
|
||||
WMI_DCC_GET_STATS_RESP_EVENTID,
|
||||
|
@ -2522,6 +2524,7 @@ struct ath11k_pdev_wmi {
|
|||
enum ath11k_htc_ep_id eid;
|
||||
const struct wmi_peer_flags_map *peer_flags;
|
||||
u32 rx_decap_mode;
|
||||
wait_queue_head_t tx_ce_desc_wq;
|
||||
};
|
||||
|
||||
struct vdev_create_params {
|
||||
|
@ -3617,6 +3620,7 @@ struct peer_assoc_params {
|
|||
u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
|
||||
bool twt_responder;
|
||||
bool twt_requester;
|
||||
bool is_assoc;
|
||||
struct ath11k_ppe_threshold peer_ppet;
|
||||
};
|
||||
|
||||
|
@ -4914,6 +4918,13 @@ struct wmi_pdev_obss_pd_bitmap_cmd {
|
|||
#define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000
|
||||
#define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000
|
||||
|
||||
enum wmi_bss_color_collision {
|
||||
WMI_BSS_COLOR_COLLISION_DISABLE = 0,
|
||||
WMI_BSS_COLOR_COLLISION_DETECTION,
|
||||
WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
|
||||
WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
|
||||
};
|
||||
|
||||
struct wmi_obss_color_collision_cfg_params_cmd {
|
||||
u32 tlv_header;
|
||||
u32 vdev_id;
|
||||
|
@ -4931,6 +4942,12 @@ struct wmi_bss_color_change_enable_params_cmd {
|
|||
u32 enable;
|
||||
} __packed;
|
||||
|
||||
struct wmi_obss_color_collision_event {
|
||||
u32 vdev_id;
|
||||
u32 evt_type;
|
||||
u64 obss_color_bitmap;
|
||||
} __packed;
|
||||
|
||||
#define ATH11K_IPV4_TH_SEED_SIZE 5
|
||||
#define ATH11K_IPV6_TH_SEED_SIZE 11
|
||||
|
||||
|
@ -5351,7 +5368,8 @@ int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
|
|||
u32 vdev_id, u32 param_id, u32 param_val);
|
||||
int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
|
||||
u32 param_value, u8 pdev_id);
|
||||
int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable);
|
||||
int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
|
||||
enum wmi_sta_ps_mode psmode);
|
||||
int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
|
||||
int ath11k_wmi_cmd_init(struct ath11k_base *ab);
|
||||
int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
|
||||
|
|
|
@ -120,7 +120,7 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked,
|
|||
AR_ISR_TXEOL);
|
||||
}
|
||||
|
||||
ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXOK);
|
||||
ah->intr_txqs = MS(s0_s, AR_ISR_S0_QCU_TXOK);
|
||||
ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXDESC);
|
||||
ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
|
||||
ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
|
||||
|
|
|
@ -1005,24 +1005,20 @@ static void __ar955x_tx_iq_cal_sort(struct ath_hw *ah,
|
|||
int i, int nmeasurement)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
int im, ix, iy, temp;
|
||||
int im, ix, iy;
|
||||
|
||||
for (im = 0; im < nmeasurement; im++) {
|
||||
for (ix = 0; ix < MAXIQCAL - 1; ix++) {
|
||||
for (iy = ix + 1; iy <= MAXIQCAL - 1; iy++) {
|
||||
if (coeff->mag_coeff[i][im][iy] <
|
||||
coeff->mag_coeff[i][im][ix]) {
|
||||
temp = coeff->mag_coeff[i][im][ix];
|
||||
coeff->mag_coeff[i][im][ix] =
|
||||
coeff->mag_coeff[i][im][iy];
|
||||
coeff->mag_coeff[i][im][iy] = temp;
|
||||
swap(coeff->mag_coeff[i][im][ix],
|
||||
coeff->mag_coeff[i][im][iy]);
|
||||
}
|
||||
if (coeff->phs_coeff[i][im][iy] <
|
||||
coeff->phs_coeff[i][im][ix]) {
|
||||
temp = coeff->phs_coeff[i][im][ix];
|
||||
coeff->phs_coeff[i][im][ix] =
|
||||
coeff->phs_coeff[i][im][iy];
|
||||
coeff->phs_coeff[i][im][iy] = temp;
|
||||
swap(coeff->phs_coeff[i][im][ix],
|
||||
coeff->phs_coeff[i][im][iy]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -272,6 +272,21 @@ static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void wcn36xx_dxe_disable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)
|
||||
{
|
||||
int reg_data = 0;
|
||||
|
||||
wcn36xx_dxe_read_register(wcn,
|
||||
WCN36XX_DXE_INT_MASK_REG,
|
||||
®_data);
|
||||
|
||||
reg_data &= ~wcn_ch;
|
||||
|
||||
wcn36xx_dxe_write_register(wcn,
|
||||
WCN36XX_DXE_INT_MASK_REG,
|
||||
(int)reg_data);
|
||||
}
|
||||
|
||||
static int wcn36xx_dxe_fill_skb(struct device *dev,
|
||||
struct wcn36xx_dxe_ctl *ctl,
|
||||
gfp_t gfp)
|
||||
|
@ -834,6 +849,53 @@ unlock:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static bool _wcn36xx_dxe_tx_channel_is_empty(struct wcn36xx_dxe_ch *ch)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct wcn36xx_dxe_ctl *ctl_bd_start, *ctl_skb_start;
|
||||
struct wcn36xx_dxe_ctl *ctl_bd, *ctl_skb;
|
||||
bool ret = true;
|
||||
|
||||
spin_lock_irqsave(&ch->lock, flags);
|
||||
|
||||
/* Loop through ring buffer looking for nonempty entries. */
|
||||
ctl_bd_start = ch->head_blk_ctl;
|
||||
ctl_bd = ctl_bd_start;
|
||||
ctl_skb_start = ctl_bd_start->next;
|
||||
ctl_skb = ctl_skb_start;
|
||||
do {
|
||||
if (ctl_skb->skb) {
|
||||
ret = false;
|
||||
goto unlock;
|
||||
}
|
||||
ctl_bd = ctl_skb->next;
|
||||
ctl_skb = ctl_bd->next;
|
||||
} while (ctl_skb != ctl_skb_start);
|
||||
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&ch->lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int wcn36xx_dxe_tx_flush(struct wcn36xx *wcn)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
/* Called with mac80211 queues stopped. Wait for empty HW queues. */
|
||||
do {
|
||||
if (_wcn36xx_dxe_tx_channel_is_empty(&wcn->dxe_tx_l_ch) &&
|
||||
_wcn36xx_dxe_tx_channel_is_empty(&wcn->dxe_tx_h_ch)) {
|
||||
return 0;
|
||||
}
|
||||
/* This ieee80211_ops callback is specifically allowed to
|
||||
* sleep.
|
||||
*/
|
||||
usleep_range(1000, 1100);
|
||||
} while (++i < 100);
|
||||
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
||||
{
|
||||
int reg_data = 0, ret;
|
||||
|
@ -869,7 +931,6 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
|||
WCN36XX_DXE_WQ_TX_L);
|
||||
|
||||
wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);
|
||||
|
||||
/***************************************/
|
||||
/* Init descriptors for TX HIGH channel */
|
||||
|
@ -893,9 +954,6 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
|||
|
||||
wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
|
||||
|
||||
/* Enable channel interrupts */
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);
|
||||
|
||||
/***************************************/
|
||||
/* Init descriptors for RX LOW channel */
|
||||
/***************************************/
|
||||
|
@ -905,7 +963,6 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
|||
goto out_err_rxl_ch;
|
||||
}
|
||||
|
||||
|
||||
/* For RX we need to preallocated buffers */
|
||||
wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch);
|
||||
|
||||
|
@ -928,9 +985,6 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
|||
WCN36XX_DXE_REG_CTL_RX_L,
|
||||
WCN36XX_DXE_CH_DEFAULT_CTL_RX_L);
|
||||
|
||||
/* Enable channel interrupts */
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);
|
||||
|
||||
/***************************************/
|
||||
/* Init descriptors for RX HIGH channel */
|
||||
/***************************************/
|
||||
|
@ -962,15 +1016,18 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
|
|||
WCN36XX_DXE_REG_CTL_RX_H,
|
||||
WCN36XX_DXE_CH_DEFAULT_CTL_RX_H);
|
||||
|
||||
/* Enable channel interrupts */
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);
|
||||
|
||||
ret = wcn36xx_dxe_request_irqs(wcn);
|
||||
if (ret < 0)
|
||||
goto out_err_irq;
|
||||
|
||||
timer_setup(&wcn->tx_ack_timer, wcn36xx_dxe_tx_timer, 0);
|
||||
|
||||
/* Enable channel interrupts */
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);
|
||||
wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);
|
||||
|
||||
return 0;
|
||||
|
||||
out_err_irq:
|
||||
|
@ -987,6 +1044,14 @@ out_err_txh_ch:
|
|||
|
||||
void wcn36xx_dxe_deinit(struct wcn36xx *wcn)
|
||||
{
|
||||
int reg_data = 0;
|
||||
|
||||
/* Disable channel interrupts */
|
||||
wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);
|
||||
wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);
|
||||
wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);
|
||||
wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);
|
||||
|
||||
free_irq(wcn->tx_irq, wcn);
|
||||
free_irq(wcn->rx_irq, wcn);
|
||||
del_timer(&wcn->tx_ack_timer);
|
||||
|
@ -996,6 +1061,15 @@ void wcn36xx_dxe_deinit(struct wcn36xx *wcn)
|
|||
wcn->tx_ack_skb = NULL;
|
||||
}
|
||||
|
||||
/* Put the DXE block into reset before freeing memory */
|
||||
reg_data = WCN36XX_DXE_REG_RESET;
|
||||
wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
|
||||
|
||||
wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_l_ch);
|
||||
wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_h_ch);
|
||||
|
||||
wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_l_ch);
|
||||
wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_h_ch);
|
||||
wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_l_ch);
|
||||
wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_h_ch);
|
||||
}
|
||||
|
|
|
@ -466,5 +466,6 @@ int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
|
|||
struct wcn36xx_tx_bd *bd,
|
||||
struct sk_buff *skb,
|
||||
bool is_low);
|
||||
int wcn36xx_dxe_tx_flush(struct wcn36xx *wcn);
|
||||
void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status);
|
||||
#endif /* _DXE_H_ */
|
||||
|
|
|
@ -402,6 +402,7 @@ static void wcn36xx_change_opchannel(struct wcn36xx *wcn, int ch)
|
|||
static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed)
|
||||
{
|
||||
struct wcn36xx *wcn = hw->priv;
|
||||
int ret;
|
||||
|
||||
wcn36xx_dbg(WCN36XX_DBG_MAC, "mac config changed 0x%08x\n", changed);
|
||||
|
||||
|
@ -417,17 +418,31 @@ static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed)
|
|||
* want to receive/transmit regular data packets, then
|
||||
* simply stop the scan session and exit PS mode.
|
||||
*/
|
||||
wcn36xx_smd_finish_scan(wcn, HAL_SYS_MODE_SCAN,
|
||||
wcn->sw_scan_vif);
|
||||
wcn->sw_scan_channel = 0;
|
||||
if (wcn->sw_scan_channel)
|
||||
wcn36xx_smd_end_scan(wcn, wcn->sw_scan_channel);
|
||||
if (wcn->sw_scan_init) {
|
||||
wcn36xx_smd_finish_scan(wcn, HAL_SYS_MODE_SCAN,
|
||||
wcn->sw_scan_vif);
|
||||
}
|
||||
} else if (wcn->sw_scan) {
|
||||
/* A scan is ongoing, do not change the operating
|
||||
* channel, but start a scan session on the channel.
|
||||
*/
|
||||
wcn36xx_smd_init_scan(wcn, HAL_SYS_MODE_SCAN,
|
||||
wcn->sw_scan_vif);
|
||||
if (wcn->sw_scan_channel)
|
||||
wcn36xx_smd_end_scan(wcn, wcn->sw_scan_channel);
|
||||
if (!wcn->sw_scan_init) {
|
||||
/* This can fail if we are unable to notify the
|
||||
* operating channel.
|
||||
*/
|
||||
ret = wcn36xx_smd_init_scan(wcn,
|
||||
HAL_SYS_MODE_SCAN,
|
||||
wcn->sw_scan_vif);
|
||||
if (ret) {
|
||||
mutex_unlock(&wcn->conf_mutex);
|
||||
return -EIO;
|
||||
}
|
||||
}
|
||||
wcn36xx_smd_start_scan(wcn, ch);
|
||||
wcn->sw_scan_channel = ch;
|
||||
} else {
|
||||
wcn36xx_change_opchannel(wcn, ch);
|
||||
}
|
||||
|
@ -707,6 +722,8 @@ static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw,
|
|||
struct wcn36xx *wcn = hw->priv;
|
||||
struct wcn36xx_vif *vif_priv = wcn36xx_vif_to_priv(vif);
|
||||
|
||||
wcn36xx_dbg(WCN36XX_DBG_MAC, "sw_scan_start");
|
||||
|
||||
wcn->sw_scan = true;
|
||||
wcn->sw_scan_vif = vif;
|
||||
wcn->sw_scan_channel = 0;
|
||||
|
@ -721,8 +738,15 @@ static void wcn36xx_sw_scan_complete(struct ieee80211_hw *hw,
|
|||
{
|
||||
struct wcn36xx *wcn = hw->priv;
|
||||
|
||||
wcn36xx_dbg(WCN36XX_DBG_MAC, "sw_scan_complete");
|
||||
|
||||
/* ensure that any scan session is finished */
|
||||
wcn36xx_smd_finish_scan(wcn, HAL_SYS_MODE_SCAN, wcn->sw_scan_vif);
|
||||
if (wcn->sw_scan_channel)
|
||||
wcn36xx_smd_end_scan(wcn, wcn->sw_scan_channel);
|
||||
if (wcn->sw_scan_init) {
|
||||
wcn36xx_smd_finish_scan(wcn, HAL_SYS_MODE_SCAN,
|
||||
wcn->sw_scan_vif);
|
||||
}
|
||||
wcn->sw_scan = false;
|
||||
wcn->sw_scan_opchannel = 0;
|
||||
}
|
||||
|
@ -1277,6 +1301,16 @@ static void wcn36xx_ipv6_addr_change(struct ieee80211_hw *hw,
|
|||
}
|
||||
#endif
|
||||
|
||||
static void wcn36xx_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
u32 queues, bool drop)
|
||||
{
|
||||
struct wcn36xx *wcn = hw->priv;
|
||||
|
||||
if (wcn36xx_dxe_tx_flush(wcn)) {
|
||||
wcn36xx_err("Failed to flush hardware tx queues\n");
|
||||
}
|
||||
}
|
||||
|
||||
static const struct ieee80211_ops wcn36xx_ops = {
|
||||
.start = wcn36xx_start,
|
||||
.stop = wcn36xx_stop,
|
||||
|
@ -1304,6 +1338,7 @@ static const struct ieee80211_ops wcn36xx_ops = {
|
|||
#if IS_ENABLED(CONFIG_IPV6)
|
||||
.ipv6_addr_change = wcn36xx_ipv6_addr_change,
|
||||
#endif
|
||||
.flush = wcn36xx_flush,
|
||||
|
||||
CFG80211_TESTMODE_CMD(wcn36xx_tm_cmd)
|
||||
};
|
||||
|
|
|
@ -722,6 +722,7 @@ int wcn36xx_smd_init_scan(struct wcn36xx *wcn, enum wcn36xx_hal_sys_mode mode,
|
|||
wcn36xx_err("hal_init_scan response failed err=%d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
wcn->sw_scan_init = true;
|
||||
out:
|
||||
mutex_unlock(&wcn->hal_mutex);
|
||||
return ret;
|
||||
|
@ -752,6 +753,7 @@ int wcn36xx_smd_start_scan(struct wcn36xx *wcn, u8 scan_channel)
|
|||
wcn36xx_err("hal_start_scan response failed err=%d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
wcn->sw_scan_channel = scan_channel;
|
||||
out:
|
||||
mutex_unlock(&wcn->hal_mutex);
|
||||
return ret;
|
||||
|
@ -782,6 +784,7 @@ int wcn36xx_smd_end_scan(struct wcn36xx *wcn, u8 scan_channel)
|
|||
wcn36xx_err("hal_end_scan response failed err=%d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
wcn->sw_scan_channel = 0;
|
||||
out:
|
||||
mutex_unlock(&wcn->hal_mutex);
|
||||
return ret;
|
||||
|
@ -823,6 +826,7 @@ int wcn36xx_smd_finish_scan(struct wcn36xx *wcn,
|
|||
wcn36xx_err("hal_finish_scan response failed err=%d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
wcn->sw_scan_init = false;
|
||||
out:
|
||||
mutex_unlock(&wcn->hal_mutex);
|
||||
return ret;
|
||||
|
@ -2732,7 +2736,7 @@ static int wcn36xx_smd_missed_beacon_ind(struct wcn36xx *wcn,
|
|||
wcn36xx_dbg(WCN36XX_DBG_HAL, "beacon missed bss_index %d\n",
|
||||
tmp->bss_index);
|
||||
vif = wcn36xx_priv_to_vif(tmp);
|
||||
ieee80211_connection_loss(vif);
|
||||
ieee80211_beacon_loss(vif);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
@ -2747,7 +2751,7 @@ static int wcn36xx_smd_missed_beacon_ind(struct wcn36xx *wcn,
|
|||
wcn36xx_dbg(WCN36XX_DBG_HAL, "beacon missed bss_index %d\n",
|
||||
rsp->bss_index);
|
||||
vif = wcn36xx_priv_to_vif(tmp);
|
||||
ieee80211_connection_loss(vif);
|
||||
ieee80211_beacon_loss(vif);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -272,7 +272,6 @@ int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
|
|||
const struct wcn36xx_rate *rate;
|
||||
struct ieee80211_hdr *hdr;
|
||||
struct wcn36xx_rx_bd *bd;
|
||||
struct ieee80211_supported_band *sband;
|
||||
u16 fc, sn;
|
||||
|
||||
/*
|
||||
|
@ -314,8 +313,6 @@ int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
|
|||
fc = __le16_to_cpu(hdr->frame_control);
|
||||
sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
|
||||
|
||||
status.freq = WCN36XX_CENTER_FREQ(wcn);
|
||||
status.band = WCN36XX_BAND(wcn);
|
||||
status.mactime = 10;
|
||||
status.signal = -get_rssi0(bd);
|
||||
status.antenna = 1;
|
||||
|
@ -327,18 +324,36 @@ int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
|
|||
|
||||
wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag);
|
||||
|
||||
if (bd->scan_learn) {
|
||||
/* If packet originate from hardware scanning, extract the
|
||||
* band/channel from bd descriptor.
|
||||
*/
|
||||
u8 hwch = (bd->reserved0 << 4) + bd->rx_ch;
|
||||
|
||||
if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) {
|
||||
status.band = NL80211_BAND_5GHZ;
|
||||
status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1],
|
||||
status.band);
|
||||
} else {
|
||||
status.band = NL80211_BAND_2GHZ;
|
||||
status.freq = ieee80211_channel_to_frequency(hwch, status.band);
|
||||
}
|
||||
} else {
|
||||
status.band = WCN36XX_BAND(wcn);
|
||||
status.freq = WCN36XX_CENTER_FREQ(wcn);
|
||||
}
|
||||
|
||||
if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) {
|
||||
rate = &wcn36xx_rate_table[bd->rate_id];
|
||||
status.encoding = rate->encoding;
|
||||
status.enc_flags = rate->encoding_flags;
|
||||
status.bw = rate->bw;
|
||||
status.rate_idx = rate->mcs_or_legacy_index;
|
||||
sband = wcn->hw->wiphy->bands[status.band];
|
||||
status.nss = 1;
|
||||
|
||||
if (status.band == NL80211_BAND_5GHZ &&
|
||||
status.encoding == RX_ENC_LEGACY &&
|
||||
status.rate_idx >= sband->n_bitrates) {
|
||||
status.rate_idx >= 4) {
|
||||
/* no dsss rates in 5Ghz rates table */
|
||||
status.rate_idx -= 4;
|
||||
}
|
||||
|
@ -353,22 +368,6 @@ int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
|
|||
ieee80211_is_probe_resp(hdr->frame_control))
|
||||
status.boottime_ns = ktime_get_boottime_ns();
|
||||
|
||||
if (bd->scan_learn) {
|
||||
/* If packet originates from hardware scanning, extract the
|
||||
* band/channel from bd descriptor.
|
||||
*/
|
||||
u8 hwch = (bd->reserved0 << 4) + bd->rx_ch;
|
||||
|
||||
if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) {
|
||||
status.band = NL80211_BAND_5GHZ;
|
||||
status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1],
|
||||
status.band);
|
||||
} else {
|
||||
status.band = NL80211_BAND_2GHZ;
|
||||
status.freq = ieee80211_channel_to_frequency(hwch, status.band);
|
||||
}
|
||||
}
|
||||
|
||||
memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
|
||||
|
||||
if (ieee80211_is_beacon(hdr->frame_control)) {
|
||||
|
|
|
@ -248,6 +248,7 @@ struct wcn36xx {
|
|||
struct cfg80211_scan_request *scan_req;
|
||||
bool sw_scan;
|
||||
u8 sw_scan_opchannel;
|
||||
bool sw_scan_init;
|
||||
u8 sw_scan_channel;
|
||||
struct ieee80211_vif *sw_scan_vif;
|
||||
struct mutex scan_lock;
|
||||
|
|
Loading…
Reference in New Issue