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riscv: dts: microchip: add fpga fabric section to icicle kit 

Split the device tree for the Microchip MPFS into two sections by adding
microchip-mpfs-fabric.dtsi, which contains peripherals contained in the
FPGA fabric.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Conor Dooley 2022-02-14 13:58:37 +00:00 committed by Palmer Dabbelt
parent 6546f92086
commit 72560c6559
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GPG Key ID: EF4CA1502CCBAB41
3 changed files with 34 additions and 0 deletions
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25
arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi Normal file
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@ -0,0 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/ {
core_pwm0: pwm@41000000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x41000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <2>;
clocks = <&clkcfg CLK_FIC3>;
status = "disabled";
};
i2c2: i2c@44000000 {
compatible = "microchip,corei2c-rtl-v7";
reg = <0x0 0x44000000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkcfg CLK_FIC3>;
interrupt-parent = <&plic>;
interrupts = <122>;
clock-frequency = <100000>;
status = "disabled";
};
};

8
arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
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@ -68,6 +68,10 @@
sd-uhs-sdr104;
};
&i2c2 {
status = "okay";
};
&emac0 {
phy-mode = "sgmii";
phy-handle = <&phy0>;
@ -86,3 +90,7 @@
ti,fifo-depth = <0x01>;
};
};
&core_pwm0 {
status = "okay";
};

1
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
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@ -3,6 +3,7 @@
/dts-v1/;
#include "dt-bindings/clock/microchip,mpfs-clock.h"
#include "microchip-mpfs-fabric.dtsi"
/ {
#address-cells = <2>;