Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (134 commits) powerpc/nvram: Enable use Generic NVRAM driver for different size chips powerpc/iseries: Fix oops reading from /proc/iSeries/mf/*/cmdline powerpc/ps3: Workaround for flash memory I/O error powerpc/booke: Don't set DABR on 64-bit BookE, use DAC1 instead powerpc/perf_counters: Reduce stack usage of power_check_constraints powerpc: Fix bug where perf_counters breaks oprofile powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops powerpc/irq: Improve nanodoc powerpc: Fix some late PowerMac G5 with PCIe ATI graphics powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT powerpc/book3e: Add missing page sizes powerpc/pseries: Fix to handle slb resize across migration powerpc/powermac: Thermal control turns system off too eagerly powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan() powerpc/405ex: support cuImage via included dtb powerpc/405ex: provide necessary fixup function to support cuImage powerpc/40x: Add support for the ESTeem 195E (PPC405EP) SBC powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support. powerpc/44x: Update Arches defconfig powerpc/44x: Update Arches dts ... Fix up conflicts in drivers/char/agp/uninorth-agp.c
This commit is contained in:
Linus Torvalds
commit
723e9db7a4
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@ -123,7 +123,8 @@ config PPC
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select HAVE_KRETPROBES
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select HAVE_ARCH_TRACEHOOK
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select HAVE_LMB
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select HAVE_DMA_ATTRS if PPC64
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select HAVE_DMA_ATTRS
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select HAVE_DMA_API_DEBUG
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select USE_GENERIC_SMP_HELPERS if SMP
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select HAVE_OPROFILE
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select HAVE_SYSCALL_WRAPPERS if PPC64
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@ -310,10 +311,6 @@ config SWIOTLB
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platforms where the size of a physical address is larger
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than the bus address. Not all platforms support this.
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config PPC_NEED_DMA_SYNC_OPS
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def_bool y
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depends on (NOT_COHERENT_CACHE || SWIOTLB)
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config HOTPLUG_CPU
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bool "Support for enabling/disabling CPUs"
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depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
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@ -475,7 +472,7 @@ config PPC_16K_PAGES
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bool "16k page size" if 44x
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config PPC_64K_PAGES
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bool "64k page size" if 44x || PPC_STD_MMU_64
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bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
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select PPC_HAS_HASH_64K if PPC_STD_MMU_64
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config PPC_256K_PAGES
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@ -495,16 +492,16 @@ endchoice
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config FORCE_MAX_ZONEORDER
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int "Maximum zone order"
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range 9 64 if PPC_STD_MMU_64 && PPC_64K_PAGES
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default "9" if PPC_STD_MMU_64 && PPC_64K_PAGES
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range 13 64 if PPC_STD_MMU_64 && !PPC_64K_PAGES
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default "13" if PPC_STD_MMU_64 && !PPC_64K_PAGES
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range 9 64 if PPC_STD_MMU_32 && PPC_16K_PAGES
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default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
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range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
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default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
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range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES
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default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES
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range 9 64 if PPC64 && PPC_64K_PAGES
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default "9" if PPC64 && PPC_64K_PAGES
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range 13 64 if PPC64 && !PPC_64K_PAGES
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default "13" if PPC64 && !PPC_64K_PAGES
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range 9 64 if PPC32 && PPC_16K_PAGES
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default "9" if PPC32 && PPC_16K_PAGES
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range 7 64 if PPC32 && PPC_64K_PAGES
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default "7" if PPC32 && PPC_64K_PAGES
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range 5 64 if PPC32 && PPC_256K_PAGES
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default "5" if PPC32 && PPC_256K_PAGES
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range 11 64
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default "11"
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help
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@ -77,7 +77,7 @@ CPP = $(CC) -E $(KBUILD_CFLAGS)
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CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__
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ifeq ($(CONFIG_PPC64),y)
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GCC_BROKEN_VEC := $(shell if [ $(call cc-version) -lt 0400 ] ; then echo "y"; fi)
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GCC_BROKEN_VEC := $(call cc-ifversion, -lt, 0400, y)
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ifeq ($(CONFIG_POWER4_ONLY),y)
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ifeq ($(CONFIG_ALTIVEC),y)
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@ -8,6 +8,10 @@
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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* Copyright (c) 2003, 2004 Zultys Technologies
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*
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* Copyright (C) 2009 Wind River Systems, Inc.
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* Updated for supporting PPC405EX on Kilauea.
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* Tiejun Chen <tiejun.chen@windriver.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
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@ -659,3 +663,141 @@ void ibm405ep_fixup_clocks(unsigned int sys_clk)
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dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
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dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
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}
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static u8 ibm405ex_fwdv_multi_bits[] = {
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/* values for: 1 - 16 */
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0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05,
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0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03
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};
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u32 ibm405ex_get_fwdva(unsigned long cpr_fwdv)
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{
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u32 index;
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for (index = 0; index < ARRAY_SIZE(ibm405ex_fwdv_multi_bits); index++)
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if (cpr_fwdv == (u32)ibm405ex_fwdv_multi_bits[index])
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return index + 1;
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return 0;
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}
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static u8 ibm405ex_fbdv_multi_bits[] = {
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/* values for: 1 - 100 */
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0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4,
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0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb,
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0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96,
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0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde,
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0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb,
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0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91,
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0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b,
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0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95,
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0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4,
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0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc,
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/* values for: 101 - 200 */
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0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
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0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
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0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
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||||
0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
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0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
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0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,
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0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6,
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0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9,
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0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e,
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0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf,
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||||
/* values for: 201 - 255 */
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0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae,
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0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2,
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0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2,
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0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98,
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0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81,
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0x03, 0x87, 0x0f, 0x9f, 0x3f /* END */
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};
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u32 ibm405ex_get_fbdv(unsigned long cpr_fbdv)
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||||
{
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u32 index;
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|
||||
for (index = 0; index < ARRAY_SIZE(ibm405ex_fbdv_multi_bits); index++)
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if (cpr_fbdv == (u32)ibm405ex_fbdv_multi_bits[index])
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return index + 1;
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return 0;
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}
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|
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void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk)
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{
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/* PLL config */
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u32 pllc = CPR0_READ(DCRN_CPR0_PLLC);
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u32 plld = CPR0_READ(DCRN_CPR0_PLLD);
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u32 cpud = CPR0_READ(DCRN_CPR0_PRIMAD);
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u32 plbd = CPR0_READ(DCRN_CPR0_PRIMBD);
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u32 opbd = CPR0_READ(DCRN_CPR0_OPBD);
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u32 perd = CPR0_READ(DCRN_CPR0_PERD);
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/* Dividers */
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u32 fbdv = ibm405ex_get_fbdv(__fix_zero((plld >> 24) & 0xff, 1));
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u32 fwdva = ibm405ex_get_fwdva(__fix_zero((plld >> 16) & 0x0f, 1));
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u32 cpudv0 = __fix_zero((cpud >> 24) & 7, 8);
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/* PLBDV0 is hardwared to 010. */
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u32 plbdv0 = 2;
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u32 plb2xdv0 = __fix_zero((plbd >> 16) & 7, 8);
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u32 opbdv0 = __fix_zero((opbd >> 24) & 3, 4);
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u32 perdv0 = __fix_zero((perd >> 24) & 3, 4);
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/* Resulting clocks */
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u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1;
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|
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/* PLL's VCO is the source for primary forward ? */
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if (pllc & 0x40000000) {
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u32 m;
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|
||||
/* Feedback path */
|
||||
switch ((pllc >> 24) & 7) {
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||||
case 0:
|
||||
/* PLLOUTx */
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m = fbdv;
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break;
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case 1:
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||||
/* CPU */
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m = fbdv * fwdva * cpudv0;
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break;
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case 5:
|
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/* PERClk */
|
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m = fbdv * fwdva * plb2xdv0 * plbdv0 * opbdv0 * perdv0;
|
||||
break;
|
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default:
|
||||
printf("WARNING ! Invalid PLL feedback source !\n");
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||||
goto bypass;
|
||||
}
|
||||
|
||||
vco = (unsigned int)(sys_clk * m);
|
||||
} else {
|
||||
bypass:
|
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/* Bypass system PLL */
|
||||
vco = 0;
|
||||
}
|
||||
|
||||
/* CPU = VCO / ( FWDVA x CPUDV0) */
|
||||
cpu = vco / (fwdva * cpudv0);
|
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/* PLB = VCO / ( FWDVA x PLB2XDV0 x PLBDV0) */
|
||||
plb = vco / (fwdva * plb2xdv0 * plbdv0);
|
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/* OPB = PLB / OPBDV0 */
|
||||
opb = plb / opbdv0;
|
||||
/* EBC = OPB / PERDV0 */
|
||||
ebc = opb / perdv0;
|
||||
|
||||
tb = cpu;
|
||||
uart0 = uart1 = uart_clk;
|
||||
|
||||
dt_fixup_cpu_clocks(cpu, tb, 0);
|
||||
dt_fixup_clock("/plb", plb);
|
||||
dt_fixup_clock("/plb/opb", opb);
|
||||
dt_fixup_clock("/plb/opb/ebc", ebc);
|
||||
dt_fixup_clock("/plb/opb/serial@ef600200", uart0);
|
||||
dt_fixup_clock("/plb/opb/serial@ef600300", uart1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc);
|
|||
|
||||
void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
|
||||
void ibm405ep_fixup_clocks(unsigned int sys_clk);
|
||||
void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk);
|
||||
void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
|
||||
void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
|
||||
unsigned int tmr_clk);
|
||||
|
|
|
|||
|
|
@ -39,6 +39,7 @@ DTS_FLAGS ?= -p 1024
|
|||
|
||||
$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
|
||||
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
|
||||
$(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -mcpu=405
|
||||
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
|
||||
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
|
||||
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
|
||||
|
|
@ -67,7 +68,7 @@ src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
|
|||
cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
|
||||
fsl-soc.c mpc8xx.c pq2.c
|
||||
src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
|
||||
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
|
||||
cuboot-ebony.c cuboot-hotfoot.c treeboot-ebony.c prpmc2800.c \
|
||||
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
|
||||
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
|
||||
cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
|
||||
|
|
@ -75,7 +76,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
|
|||
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
|
||||
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
|
||||
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
|
||||
cuboot-acadia.c cuboot-amigaone.c
|
||||
cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
|
||||
src-boot := $(src-wlib) $(src-plat) empty.c
|
||||
|
||||
src-boot := $(addprefix $(obj)/, $(src-boot))
|
||||
|
|
@ -190,6 +191,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
|
|||
|
||||
# Board ports in arch/powerpc/platform/40x/Kconfig
|
||||
image-$(CONFIG_EP405) += dtbImage.ep405
|
||||
image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
|
||||
image-$(CONFIG_WALNUT) += treeImage.walnut
|
||||
image-$(CONFIG_ACADIA) += cuImage.acadia
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,142 @@
|
|||
/*
|
||||
* Old U-boot compatibility for Esteem 195E Hotfoot CPU Board
|
||||
*
|
||||
* Author: Solomon Peachy <solomon@linux-wlan.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "ops.h"
|
||||
#include "stdio.h"
|
||||
#include "reg.h"
|
||||
#include "dcr.h"
|
||||
#include "4xx.h"
|
||||
#include "cuboot.h"
|
||||
|
||||
#define TARGET_4xx
|
||||
#define TARGET_HOTFOOT
|
||||
|
||||
#include "ppcboot-hotfoot.h"
|
||||
|
||||
static bd_t bd;
|
||||
|
||||
#define NUM_REGS 3
|
||||
|
||||
static void hotfoot_fixups(void)
|
||||
{
|
||||
u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f;
|
||||
|
||||
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
|
||||
|
||||
dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0);
|
||||
dt_fixup_clock("/plb", bd.bi_plb_busfreq);
|
||||
dt_fixup_clock("/plb/opb", bd.bi_opbfreq);
|
||||
dt_fixup_clock("/plb/ebc", bd.bi_pci_busfreq);
|
||||
dt_fixup_clock("/plb/opb/serial@ef600300", bd.bi_procfreq / uart);
|
||||
dt_fixup_clock("/plb/opb/serial@ef600400", bd.bi_procfreq / uart);
|
||||
|
||||
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
|
||||
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
|
||||
|
||||
/* Is this a single eth/serial board? */
|
||||
if ((bd.bi_enet1addr[0] == 0) &&
|
||||
(bd.bi_enet1addr[1] == 0) &&
|
||||
(bd.bi_enet1addr[2] == 0) &&
|
||||
(bd.bi_enet1addr[3] == 0) &&
|
||||
(bd.bi_enet1addr[4] == 0) &&
|
||||
(bd.bi_enet1addr[5] == 0)) {
|
||||
void *devp;
|
||||
|
||||
printf("Trimming devtree for single serial/eth board\n");
|
||||
|
||||
devp = finddevice("/plb/opb/serial@ef600300");
|
||||
if (!devp)
|
||||
fatal("Can't find node for /plb/opb/serial@ef600300");
|
||||
del_node(devp);
|
||||
|
||||
devp = finddevice("/plb/opb/ethernet@ef600900");
|
||||
if (!devp)
|
||||
fatal("Can't find node for /plb/opb/ethernet@ef600900");
|
||||
del_node(devp);
|
||||
}
|
||||
|
||||
ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900);
|
||||
|
||||
/* Fix up flash size in fdt for 4M boards. */
|
||||
if (bd.bi_flashsize < 0x800000) {
|
||||
u32 regs[NUM_REGS];
|
||||
void *devp = finddevice("/plb/ebc/nor_flash@0");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for nor_flash!??");
|
||||
|
||||
printf("Fixing devtree for 4M Flash\n");
|
||||
|
||||
/* First fix up the base addresse */
|
||||
getprop(devp, "reg", regs, sizeof(regs));
|
||||
regs[0] = 0;
|
||||
regs[1] = 0xffc00000;
|
||||
regs[2] = 0x00400000;
|
||||
setprop(devp, "reg", regs, sizeof(regs));
|
||||
|
||||
/* Then the offsets */
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@0");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@0");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@1");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@1");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@2");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@2");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@3");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@3");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@4");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@4");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@6");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@6");
|
||||
getprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
regs[0] -= 0x400000;
|
||||
setprop(devp, "reg", regs, 2*sizeof(u32));
|
||||
|
||||
/* Delete the FeatFS node */
|
||||
devp = finddevice("/plb/ebc/nor_flash@0/partition@5");
|
||||
if (!devp)
|
||||
fatal("Can't find FDT node for partition@5");
|
||||
del_node(devp);
|
||||
}
|
||||
}
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
CUBOOT_INIT();
|
||||
platform_ops.fixups = hotfoot_fixups;
|
||||
platform_ops.exit = ibm40x_dbcr_reset;
|
||||
fdt_init(_dtb_start);
|
||||
serial_console_init();
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* Old U-boot compatibility for PPC405EX. This image is already included
|
||||
* a dtb.
|
||||
*
|
||||
* Author: Tiejun Chen <tiejun.chen@windriver.com>
|
||||
*
|
||||
* Copyright (C) 2009 Wind River Systems, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "ops.h"
|
||||
#include "io.h"
|
||||
#include "dcr.h"
|
||||
#include "stdio.h"
|
||||
#include "4xx.h"
|
||||
#include "44x.h"
|
||||
#include "cuboot.h"
|
||||
|
||||
#define TARGET_4xx
|
||||
#define TARGET_44x
|
||||
#include "ppcboot.h"
|
||||
|
||||
#define KILAUEA_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
|
||||
|
||||
static bd_t bd;
|
||||
|
||||
static void kilauea_fixups(void)
|
||||
{
|
||||
unsigned long sysclk = 33333333;
|
||||
|
||||
ibm405ex_fixup_clocks(sysclk, KILAUEA_SYS_EXT_SERIAL_CLOCK);
|
||||
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
|
||||
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
|
||||
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
|
||||
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
|
||||
}
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
CUBOOT_INIT();
|
||||
platform_ops.fixups = kilauea_fixups;
|
||||
platform_ops.exit = ibm40x_dbcr_reset;
|
||||
fdt_init(_dtb_start);
|
||||
serial_console_init();
|
||||
}
|
||||
|
|
@ -153,9 +153,7 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
|
|||
#define DCRN_CPC0_PLLMR1 0xf4
|
||||
#define DCRN_CPC0_UCR 0xf5
|
||||
|
||||
/* 440GX Clock control etc */
|
||||
|
||||
|
||||
/* 440GX/405EX Clock Control reg */
|
||||
#define DCRN_CPR0_CLKUPD 0x020
|
||||
#define DCRN_CPR0_PLLC 0x040
|
||||
#define DCRN_CPR0_PLLD 0x060
|
||||
|
|
|
|||
|
|
@ -124,6 +124,16 @@
|
|||
dcr-reg = <0x00c 0x002>;
|
||||
};
|
||||
|
||||
L2C0: l2c {
|
||||
compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
|
||||
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
|
||||
0x030 0x008>; /* L2 cache DCR's */
|
||||
cache-line-size = <32>; /* 32 bytes */
|
||||
cache-size = <262144>; /* L2, 256K */
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = <11 1>;
|
||||
};
|
||||
|
||||
plb {
|
||||
compatible = "ibm,plb-460gt", "ibm,plb4";
|
||||
#address-cells = <2>;
|
||||
|
|
@ -168,6 +178,38 @@
|
|||
/* ranges property is supplied by U-Boot */
|
||||
interrupts = <0x6 0x4>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
|
||||
nor_flash@0,0 {
|
||||
compatible = "amd,s29gl256n", "cfi-flash";
|
||||
bank-width = <2>;
|
||||
reg = <0x00000000 0x00000000 0x02000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x001e0000>;
|
||||
};
|
||||
partition@1e0000 {
|
||||
label = "dtb";
|
||||
reg = <0x001e0000 0x00020000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "root";
|
||||
reg = <0x00200000 0x00200000>;
|
||||
};
|
||||
partition@400000 {
|
||||
label = "user";
|
||||
reg = <0x00400000 0x01b60000>;
|
||||
};
|
||||
partition@1f60000 {
|
||||
label = "env";
|
||||
reg = <0x01f60000 0x00040000>;
|
||||
};
|
||||
partition@1fa0000 {
|
||||
label = "u-boot";
|
||||
reg = <0x01fa0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600300 {
|
||||
|
|
@ -186,6 +228,14 @@
|
|||
reg = <0xef600700 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
sttm@4a {
|
||||
compatible = "ad,ad7414";
|
||||
reg = <0x4a>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = <0x0 0x8>;
|
||||
};
|
||||
};
|
||||
|
||||
IIC1: i2c@ef600800 {
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Device Tree Source for AMCC Canyonlands (460EX)
|
||||
*
|
||||
* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
* Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
|
|
@ -149,19 +149,19 @@
|
|||
/*RXDE*/ 0x5 0x4>;
|
||||
};
|
||||
|
||||
USB0: ehci@bffd0400 {
|
||||
compatible = "ibm,usb-ehci-460ex", "usb-ehci";
|
||||
interrupt-parent = <&UIC2>;
|
||||
interrupts = <0x1d 4>;
|
||||
reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
|
||||
};
|
||||
USB0: ehci@bffd0400 {
|
||||
compatible = "ibm,usb-ehci-460ex", "usb-ehci";
|
||||
interrupt-parent = <&UIC2>;
|
||||
interrupts = <0x1d 4>;
|
||||
reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
|
||||
};
|
||||
|
||||
USB1: usb@bffd0000 {
|
||||
compatible = "ohci-le";
|
||||
reg = <4 0xbffd0000 0x60>;
|
||||
interrupt-parent = <&UIC2>;
|
||||
interrupts = <0x1e 4>;
|
||||
};
|
||||
USB1: usb@bffd0000 {
|
||||
compatible = "ohci-le";
|
||||
reg = <4 0xbffd0000 0x60>;
|
||||
interrupt-parent = <&UIC2>;
|
||||
interrupts = <0x1e 4>;
|
||||
};
|
||||
|
||||
POB0: opb {
|
||||
compatible = "ibm,opb-460ex", "ibm,opb";
|
||||
|
|
@ -215,6 +215,29 @@
|
|||
reg = <0x03fa0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
|
||||
ndfc@3,0 {
|
||||
compatible = "ibm,ndfc";
|
||||
reg = <0x00000003 0x00000000 0x00002000>;
|
||||
ccr = <0x00001000>;
|
||||
bank-settings = <0x80002222>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "user";
|
||||
reg = <0x00000000 0x03f00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600300 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,421 @@
|
|||
/*
|
||||
* Device Tree Source for AMCC (AppliedMicro) Eiger(460SX)
|
||||
*
|
||||
* Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
model = "amcc,eiger";
|
||||
compatible = "amcc,eiger";
|
||||
dcr-parent = <&{/cpus/cpu@0}>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &EMAC0;
|
||||
ethernet1 = &EMAC1;
|
||||
ethernet2 = &EMAC2;
|
||||
ethernet3 = &EMAC3;
|
||||
serial0 = &UART0;
|
||||
serial1 = &UART1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
model = "PowerPC,460SX";
|
||||
reg = <0x00000000>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
timebase-frequency = <0>; /* Filled in by U-Boot */
|
||||
i-cache-line-size = <32>;
|
||||
d-cache-line-size = <32>;
|
||||
i-cache-size = <32768>;
|
||||
d-cache-size = <32768>;
|
||||
dcr-controller;
|
||||
dcr-access-method = "native";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
|
||||
};
|
||||
|
||||
UIC0: interrupt-controller0 {
|
||||
compatible = "ibm,uic-460sx","ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <0>;
|
||||
dcr-reg = <0x0c0 0x009>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
UIC1: interrupt-controller1 {
|
||||
compatible = "ibm,uic-460sx","ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <1>;
|
||||
dcr-reg = <0x0d0 0x009>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
|
||||
interrupt-parent = <&UIC0>;
|
||||
};
|
||||
|
||||
UIC2: interrupt-controller2 {
|
||||
compatible = "ibm,uic-460sx","ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <2>;
|
||||
dcr-reg = <0x0e0 0x009>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
|
||||
interrupt-parent = <&UIC0>;
|
||||
};
|
||||
|
||||
UIC3: interrupt-controller3 {
|
||||
compatible = "ibm,uic-460sx","ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <3>;
|
||||
dcr-reg = <0x0f0 0x009>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
|
||||
interrupt-parent = <&UIC0>;
|
||||
};
|
||||
|
||||
SDR0: sdr {
|
||||
compatible = "ibm,sdr-460sx";
|
||||
dcr-reg = <0x00e 0x002>;
|
||||
};
|
||||
|
||||
CPR0: cpr {
|
||||
compatible = "ibm,cpr-460sx";
|
||||
dcr-reg = <0x00c 0x002>;
|
||||
};
|
||||
|
||||
plb {
|
||||
compatible = "ibm,plb-460sx", "ibm,plb4";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
|
||||
SDRAM0: sdram {
|
||||
compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
|
||||
dcr-reg = <0x010 0x002>;
|
||||
};
|
||||
|
||||
MAL0: mcmal {
|
||||
compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
|
||||
dcr-reg = <0x180 0x62>;
|
||||
num-tx-chans = <4>;
|
||||
num-rx-chans = <32>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = < /*TXEOB*/ 0x6 0x4
|
||||
/*RXEOB*/ 0x7 0x4
|
||||
/*SERR*/ 0x1 0x4
|
||||
/*TXDE*/ 0x2 0x4
|
||||
/*RXDE*/ 0x3 0x4
|
||||
/*COAL TX0*/ 0x18 0x2
|
||||
/*COAL TX1*/ 0x19 0x2
|
||||
/*COAL TX2*/ 0x1a 0x2
|
||||
/*COAL TX3*/ 0x1b 0x2
|
||||
/*COAL RX0*/ 0x1c 0x2
|
||||
/*COAL RX1*/ 0x1d 0x2
|
||||
/*COAL RX2*/ 0x1e 0x2
|
||||
/*COAL RX3*/ 0x1f 0x2>;
|
||||
};
|
||||
|
||||
POB0: opb {
|
||||
compatible = "ibm,opb-460sx", "ibm,opb";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
|
||||
EBC0: ebc {
|
||||
compatible = "ibm,ebc-460sx", "ibm,ebc";
|
||||
dcr-reg = <0x012 0x002>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
/* ranges property is supplied by U-Boot */
|
||||
interrupts = <0x6 0x4>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
|
||||
nor_flash@0,0 {
|
||||
compatible = "amd,s29gl512n", "cfi-flash";
|
||||
bank-width = <2>;
|
||||
/* reg property is supplied in by U-Boot */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x001e0000>;
|
||||
};
|
||||
partition@1e0000 {
|
||||
label = "dtb";
|
||||
reg = <0x001e0000 0x00020000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "ramdisk";
|
||||
reg = <0x00200000 0x01400000>;
|
||||
};
|
||||
partition@1600000 {
|
||||
label = "jffs2";
|
||||
reg = <0x01600000 0x00400000>;
|
||||
};
|
||||
partition@1a00000 {
|
||||
label = "user";
|
||||
reg = <0x01a00000 0x02560000>;
|
||||
};
|
||||
partition@3f60000 {
|
||||
label = "env";
|
||||
reg = <0x03f60000 0x00040000>;
|
||||
};
|
||||
partition@3fa0000 {
|
||||
label = "u-boot";
|
||||
reg = <0x03fa0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
|
||||
ndfc@1,0 {
|
||||
compatible = "ibm,ndfc";
|
||||
/* reg property is supplied by U-boot */
|
||||
ccr = <0x00003000>;
|
||||
bank-settings = <0x80002222>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
reg = <0x00000000 0x00200000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "uboot-environment";
|
||||
reg = <0x00200000 0x00100000>;
|
||||
};
|
||||
partition@300000 {
|
||||
label = "linux";
|
||||
reg = <0x00300000 0x00300000>;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "root-file-system";
|
||||
reg = <0x00600000 0x01900000>;
|
||||
};
|
||||
partition@1f00000 {
|
||||
label = "device-tree";
|
||||
reg = <0x01f00000 0x00020000>;
|
||||
};
|
||||
partition@1f20000 {
|
||||
label = "data";
|
||||
reg = <0x01f20000 0x060E0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600200 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600200 0x00000008>;
|
||||
virtual-reg = <0xef600200>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
current-speed = <0>; /* Filled in by U-Boot */
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x0 0x4>;
|
||||
};
|
||||
|
||||
UART1: serial@ef600300 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600300 0x00000008>;
|
||||
virtual-reg = <0xef600300>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
current-speed = <0>; /* Filled in by U-Boot */
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x1 0x4>;
|
||||
};
|
||||
|
||||
IIC0: i2c@ef600400 {
|
||||
compatible = "ibm,iic-460sx", "ibm,iic";
|
||||
reg = <0xef600400 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
index = <0>;
|
||||
};
|
||||
|
||||
IIC1: i2c@ef600500 {
|
||||
compatible = "ibm,iic-460sx", "ibm,iic";
|
||||
reg = <0xef600500 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x3 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
index = <1>;
|
||||
};
|
||||
|
||||
RGMII0: emac-rgmii@ef600900 {
|
||||
compatible = "ibm,rgmii-460sx", "ibm,rgmii";
|
||||
reg = <0xef600900 0x00000008>;
|
||||
has-mdio;
|
||||
};
|
||||
|
||||
RGMII1: emac-rgmii@ef600920 {
|
||||
compatible = "ibm,rgmii-460sx", "ibm,rgmii";
|
||||
reg = <0xef600920 0x00000008>;
|
||||
has-mdio;
|
||||
};
|
||||
|
||||
TAH0: emac-tah@ef600e50 {
|
||||
compatible = "ibm,tah-460sx", "ibm,tah";
|
||||
reg = <0xef600e50 0x00000030>;
|
||||
};
|
||||
|
||||
TAH1: emac-tah@ef600f50 {
|
||||
compatible = "ibm,tah-460sx", "ibm,tah";
|
||||
reg = <0xef600f50 0x00000030>;
|
||||
};
|
||||
|
||||
EMAC0: ethernet@ef600a00 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460sx", "ibm,emac4";
|
||||
interrupt-parent = <&EMAC0>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
|
||||
reg = <0xef600a00 0x00000070>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <0>;
|
||||
mal-rx-channel = <0>;
|
||||
cell-index = <0>;
|
||||
max-frame-size = <9000>;
|
||||
rx-fifo-size = <4096>;
|
||||
tx-fifo-size = <2048>;
|
||||
phy-mode = "rgmii";
|
||||
phy-map = <0x00000000>;
|
||||
rgmii-device = <&RGMII0>;
|
||||
rgmii-channel = <0>;
|
||||
tah-device = <&TAH0>;
|
||||
tah-channel = <0>;
|
||||
has-inverted-stacr-oc;
|
||||
has-new-stacr-staopc;
|
||||
};
|
||||
|
||||
EMAC1: ethernet@ef600b00 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460sx", "ibm,emac4";
|
||||
interrupt-parent = <&EMAC1>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
|
||||
reg = <0xef600b00 0x00000070>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <1>;
|
||||
mal-rx-channel = <8>;
|
||||
cell-index = <1>;
|
||||
max-frame-size = <9000>;
|
||||
rx-fifo-size = <4096>;
|
||||
tx-fifo-size = <2048>;
|
||||
phy-mode = "rgmii";
|
||||
phy-map = <0x00000000>;
|
||||
rgmii-device = <&RGMII0>;
|
||||
rgmii-channel = <1>;
|
||||
tah-device = <&TAH1>;
|
||||
tah-channel = <1>;
|
||||
has-inverted-stacr-oc;
|
||||
has-new-stacr-staopc;
|
||||
mdio-device = <&EMAC0>;
|
||||
};
|
||||
|
||||
EMAC2: ethernet@ef600c00 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460sx", "ibm,emac4";
|
||||
interrupt-parent = <&EMAC2>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC0 0x15 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
|
||||
reg = <0xef600c00 0x00000070>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <2>;
|
||||
mal-rx-channel = <16>;
|
||||
cell-index = <2>;
|
||||
max-frame-size = <9000>;
|
||||
rx-fifo-size = <4096>;
|
||||
tx-fifo-size = <2048>;
|
||||
phy-mode = "rgmii";
|
||||
phy-map = <0x00000000>;
|
||||
rgmii-device = <&RGMII1>;
|
||||
rgmii-channel = <0>;
|
||||
has-inverted-stacr-oc;
|
||||
has-new-stacr-staopc;
|
||||
mdio-device = <&EMAC0>;
|
||||
};
|
||||
|
||||
EMAC3: ethernet@ef600d00 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460sx", "ibm,emac4";
|
||||
interrupt-parent = <&EMAC3>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC0 0x16 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
|
||||
reg = <0xef600d00 0x00000070>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <3>;
|
||||
mal-rx-channel = <24>;
|
||||
cell-index = <3>;
|
||||
max-frame-size = <9000>;
|
||||
rx-fifo-size = <4096>;
|
||||
tx-fifo-size = <2048>;
|
||||
phy-mode = "rgmii";
|
||||
phy-map = <0x00000000>;
|
||||
rgmii-device = <&RGMII1>;
|
||||
rgmii-channel = <1>;
|
||||
has-inverted-stacr-oc;
|
||||
has-new-stacr-staopc;
|
||||
mdio-device = <&EMAC0>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
chosen {
|
||||
linux,stdout-path = "/plb/opb/serial@ef600200";
|
||||
};
|
||||
|
||||
};
|
||||
|
|
@ -83,34 +83,34 @@
|
|||
|
||||
/* flash@0,0 is a mirror of part of the memory in flash@1,0
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x01000000>;
|
||||
compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
|
||||
reg = <0x0 0x0 0x01000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x00000000 0x01000000>;
|
||||
reg = <0x0 0x01000000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
*/
|
||||
|
||||
flash@1,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <1 0 0x8000000>;
|
||||
compatible = "gef,sbc310-paged-flash", "cfi-flash";
|
||||
reg = <0x1 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "user";
|
||||
reg = <0x00000000 0x07800000>;
|
||||
reg = <0x0 0x7800000>;
|
||||
};
|
||||
partition@7800000 {
|
||||
label = "firmware";
|
||||
reg = <0x07800000 0x00800000>;
|
||||
reg = <0x7800000 0x800000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
|
@ -121,18 +121,16 @@
|
|||
};
|
||||
|
||||
wdt@4,2000 {
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "watchdog";
|
||||
compatible = "gef,fpga-wdt";
|
||||
compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
|
||||
"gef,fpga-wdt";
|
||||
reg = <0x4 0x2000 0x8>;
|
||||
interrupts = <0x1a 0x4>;
|
||||
interrupt-parent = <&gef_pic>;
|
||||
};
|
||||
/*
|
||||
wdt@4,2010 {
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "watchdog";
|
||||
compatible = "gef,fpga-wdt";
|
||||
compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
|
||||
"gef,fpga-wdt";
|
||||
reg = <0x4 0x2010 0x8>;
|
||||
interrupts = <0x1b 0x4>;
|
||||
interrupt-parent = <&gef_pic>;
|
||||
|
|
@ -141,7 +139,7 @@
|
|||
gef_pic: pic@4,4000 {
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
compatible = "gef,fpga-pic";
|
||||
compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic";
|
||||
reg = <0x4 0x4000 0x20>;
|
||||
interrupts = <0x8
|
||||
0x9>;
|
||||
|
|
@ -161,7 +159,7 @@
|
|||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
compatible = "fsl,mpc8641-soc", "simple-bus";
|
||||
ranges = <0x0 0xfef00000 0x00100000>;
|
||||
bus-frequency = <33333333>;
|
||||
|
||||
|
|
@ -376,4 +374,40 @@
|
|||
0x0 0x00400000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fef09000 {
|
||||
compatible = "fsl,mpc8641-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xfef09000 0x1000>;
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
|
||||
0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x19 0x2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
0x0000 0x0 0x0 0x1 &mpic 0x4 0x2
|
||||
0x0000 0x0 0x0 0x2 &mpic 0x5 0x2
|
||||
0x0000 0x0 0x0 0x3 &mpic 0x6 0x2
|
||||
0x0000 0x0 0x0 0x4 &mpic 0x7 0x2
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0x0 0xc0000000
|
||||
0x02000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x01000000 0x0 0x00000000
|
||||
0x01000000 0x0 0x00000000
|
||||
0x0 0x00400000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,294 @@
|
|||
/*
|
||||
* Device Tree Source for ESTeem 195E Hotfoot
|
||||
*
|
||||
* Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "est,hotfoot";
|
||||
compatible = "est,hotfoot";
|
||||
dcr-parent = <&{/cpus/cpu@0}>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &EMAC0;
|
||||
ethernet1 = &EMAC1;
|
||||
serial0 = &UART0;
|
||||
serial1 = &UART1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
model = "PowerPC,405EP";
|
||||
reg = <0x00000000>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
timebase-frequency = <0>; /* Filled in by zImage */
|
||||
i-cache-line-size = <0x20>;
|
||||
d-cache-line-size = <0x20>;
|
||||
i-cache-size = <0x4000>;
|
||||
d-cache-size = <0x4000>;
|
||||
dcr-controller;
|
||||
dcr-access-method = "native";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000>; /* Filled in by zImage */
|
||||
};
|
||||
|
||||
UIC0: interrupt-controller {
|
||||
compatible = "ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <0>;
|
||||
dcr-reg = <0x0c0 0x009>;
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
plb {
|
||||
compatible = "ibm,plb3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
|
||||
SDRAM0: memory-controller {
|
||||
compatible = "ibm,sdram-405ep";
|
||||
dcr-reg = <0x010 0x002>;
|
||||
};
|
||||
|
||||
MAL: mcmal {
|
||||
compatible = "ibm,mcmal-405ep", "ibm,mcmal";
|
||||
dcr-reg = <0x180 0x062>;
|
||||
num-tx-chans = <4>;
|
||||
num-rx-chans = <2>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <
|
||||
0xb 0x4 /* TXEOB */
|
||||
0xc 0x4 /* RXEOB */
|
||||
0xa 0x4 /* SERR */
|
||||
0xd 0x4 /* TXDE */
|
||||
0xe 0x4 /* RXDE */>;
|
||||
};
|
||||
|
||||
POB0: opb {
|
||||
compatible = "ibm,opb-405ep", "ibm,opb";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0xef600000 0xef600000 0x00a00000>;
|
||||
dcr-reg = <0x0a0 0x005>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
|
||||
/* Hotfoot has UART0/UART1 swapped */
|
||||
|
||||
UART0: serial@ef600400 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600400 0x00000008>;
|
||||
virtual-reg = <0xef600400>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
current-speed = <0x9600>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x1 0x4>;
|
||||
};
|
||||
|
||||
UART1: serial@ef600300 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600300 0x00000008>;
|
||||
virtual-reg = <0xef600300>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
current-speed = <0x9600>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x0 0x4>;
|
||||
};
|
||||
|
||||
IIC: i2c@ef600500 {
|
||||
compatible = "ibm,iic-405ep", "ibm,iic";
|
||||
reg = <0xef600500 0x00000011>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
|
||||
rtc@68 {
|
||||
/* Actually a DS1339 */
|
||||
compatible = "dallas,ds1307";
|
||||
reg = <0x68>;
|
||||
};
|
||||
|
||||
temp@4a {
|
||||
/* Not present on all boards */
|
||||
compatible = "national,lm75";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
};
|
||||
|
||||
GPIO: gpio@ef600700 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "ibm,ppc4xx-gpio";
|
||||
reg = <0xef600700 0x00000020>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
status {
|
||||
label = "Status";
|
||||
gpios = <&GPIO 1 0>;
|
||||
};
|
||||
radiorx {
|
||||
label = "Rx";
|
||||
gpios = <&GPIO 0xe 0>;
|
||||
};
|
||||
};
|
||||
|
||||
EMAC0: ethernet@ef600800 {
|
||||
linux,network-index = <0x0>;
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-405ep", "ibm,emac";
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <
|
||||
0xf 0x4 /* Ethernet */
|
||||
0x9 0x4 /* Ethernet Wake Up */>;
|
||||
local-mac-address = [000000000000]; /* Filled in by zImage */
|
||||
reg = <0xef600800 0x00000070>;
|
||||
mal-device = <&MAL>;
|
||||
mal-tx-channel = <0>;
|
||||
mal-rx-channel = <0>;
|
||||
cell-index = <0>;
|
||||
max-frame-size = <0x5dc>;
|
||||
rx-fifo-size = <0x1000>;
|
||||
tx-fifo-size = <0x800>;
|
||||
phy-mode = "mii";
|
||||
phy-map = <0x00000000>;
|
||||
};
|
||||
|
||||
EMAC1: ethernet@ef600900 {
|
||||
linux,network-index = <0x1>;
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-405ep", "ibm,emac";
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <
|
||||
0x11 0x4 /* Ethernet */
|
||||
0x9 0x4 /* Ethernet Wake Up */>;
|
||||
local-mac-address = [000000000000]; /* Filled in by zImage */
|
||||
reg = <0xef600900 0x00000070>;
|
||||
mal-device = <&MAL>;
|
||||
mal-tx-channel = <2>;
|
||||
mal-rx-channel = <1>;
|
||||
cell-index = <1>;
|
||||
max-frame-size = <0x5dc>;
|
||||
rx-fifo-size = <0x1000>;
|
||||
tx-fifo-size = <0x800>;
|
||||
mdio-device = <&EMAC0>;
|
||||
phy-mode = "mii";
|
||||
phy-map = <0x0000001>;
|
||||
};
|
||||
};
|
||||
|
||||
EBC0: ebc {
|
||||
compatible = "ibm,ebc-405ep", "ibm,ebc";
|
||||
dcr-reg = <0x012 0x002>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* The ranges property is supplied by the bootwrapper
|
||||
* and is based on the firmware's configuration of the
|
||||
* EBC bridge
|
||||
*/
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
|
||||
nor_flash@0 {
|
||||
compatible = "cfi-flash";
|
||||
bank-width = <2>;
|
||||
reg = <0x0 0xff800000 0x00800000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* This mapping is for the 8M flash
|
||||
4M flash has all ofssets -= 4M,
|
||||
and FeatFS partition is not present */
|
||||
partition@0 {
|
||||
label = "Bootloader";
|
||||
reg = <0x7c0000 0x40000>;
|
||||
/* read-only; */
|
||||
};
|
||||
partition@1 {
|
||||
label = "Env_and_Config_Primary";
|
||||
reg = <0x400000 0x10000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "Kernel";
|
||||
reg = <0x420000 0x100000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "Filesystem";
|
||||
reg = <0x520000 0x2a0000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "Env_and_Config_Secondary";
|
||||
reg = <0x410000 0x10000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "FeatFS";
|
||||
reg = <0x000000 0x400000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "Bootloader_Env";
|
||||
reg = <0x7d0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
PCI0: pci@ec000000 {
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
|
||||
primary;
|
||||
reg = <0xeec00000 0x00000008 /* Config space access */
|
||||
0xeed80000 0x00000004 /* IACK */
|
||||
0xeed80000 0x00000004 /* Special cycle */
|
||||
0xef480000 0x00000040>; /* Internal registers */
|
||||
|
||||
/* Outbound ranges, one memory and one IO,
|
||||
* later cannot be changed. Chip supports a second
|
||||
* IO range but we don't use it for now
|
||||
*/
|
||||
ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
|
||||
0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
|
||||
|
||||
/* Inbound 2GB range starting at 0 */
|
||||
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
|
||||
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
|
||||
0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
|
||||
0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
|
||||
|
||||
/* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
|
||||
0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
|
||||
0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = &UART0;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Device Tree Source for AMCC Kilauea (405EX)
|
||||
*
|
||||
* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
* Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
|
|
@ -150,7 +150,11 @@
|
|||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x00200000>;
|
||||
reg = <0x00000000 0x001e0000>;
|
||||
};
|
||||
partition@1e0000 {
|
||||
label = "dtb";
|
||||
reg = <0x001e0000 0x00020000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "root";
|
||||
|
|
@ -169,6 +173,29 @@
|
|||
reg = <0x03fa0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
|
||||
ndfc@1,0 {
|
||||
compatible = "ibm,ndfc";
|
||||
reg = <0x00000001 0x00000000 0x00002000>;
|
||||
ccr = <0x00001000>;
|
||||
bank-settings = <0x80002222>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "user";
|
||||
reg = <0x00000000 0x03f00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600200 {
|
||||
|
|
@ -198,6 +225,18 @@
|
|||
reg = <0xef600400 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1338";
|
||||
reg = <0x68>;
|
||||
};
|
||||
|
||||
dtt@48 {
|
||||
compatible = "dallas,ds1775";
|
||||
reg = <0x48>;
|
||||
};
|
||||
};
|
||||
|
||||
IIC1: i2c@ef600500 {
|
||||
|
|
@ -207,7 +246,6 @@
|
|||
interrupts = <0x7 0x4>;
|
||||
};
|
||||
|
||||
|
||||
RGMII0: emac-rgmii@ef600b00 {
|
||||
compatible = "ibm,rgmii-405ex", "ibm,rgmii";
|
||||
reg = <0xef600b00 0x00000104>;
|
||||
|
|
|
|||
|
|
@ -162,6 +162,59 @@
|
|||
fixed-link = <0 0 10 0 0>;
|
||||
};
|
||||
|
||||
i2c@11860 {
|
||||
compatible = "fsl,mpc8272-i2c",
|
||||
"fsl,cpm2-i2c";
|
||||
reg = <0x11860 0x20 0x8afc 0x2>;
|
||||
interrupts = <1 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
fsl,cpm-command = <0x29600000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
mdio@10d40 {
|
||||
compatible = "fsl,cpm2-mdio-bitbang";
|
||||
reg = <0x10d00 0x14>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
fsl,mdio-pin = <12>;
|
||||
fsl,mdc-pin = <13>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FCC1 management to switch */
|
||||
ethernet@11300 {
|
||||
device_type = "network";
|
||||
compatible = "fsl,cpm2-fcc-enet";
|
||||
reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
|
||||
local-mac-address = [ 00 01 02 03 04 07 ];
|
||||
interrupts = <32 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
linux,network-index = <1>;
|
||||
fsl,cpm-command = <0x12000300>;
|
||||
};
|
||||
|
||||
/* FCC2 to redundant core unit over backplane */
|
||||
ethernet@11320 {
|
||||
device_type = "network";
|
||||
compatible = "fsl,cpm2-fcc-enet";
|
||||
reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
|
||||
local-mac-address = [ 00 01 02 03 04 08 ];
|
||||
interrupts = <33 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy1>;
|
||||
linux,network-index = <2>;
|
||||
fsl,cpm-command = <0x16200300>;
|
||||
};
|
||||
};
|
||||
|
||||
PIC: interrupt-controller@10c00 {
|
||||
|
|
|
|||
|
|
@ -173,6 +173,14 @@
|
|||
fsl,cpm-command = <0xce00000>;
|
||||
};
|
||||
|
||||
usb@11b60 {
|
||||
compatible = "fsl,mpc8272-cpm-usb";
|
||||
reg = <0x11b60 0x40 0x8b00 0x100>;
|
||||
interrupts = <11 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mode = "peripheral";
|
||||
};
|
||||
|
||||
mdio@10d40 {
|
||||
device_type = "mdio";
|
||||
compatible = "fsl,mpc8272ads-mdio-bitbang",
|
||||
|
|
|
|||
|
|
@ -174,7 +174,7 @@
|
|||
interrupts = <42 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
clock-frequency = <111111111>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,464 @@
|
|||
/*
|
||||
* MPC8377E WLAN Device Tree Source
|
||||
*
|
||||
* Copyright 2007-2009 Freescale Semiconductor Inc.
|
||||
* Copyright 2009 MontaVista Software, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mpc8377wlan";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8377@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>;
|
||||
i-cache-line-size = <32>;
|
||||
d-cache-size = <32768>;
|
||||
i-cache-size = <32768>;
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; // 512MB at 0
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <77 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
ranges = <0x0 0x0 0xfc000000 0x04000000>;
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x4000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0 0x8000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@a0000 {
|
||||
reg = <0xa0000 0x300000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
partition@3a0000 {
|
||||
reg = <0x3a0000 0x3c60000>;
|
||||
label = "rootfs";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
immr@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xe0000000 0x00100000>;
|
||||
reg = <0xe0000000 0x00000200>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
wdt@200 {
|
||||
device_type = "watchdog";
|
||||
compatible = "mpc83xx_wdt";
|
||||
reg = <0x200 0x100>;
|
||||
};
|
||||
|
||||
gpio1: gpio-controller@c00 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
|
||||
reg = <0xc00 0x100>;
|
||||
interrupts = <74 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
gpio2: gpio-controller@d00 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
|
||||
reg = <0xd00 0x100>;
|
||||
interrupts = <75 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x0c000000>;
|
||||
ranges;
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <14 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1339";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <42 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
clock-frequency = <133333333>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <15 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <16 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
dma@82a8 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
|
||||
reg = <0x82a8 4>;
|
||||
ranges = <0 0x8100 0x1a8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x180 0x28>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <38 0x8>;
|
||||
phy_type = "ulpi";
|
||||
sleep = <&pmc 0x00c00000>;
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <32 0x8 33 0x8 34 0x8>;
|
||||
phy-connection-type = "mii";
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy2>;
|
||||
sleep = <&pmc 0xc0000000>;
|
||||
fsl,magic-packet;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <17 0x8>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <18 0x8>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 0x8 36 0x8 37 0x8>;
|
||||
phy-connection-type = "mii";
|
||||
interrupt-parent = <&ipic>;
|
||||
phy-handle = <&phy3>;
|
||||
tbi-handle = <&tbi1>;
|
||||
sleep = <&pmc 0x30000000>;
|
||||
fsl,magic-packet;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <9 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <10 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <11 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
sleep = <&pmc 0x03000000>;
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <44 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
sleep = <&pmc 0x000000c0>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
interrupts = <45 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
sleep = <&pmc 0x00000030>;
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
*/
|
||||
ipic: interrupt-controller@700 {
|
||||
compatible = "fsl,ipic";
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x700 0x100>;
|
||||
};
|
||||
|
||||
pmc: power@b00 {
|
||||
compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
|
||||
reg = <0xb00 0x100 0xa00 0x100>;
|
||||
interrupts = <80 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008500 {
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
|
||||
|
||||
/* IDSEL AD14 IRQ6 inta */
|
||||
0x7000 0x0 0x0 0x1 &ipic 22 0x8
|
||||
|
||||
/* IDSEL AD15 IRQ5 inta */
|
||||
0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <66 0x8>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
|
||||
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
||||
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
|
||||
sleep = <&pmc 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008500 0x100 /* internal registers */
|
||||
0xe0008300 0x8>; /* config space access registers */
|
||||
compatible = "fsl,mpc8349-pci";
|
||||
device_type = "pci";
|
||||
};
|
||||
|
||||
pci1: pcie@e0009000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
|
||||
reg = <0xe0009000 0x00001000>;
|
||||
ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
|
||||
bus-range = <0 255>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &ipic 1 8
|
||||
0 0 0 2 &ipic 1 8
|
||||
0 0 0 3 &ipic 1 8
|
||||
0 0 0 4 &ipic 1 8>;
|
||||
sleep = <&pmc 0x00300000>;
|
||||
clock-frequency = <0>;
|
||||
|
||||
pcie@0 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
reg = <0 0 0 0 0>;
|
||||
ranges = <0x02000000 0 0xa8000000
|
||||
0x02000000 0 0xa8000000
|
||||
0 0x10000000
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00800000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@e000a000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
|
||||
reg = <0xe000a000 0x00001000>;
|
||||
ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
|
||||
bus-range = <0 255>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &ipic 2 8
|
||||
0 0 0 2 &ipic 2 8
|
||||
0 0 0 3 &ipic 2 8
|
||||
0 0 0 4 &ipic 2 8>;
|
||||
sleep = <&pmc 0x000c0000>;
|
||||
clock-frequency = <0>;
|
||||
|
||||
pcie@0 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
reg = <0 0 0 0 0>;
|
||||
ranges = <0x02000000 0 0xc8000000
|
||||
0x02000000 0 0xc8000000
|
||||
0 0x10000000
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -174,7 +174,7 @@
|
|||
interrupts = <42 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
clock-frequency = <111111111>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -172,7 +172,7 @@
|
|||
interrupts = <42 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
clock-frequency = <111111111>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
/ {
|
||||
model = "fsl,mpc8536ds";
|
||||
compatible = "fsl,mpc8536ds";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
|
|
@ -42,7 +42,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <00000000 00000000>; // Filled by U-Boot
|
||||
reg = <0 0 0 0>; // Filled by U-Boot
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
|
|
@ -50,7 +50,7 @@
|
|||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xffe00000 0x100000>;
|
||||
ranges = <0x0 0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
|
|
@ -250,6 +250,14 @@
|
|||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
clock-frequency = <250000000>;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
|
|
@ -347,13 +355,13 @@
|
|||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 0x2>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
|
||||
ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe08000 0x1000>;
|
||||
reg = <0 0xffe08000 0 0x1000>;
|
||||
};
|
||||
|
||||
pci1: pcie@ffe09000 {
|
||||
|
|
@ -362,10 +370,10 @@
|
|||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe09000 0x1000>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
|
||||
ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 0x2>;
|
||||
|
|
@ -398,10 +406,10 @@
|
|||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe0a000 0x1000>;
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
|
||||
ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 0x2>;
|
||||
|
|
@ -434,10 +442,10 @@
|
|||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe0b000 0x1000>;
|
||||
reg = <0 0xffe0b000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
|
||||
0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
|
||||
ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
|
||||
0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <27 0x2>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,475 @@
|
|||
/*
|
||||
* MPC8536 DS Device Tree Source
|
||||
*
|
||||
* Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "fsl,mpc8536ds";
|
||||
compatible = "fsl,mpc8536ds";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8536@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0 0 0>; // Filled by U-Boot
|
||||
};
|
||||
|
||||
soc@fffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8536-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 0x2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8536-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 0x2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
interrupts = <0 0x1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 4>;
|
||||
ranges = <0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <28 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <46 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@2b000 {
|
||||
compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x2b000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <60 0x2>;
|
||||
dr_mode = "peripheral";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
clock-frequency = <250000000>;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
clock-frequency = <0>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@fffe08000 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x11 J17 Slot 1 */
|
||||
0x8800 0 0 1 &mpic 1 1
|
||||
0x8800 0 0 2 &mpic 2 1
|
||||
0x8800 0 0 3 &mpic 3 1
|
||||
0x8800 0 0 4 &mpic 4 1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 0x2>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe08000 0 0x1000>;
|
||||
};
|
||||
|
||||
pci1: pcie@fffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 4 1
|
||||
0000 0 0 2 &mpic 5 1
|
||||
0000 0 0 3 &mpic 6 1
|
||||
0000 0 0 4 &mpic 7 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xf8000000
|
||||
0x02000000 0 0xf8000000
|
||||
0 0x08000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00010000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 0 1
|
||||
0000 0 0 2 &mpic 1 1
|
||||
0000 0 0 3 &mpic 2 1
|
||||
0000 0 0 4 &mpic 3 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xf8000000
|
||||
0x02000000 0 0xf8000000
|
||||
0 0x08000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00010000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci3: pcie@fffe0b000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0b000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <27 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 8 1
|
||||
0000 0 0 2 &mpic 9 1
|
||||
0000 0 0 3 &mpic 10 1
|
||||
0000 0 0 4 &mpic 11 1
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xe0000000
|
||||
0x02000000 0 0xe0000000
|
||||
0 0x20000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -100,6 +100,21 @@
|
|||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x56>;
|
||||
};
|
||||
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x57>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
|
|
@ -111,6 +126,11 @@
|
|||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
|
|
|
|||
|
|
@ -99,8 +99,18 @@
|
|||
};
|
||||
|
||||
bcsr@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569mds-bcsr";
|
||||
reg = <1 0 0x8000>;
|
||||
ranges = <0 1 0 0x8000>;
|
||||
|
||||
bcsr17: gpio-controller@11 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8569mds-bcsr-gpio";
|
||||
reg = <0x11 0x1>;
|
||||
gpio-controller;
|
||||
};
|
||||
};
|
||||
|
||||
nand@3,0 {
|
||||
|
|
@ -315,6 +325,14 @@
|
|||
gpio-controller;
|
||||
};
|
||||
|
||||
qe_pio_f: gpio-controller@a0 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8569-qe-pario-bank",
|
||||
"fsl,mpc8323-qe-pario-bank";
|
||||
reg = <0xa0 0x18>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
pio1: ucc_pin@01 {
|
||||
pio-map = <
|
||||
/* port pin dir open_drain assignment has_irq */
|
||||
|
|
@ -419,6 +437,16 @@
|
|||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
timer@440 {
|
||||
compatible = "fsl,mpc8569-qe-gtm",
|
||||
"fsl,qe-gtm", "fsl,gtm";
|
||||
reg = <0x440 0x40>;
|
||||
interrupts = <12 13 14 15>;
|
||||
interrupt-parent = <&qeic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
spi@4c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -446,6 +474,23 @@
|
|||
mode = "cpu";
|
||||
};
|
||||
|
||||
usb@6c0 {
|
||||
compatible = "fsl,mpc8569-qe-usb",
|
||||
"fsl,mpc8323-qe-usb";
|
||||
reg = <0x6c0 0x40 0x8b00 0x100>;
|
||||
interrupts = <11>;
|
||||
interrupt-parent = <&qeic>;
|
||||
fsl,fullspeed-clock = "clk5";
|
||||
fsl,lowspeed-clock = "brg10";
|
||||
gpios = <&qe_pio_f 3 0 /* USBOE */
|
||||
&qe_pio_f 4 0 /* USBTP */
|
||||
&qe_pio_f 5 0 /* USBTN */
|
||||
&qe_pio_f 6 0 /* USBRP */
|
||||
&qe_pio_f 8 0 /* USBRN */
|
||||
&bcsr17 6 0 /* SPEED */
|
||||
&bcsr17 5 1>; /* POWER */
|
||||
};
|
||||
|
||||
enet0: ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,586 @@
|
|||
/*
|
||||
* P2020 RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2009 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
model = "fsl,P2020";
|
||||
compatible = "fsl,P2020RDB";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P2020@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P2020@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@ffe05000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
/* NOR and NAND Flashes */
|
||||
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
|
||||
0x1 0x0 0x0 0xffa00000 0x00040000
|
||||
0x2 0x0 0x0 0xffb00000 0x00020000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 256KB for Vitesse 7385 Switch firmware */
|
||||
reg = <0x0 0x00040000>;
|
||||
label = "NOR (RO) Vitesse-7385 Firmware";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR (RO) DTB Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 3.5 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00380000>;
|
||||
label = "NOR (RO) Linux Kernel Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
/* 11MB for JFFS2 based Root file System */
|
||||
reg = <0x00400000 0x00b00000>;
|
||||
label = "NOR (RW) JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
label = "NOR (RO) U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2020-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND (RO) U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND (RO) DTB Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND (RO) Linux Kernel Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND (RO) Compressed RFS Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 7MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00700000>;
|
||||
label = "NAND (RW) JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
/* 15MB for JFFS2 based Root file System */
|
||||
reg = <0x01100000 0x00f00000>;
|
||||
label = "NAND (RW) Writable User area";
|
||||
};
|
||||
};
|
||||
|
||||
L2switch@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "vitesse-7385";
|
||||
reg = <0x2 0x0 0x20000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p2020-immr", "simple-bus";
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p2020-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p2020-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1339";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
cell-index = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,espi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <59 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
mode = "cpu";
|
||||
|
||||
fsl_m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,espi-flash";
|
||||
reg = <0>;
|
||||
linux,modalias = "fsl_m25p80";
|
||||
modal = "s25sl128b";
|
||||
spi-max-frequency = <50000000>;
|
||||
mode = <0>;
|
||||
|
||||
partition@0 {
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00080000>;
|
||||
label = "SPI (RO) U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 512KB for DTB Image */
|
||||
reg = <0x00080000 0x00080000>;
|
||||
label = "SPI (RO) DTB Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00100000 0x00400000>;
|
||||
label = "SPI (RO) Linux Kernel Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@500000 {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00500000 0x00400000>;
|
||||
label = "SPI (RO) Compressed RFS Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
/* 7MB for JFFS2 based RFS */
|
||||
reg = <0x00900000 0x00700000>;
|
||||
label = "SPI (RW) JFFS2 RFS";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <76 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <77 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <78 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <79 2>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio-controller@f000 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8572-gpio";
|
||||
reg = <0xf000 0x100>;
|
||||
interrupts = <47 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p2020-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2,512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x22000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <28 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "sgmii";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,p2020-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
|
||||
"fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xbfe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,p2020-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,p2020-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -146,18 +146,6 @@
|
|||
phy_type = "ulpi";
|
||||
port0;
|
||||
};
|
||||
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
|
||||
usb@23000 {
|
||||
device_type = "usb";
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <38 0x8>;
|
||||
dr_mode = "otg";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -277,15 +265,55 @@
|
|||
};
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8349-localbus", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <77 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
ranges = <0x0 0x0 0xff800000 0x00800000 /* 8MB Flash */
|
||||
0x1 0x0 0xf8000000 0x00002000 /* 8KB EEPROM */
|
||||
0x2 0x0 0x10000000 0x04000000 /* 64MB SDRAM */
|
||||
0x3 0x0 0x10000000 0x04000000>; /* 64MB SDRAM */
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "intel,28F640J3A", "cfi-flash";
|
||||
reg = <0x0 0x0 0x800000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00040000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "user";
|
||||
reg = <0x00040000 0x006c0000>;
|
||||
};
|
||||
|
||||
partition@700000 {
|
||||
label = "legacy u-boot";
|
||||
reg = <0x00700000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008500 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x11 */
|
||||
0x8800 0x0 0x0 0x1 &ipic 20 0x8
|
||||
0x8800 0x0 0x0 0x2 &ipic 21 0x8
|
||||
0x8800 0x0 0x0 0x3 &ipic 22 0x8
|
||||
0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
|
||||
0x8800 0x0 0x0 0x1 &ipic 48 0x8
|
||||
0x8800 0x0 0x0 0x2 &ipic 17 0x8
|
||||
0x8800 0x0 0x0 0x3 &ipic 18 0x8
|
||||
0x8800 0x0 0x0 0x4 &ipic 19 0x8>;
|
||||
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <0x42 0x8>;
|
||||
|
|
|
|||
|
|
@ -303,7 +303,6 @@
|
|||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8560-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ typedef struct boot_block {
|
|||
} boot_block_t;
|
||||
|
||||
#define IMGBLK 512
|
||||
char tmpbuf[IMGBLK];
|
||||
unsigned int tmpbuf[IMGBLK / sizeof(unsigned int)];
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
|
|
@ -95,13 +95,13 @@ int main(int argc, char *argv[])
|
|||
|
||||
/* Assume zImage is an ELF file, and skip the 64K header.
|
||||
*/
|
||||
if (read(in_fd, tmpbuf, IMGBLK) != IMGBLK) {
|
||||
if (read(in_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) {
|
||||
fprintf(stderr, "%s is too small to be an ELF image\n",
|
||||
argv[1]);
|
||||
exit(4);
|
||||
}
|
||||
|
||||
if ((*(unsigned int *)tmpbuf) != htonl(0x7f454c46)) {
|
||||
if (tmpbuf[0] != htonl(0x7f454c46)) {
|
||||
fprintf(stderr, "%s is not an ELF image\n", argv[1]);
|
||||
exit(4);
|
||||
}
|
||||
|
|
@ -121,11 +121,11 @@ int main(int argc, char *argv[])
|
|||
}
|
||||
|
||||
while (nblks-- > 0) {
|
||||
if (read(in_fd, tmpbuf, IMGBLK) < 0) {
|
||||
if (read(in_fd, tmpbuf, sizeof(tmpbuf)) < 0) {
|
||||
perror("zImage read");
|
||||
exit(5);
|
||||
}
|
||||
cp = (unsigned int *)tmpbuf;
|
||||
cp = tmpbuf;
|
||||
for (i = 0; i < sizeof(tmpbuf) / sizeof(unsigned int); i++)
|
||||
cksum += *cp++;
|
||||
if (write(out_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
* This interface is used for compatibility with old U-boots *ONLY*.
|
||||
* Please do not imitate or extend this.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Unfortunately, the ESTeem Hotfoot board uses a mangled version of
|
||||
* ppcboot.h for historical reasons, and in the interest of having a
|
||||
* mainline kernel boot on the production board+bootloader, this was the
|
||||
* least-offensive solution. Please direct all flames to:
|
||||
*
|
||||
* Solomon Peachy <solomon@linux-wlan.com>
|
||||
*
|
||||
* (This header is identical to ppcboot.h except for the
|
||||
* TARGET_HOTFOOT bits)
|
||||
*/
|
||||
|
||||
/*
|
||||
* (C) Copyright 2000, 2001
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __PPCBOOT_H__
|
||||
#define __PPCBOOT_H__
|
||||
|
||||
/*
|
||||
* Board information passed to kernel from PPCBoot
|
||||
*
|
||||
* include/asm-ppc/ppcboot.h
|
||||
*/
|
||||
|
||||
#include "types.h"
|
||||
|
||||
typedef struct bd_info {
|
||||
unsigned long bi_memstart; /* start of DRAM memory */
|
||||
unsigned long bi_memsize; /* size of DRAM memory in bytes */
|
||||
unsigned long bi_flashstart; /* start of FLASH memory */
|
||||
unsigned long bi_flashsize; /* size of FLASH memory */
|
||||
unsigned long bi_flashoffset; /* reserved area for startup monitor */
|
||||
unsigned long bi_sramstart; /* start of SRAM memory */
|
||||
unsigned long bi_sramsize; /* size of SRAM memory */
|
||||
#if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\
|
||||
defined(TARGET_83xx)
|
||||
unsigned long bi_immr_base; /* base of IMMR register */
|
||||
#endif
|
||||
#if defined(TARGET_PPC_MPC52xx)
|
||||
unsigned long bi_mbar_base; /* base of internal registers */
|
||||
#endif
|
||||
unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
|
||||
unsigned long bi_ip_addr; /* IP Address */
|
||||
unsigned char bi_enetaddr[6]; /* Ethernet address */
|
||||
#if defined(TARGET_HOTFOOT)
|
||||
/* second onboard ethernet port */
|
||||
unsigned char bi_enet1addr[6];
|
||||
#define HAVE_ENET1ADDR
|
||||
#endif /* TARGET_HOOTFOOT */
|
||||
unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
|
||||
unsigned long bi_intfreq; /* Internal Freq, in MHz */
|
||||
unsigned long bi_busfreq; /* Bus Freq, in MHz */
|
||||
#if defined(TARGET_CPM2)
|
||||
unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
|
||||
unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
|
||||
unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
|
||||
unsigned long bi_vco; /* VCO Out from PLL, in MHz */
|
||||
#endif
|
||||
#if defined(TARGET_PPC_MPC52xx)
|
||||
unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
|
||||
unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
|
||||
#endif
|
||||
unsigned long bi_baudrate; /* Console Baudrate */
|
||||
#if defined(TARGET_4xx)
|
||||
unsigned char bi_s_version[4]; /* Version of this structure */
|
||||
unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */
|
||||
unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
|
||||
unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
|
||||
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
|
||||
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
|
||||
#endif
|
||||
#if defined(TARGET_HOTFOOT)
|
||||
unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
|
||||
#endif
|
||||
#if defined(TARGET_HYMOD)
|
||||
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
|
||||
#endif
|
||||
#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
|
||||
defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
|
||||
/* second onboard ethernet port */
|
||||
unsigned char bi_enet1addr[6];
|
||||
#define HAVE_ENET1ADDR
|
||||
#endif
|
||||
#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
|
||||
defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
|
||||
/* third onboard ethernet ports */
|
||||
unsigned char bi_enet2addr[6];
|
||||
#define HAVE_ENET2ADDR
|
||||
#endif
|
||||
#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
|
||||
/* fourth onboard ethernet ports */
|
||||
unsigned char bi_enet3addr[6];
|
||||
#define HAVE_ENET3ADDR
|
||||
#endif
|
||||
#if defined(TARGET_HOTFOOT)
|
||||
int bi_phynum[2]; /* Determines phy mapping */
|
||||
int bi_phymode[2]; /* Determines phy mode */
|
||||
#endif
|
||||
#if defined(TARGET_4xx)
|
||||
unsigned int bi_opbfreq; /* OB clock in Hz */
|
||||
int bi_iic_fast[2]; /* Use fast i2c mode */
|
||||
#endif
|
||||
#if defined(TARGET_440GX)
|
||||
int bi_phynum[4]; /* phy mapping */
|
||||
int bi_phymode[4]; /* phy mode */
|
||||
#endif
|
||||
} bd_t;
|
||||
|
||||
#define bi_tbfreq bi_intfreq
|
||||
|
||||
#endif /* __PPCBOOT_H__ */
|
||||
|
|
@ -46,6 +46,7 @@ CROSS=
|
|||
# directory for object and other files used by this script
|
||||
object=arch/powerpc/boot
|
||||
objbin=$object
|
||||
dtc=scripts/dtc/dtc
|
||||
|
||||
# directory for working files
|
||||
tmpdir=.
|
||||
|
|
@ -124,7 +125,7 @@ if [ -n "$dts" ]; then
|
|||
if [ -z "$dtb" ]; then
|
||||
dtb="$platform.dtb"
|
||||
fi
|
||||
$object/dtc -O dtb -o "$dtb" -b 0 "$dts"
|
||||
$dtc -O dtb -o "$dtb" -b 0 "$dts"
|
||||
fi
|
||||
|
||||
if [ -z "$kernel" ]; then
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.30-rc7
|
||||
# Wed Jun 3 10:18:16 2009
|
||||
# Linux kernel version: 2.6.31-rc4
|
||||
# Wed Jul 29 13:28:37 2009
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
#
|
||||
# Processor support
|
||||
#
|
||||
# CONFIG_6xx is not set
|
||||
# CONFIG_PPC_BOOK3S_32 is not set
|
||||
# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_8xx is not set
|
||||
CONFIG_40x=y
|
||||
|
|
@ -32,11 +32,11 @@ CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
|||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
|
||||
CONFIG_PPC=y
|
||||
|
|
@ -57,6 +57,7 @@ CONFIG_PPC_DCR_NATIVE=y
|
|||
CONFIG_PPC_DCR=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
|
@ -108,7 +109,6 @@ CONFIG_SYSCTL_SYSCALL=y
|
|||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_KALLSYMS_EXTRA_PASS=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
|
|
@ -121,9 +121,16 @@ CONFIG_TIMERFD=y
|
|||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_HAVE_PERF_COUNTERS=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
#
|
||||
# CONFIG_PERF_COUNTERS is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
|
|
@ -137,6 +144,11 @@ CONFIG_HAVE_IOREMAP_PROT=y
|
|||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_GCOV_KERNEL is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
|
|
@ -149,7 +161,7 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
CONFIG_LBD=y
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
|
@ -220,6 +232,7 @@ CONFIG_BINFMT_ELF=y
|
|||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_MATH_EMULATION is not set
|
||||
# CONFIG_IOMMU_HELPER is not set
|
||||
# CONFIG_SWIOTLB is not set
|
||||
CONFIG_PPC_NEED_DMA_SYNC_OPS=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_HAS_WALK_MEMORY=y
|
||||
|
|
@ -239,9 +252,9 @@ CONFIG_MIGRATION=y
|
|||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_PPC_4K_PAGES=y
|
||||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
|
|
@ -344,6 +357,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
|
@ -393,9 +407,8 @@ CONFIG_MTD_OF_PARTS=y
|
|||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=m
|
||||
CONFIG_MTD_BLOCK=m
|
||||
# CONFIG_MTD_BLOCK_RO is not set
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
|
|
@ -452,7 +465,17 @@ CONFIG_MTD_PHYSMAP_OF=y
|
|||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
|
||||
CONFIG_MTD_NAND_ECC_SMC=y
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
CONFIG_MTD_NAND_NDFC=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
# CONFIG_MTD_NAND_NANDSIM is not set
|
||||
# CONFIG_MTD_NAND_PLATFORM is not set
|
||||
# CONFIG_MTD_NAND_FSL_ELBC is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
|
|
@ -465,6 +488,7 @@ CONFIG_MTD_PHYSMAP_OF=y
|
|||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_I2C=y
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
|
|
@ -504,14 +528,17 @@ CONFIG_HAVE_IDE=y
|
|||
#
|
||||
|
||||
#
|
||||
# Enable only one of the two stacks, unless you know what you are doing
|
||||
# You can enable one or both FireWire driver stacks.
|
||||
#
|
||||
|
||||
#
|
||||
# See the help texts for more information.
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
# CONFIG_MACINTOSH_DRIVERS is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
|
@ -546,6 +573,7 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
|
|
@ -621,20 +649,150 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
|
||||
#
|
||||
# PC SMBus host controller drivers
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI1563 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_ISCH is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_VIA is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
|
||||
#
|
||||
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||
#
|
||||
CONFIG_I2C_IBM_IIC=y
|
||||
# CONFIG_I2C_MPC is not set
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
# CONFIG_I2C_SIMTEC is not set
|
||||
|
||||
#
|
||||
# External I2C/SMBus adapter drivers
|
||||
#
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_TAOS_EVM is not set
|
||||
|
||||
#
|
||||
# Graphics adapter I2C/DDC channel drivers
|
||||
#
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
|
||||
#
|
||||
# Other I2C/SMBus bus drivers
|
||||
#
|
||||
# CONFIG_I2C_PCA_PLATFORM is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
|
||||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
# CONFIG_SPI is not set
|
||||
|
||||
#
|
||||
# PPS support
|
||||
#
|
||||
# CONFIG_PPS is not set
|
||||
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||
# CONFIG_GPIOLIB is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_AD7414 is not set
|
||||
# CONFIG_SENSORS_AD7418 is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1029 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ADT7462 is not set
|
||||
# CONFIG_SENSORS_ADT7470 is not set
|
||||
# CONFIG_SENSORS_ADT7473 is not set
|
||||
# CONFIG_SENSORS_ADT7475 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_I5K_AMB is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
# CONFIG_SENSORS_F75375S is not set
|
||||
# CONFIG_SENSORS_G760A is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
CONFIG_SENSORS_LM75=y
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_LM93 is not set
|
||||
# CONFIG_SENSORS_LTC4215 is not set
|
||||
# CONFIG_SENSORS_LTC4245 is not set
|
||||
# CONFIG_SENSORS_LM95241 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_MAX6650 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_ADS7828 is not set
|
||||
# CONFIG_SENSORS_THMC50 is not set
|
||||
# CONFIG_SENSORS_TMP401 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83791D is not set
|
||||
# CONFIG_SENSORS_W83792D is not set
|
||||
# CONFIG_SENSORS_W83793 is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83L786NG is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
CONFIG_THERMAL=y
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
|
|
@ -649,24 +807,15 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
|
|
@ -691,10 +840,69 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_INFINIBAND is not set
|
||||
# CONFIG_EDAC is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
|
||||
# CONFIG_RTC_DEBUG is not set
|
||||
|
||||
#
|
||||
# RTC interfaces
|
||||
#
|
||||
CONFIG_RTC_INTF_SYSFS=y
|
||||
CONFIG_RTC_INTF_PROC=y
|
||||
CONFIG_RTC_INTF_DEV=y
|
||||
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
|
||||
# CONFIG_RTC_DRV_TEST is not set
|
||||
|
||||
#
|
||||
# I2C RTC drivers
|
||||
#
|
||||
CONFIG_RTC_DRV_DS1307=y
|
||||
# CONFIG_RTC_DRV_DS1374 is not set
|
||||
# CONFIG_RTC_DRV_DS1672 is not set
|
||||
# CONFIG_RTC_DRV_MAX6900 is not set
|
||||
# CONFIG_RTC_DRV_RS5C372 is not set
|
||||
# CONFIG_RTC_DRV_ISL1208 is not set
|
||||
# CONFIG_RTC_DRV_X1205 is not set
|
||||
# CONFIG_RTC_DRV_PCF8563 is not set
|
||||
# CONFIG_RTC_DRV_PCF8583 is not set
|
||||
# CONFIG_RTC_DRV_M41T80 is not set
|
||||
# CONFIG_RTC_DRV_S35390A is not set
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
# CONFIG_RTC_DRV_RX8025 is not set
|
||||
|
||||
#
|
||||
# SPI RTC drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Platform RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_DS1286 is not set
|
||||
# CONFIG_RTC_DRV_DS1511 is not set
|
||||
# CONFIG_RTC_DRV_DS1553 is not set
|
||||
# CONFIG_RTC_DRV_DS1742 is not set
|
||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
# on-CPU RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_GENERIC is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# TI VLYNQ
|
||||
#
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
|
|
@ -708,11 +916,12 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
|
@ -818,6 +1027,7 @@ CONFIG_HAS_IOPORT=y
|
|||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAVE_LMB=y
|
||||
CONFIG_NLATTR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
|
|
@ -848,6 +1058,9 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
|
@ -859,7 +1072,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
|
|||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
|
|
@ -873,16 +1085,15 @@ CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
|||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_EVENT_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
|
|
@ -891,6 +1102,9 @@ CONFIG_TRACING_SUPPORT=y
|
|||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
# CONFIG_KMEMCHECK is not set
|
||||
# CONFIG_PPC_DISABLE_WERROR is not set
|
||||
CONFIG_PPC_WERROR=y
|
||||
CONFIG_PRINT_STACK_DEPTH=64
|
||||
# CONFIG_DEBUG_STACKOVERFLOW is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.29-rc2
|
||||
# Tue Jan 20 08:22:31 2009
|
||||
# Linux kernel version: 2.6.31-rc5
|
||||
# Thu Aug 13 14:14:07 2009
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
#
|
||||
# Processor support
|
||||
#
|
||||
# CONFIG_6xx is not set
|
||||
# CONFIG_PPC_BOOK3S_32 is not set
|
||||
# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_8xx is not set
|
||||
# CONFIG_40x is not set
|
||||
|
|
@ -31,15 +31,16 @@ CONFIG_GENERIC_TIME=y
|
|||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
|
||||
CONFIG_PPC=y
|
||||
|
|
@ -53,11 +54,14 @@ CONFIG_PPC_UDBG_16550=y
|
|||
# CONFIG_GENERIC_TBSYNC is not set
|
||||
CONFIG_AUDIT_ARCH=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_DTC=y
|
||||
# CONFIG_DEFAULT_UIMAGE is not set
|
||||
CONFIG_PPC_DCR_NATIVE=y
|
||||
# CONFIG_PPC_DCR_MMIO is not set
|
||||
CONFIG_PPC_DCR=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
|
@ -71,9 +75,19 @@ CONFIG_SWAP=y
|
|||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_POSIX_MQUEUE_SYSCTL=y
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_GROUP_SCHED is not set
|
||||
|
|
@ -84,8 +98,12 @@ CONFIG_SYSFS_DEPRECATED_V2=y
|
|||
# CONFIG_NAMESPACES is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_GZIP=y
|
||||
# CONFIG_RD_BZIP2 is not set
|
||||
# CONFIG_RD_LZMA is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
|
|
@ -95,23 +113,30 @@ CONFIG_HOTPLUG=y
|
|||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_HAVE_PERF_COUNTERS=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
#
|
||||
# CONFIG_PERF_COUNTERS is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_KPROBES is not set
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
|
|
@ -119,6 +144,12 @@ CONFIG_HAVE_IOREMAP_PROT=y
|
|||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_GCOV_KERNEL is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
|
|
@ -130,8 +161,7 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
CONFIG_LBD=y
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
|
@ -147,11 +177,6 @@ CONFIG_DEFAULT_AS=y
|
|||
# CONFIG_DEFAULT_CFQ is not set
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="anticipatory"
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
CONFIG_PPC4xx_PCI_EXPRESS=y
|
||||
|
||||
|
|
@ -172,6 +197,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y
|
|||
CONFIG_ARCHES=y
|
||||
# CONFIG_CANYONLANDS is not set
|
||||
# CONFIG_GLACIER is not set
|
||||
# CONFIG_REDWOOD is not set
|
||||
# CONFIG_YOSEMITE is not set
|
||||
# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
|
||||
CONFIG_PPC44x_SIMPLE=y
|
||||
|
|
@ -214,6 +240,7 @@ CONFIG_BINFMT_ELF=y
|
|||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_MATH_EMULATION is not set
|
||||
# CONFIG_IOMMU_HELPER is not set
|
||||
# CONFIG_SWIOTLB is not set
|
||||
CONFIG_PPC_NEED_DMA_SYNC_OPS=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_HAS_WALK_MEMORY=y
|
||||
|
|
@ -233,10 +260,14 @@ CONFIG_PHYS_ADDR_T_64BIT=y
|
|||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_STDBINUTILS=y
|
||||
CONFIG_PPC_4K_PAGES=y
|
||||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
# CONFIG_PPC_256K_PAGES is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_CMDLINE_BOOL=y
|
||||
|
|
@ -261,6 +292,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
|
|||
# CONFIG_PCI_LEGACY is not set
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCI_IOV is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
# CONFIG_HOTPLUG_PCI is not set
|
||||
# CONFIG_HAS_RAPIDIO is not set
|
||||
|
|
@ -278,14 +310,12 @@ CONFIG_PAGE_OFFSET=0xc0000000
|
|||
CONFIG_KERNEL_START=0xc0000000
|
||||
CONFIG_PHYSICAL_START=0x00000000
|
||||
CONFIG_TASK_SIZE=0xc0000000
|
||||
CONFIG_CONSISTENT_START=0xff100000
|
||||
CONFIG_CONSISTENT_SIZE=0x00200000
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
|
|
@ -335,6 +365,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
|
@ -347,7 +379,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
|
@ -371,8 +402,92 @@ CONFIG_EXTRA_FIRMWARE=""
|
|||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
CONFIG_CONNECTOR=y
|
||||
CONFIG_PROC_EVENTS=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
# CONFIG_MTD_PHYSMAP is not set
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_I2C=y
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
|
|
@ -412,7 +527,11 @@ CONFIG_HAVE_IDE=y
|
|||
#
|
||||
|
||||
#
|
||||
# Enable only one of the two stacks, unless you know what you are doing
|
||||
# You can enable one or both FireWire driver stacks.
|
||||
#
|
||||
|
||||
#
|
||||
# See the help texts for more information.
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
|
@ -433,6 +552,8 @@ CONFIG_NET_ETHERNET=y
|
|||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
CONFIG_IBM_NEW_EMAC=y
|
||||
|
|
@ -451,6 +572,7 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
|
|
@ -461,7 +583,6 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
|
|
@ -533,13 +654,143 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
|
||||
#
|
||||
# PC SMBus host controller drivers
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI1563 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_ISCH is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_VIA is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
|
||||
#
|
||||
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||
#
|
||||
CONFIG_I2C_IBM_IIC=y
|
||||
# CONFIG_I2C_MPC is not set
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
# CONFIG_I2C_SIMTEC is not set
|
||||
|
||||
#
|
||||
# External I2C/SMBus adapter drivers
|
||||
#
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_TAOS_EVM is not set
|
||||
|
||||
#
|
||||
# Graphics adapter I2C/DDC channel drivers
|
||||
#
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
|
||||
#
|
||||
# Other I2C/SMBus bus drivers
|
||||
#
|
||||
# CONFIG_I2C_PCA_PLATFORM is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
|
||||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
# CONFIG_SPI is not set
|
||||
|
||||
#
|
||||
# PPS support
|
||||
#
|
||||
# CONFIG_PPS is not set
|
||||
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||
# CONFIG_GPIOLIB is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
CONFIG_SENSORS_AD7414=y
|
||||
# CONFIG_SENSORS_AD7418 is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1029 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ADT7462 is not set
|
||||
# CONFIG_SENSORS_ADT7470 is not set
|
||||
# CONFIG_SENSORS_ADT7473 is not set
|
||||
# CONFIG_SENSORS_ADT7475 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_I5K_AMB is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
# CONFIG_SENSORS_F75375S is not set
|
||||
# CONFIG_SENSORS_G760A is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_LM93 is not set
|
||||
# CONFIG_SENSORS_LTC4215 is not set
|
||||
# CONFIG_SENSORS_LTC4245 is not set
|
||||
# CONFIG_SENSORS_LM95241 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_MAX6650 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_ADS7828 is not set
|
||||
# CONFIG_SENSORS_THMC50 is not set
|
||||
# CONFIG_SENSORS_TMP401 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83791D is not set
|
||||
# CONFIG_SENSORS_W83792D is not set
|
||||
# CONFIG_SENSORS_W83793 is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83L786NG is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
|
@ -556,24 +807,15 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
CONFIG_DAB=y
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
|
|
@ -600,7 +842,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
|
|||
# CONFIG_EDAC is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# TI VLYNQ
|
||||
#
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
|
|
@ -614,11 +861,12 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
|
@ -627,6 +875,11 @@ CONFIG_INOTIFY_USER=y
|
|||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# Caches
|
||||
#
|
||||
# CONFIG_FSCACHE is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
|
|
@ -660,6 +913,17 @@ CONFIG_MISC_FILESYSTEMS=y
|
|||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_FS_DEBUG=0
|
||||
CONFIG_JFFS2_FS_WRITEBUFFER=y
|
||||
# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
|
||||
# CONFIG_JFFS2_SUMMARY is not set
|
||||
# CONFIG_JFFS2_FS_XATTR is not set
|
||||
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
|
||||
CONFIG_JFFS2_ZLIB=y
|
||||
# CONFIG_JFFS2_LZO is not set
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
CONFIG_CRAMFS=y
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
|
|
@ -670,6 +934,7 @@ CONFIG_CRAMFS=y
|
|||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
|
|
@ -681,7 +946,6 @@ CONFIG_LOCKD=y
|
|||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_SUNRPC_REGISTER_V4 is not set
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
|
|
@ -697,6 +961,7 @@ CONFIG_SUNRPC=y
|
|||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_NLS is not set
|
||||
# CONFIG_DLM is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
|
|
@ -711,11 +976,14 @@ CONFIG_CRC32=y
|
|||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_DECOMPRESS_GZIP=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAVE_LMB=y
|
||||
CONFIG_NLATTR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
|
|
@ -733,6 +1001,9 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
|
||||
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
|
|
@ -743,6 +1014,9 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
|
@ -754,7 +1028,6 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
|
|
@ -762,27 +1035,36 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
# CONFIG_KMEMCHECK is not set
|
||||
# CONFIG_PPC_DISABLE_WERROR is not set
|
||||
CONFIG_PPC_WERROR=y
|
||||
CONFIG_PRINT_STACK_DEPTH=64
|
||||
# CONFIG_DEBUG_STACKOVERFLOW is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
# CONFIG_PPC_EMULATED_STATS is not set
|
||||
# CONFIG_CODE_PATCHING_SELFTEST is not set
|
||||
# CONFIG_FTR_FIXUP_SELFTEST is not set
|
||||
# CONFIG_MSI_BITMAP_SELFTEST is not set
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.29-rc3
|
||||
# Mon Feb 2 13:13:04 2009
|
||||
# Linux kernel version: 2.6.31-rc4
|
||||
# Wed Jul 29 17:27:20 2009
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
#
|
||||
# Processor support
|
||||
#
|
||||
# CONFIG_6xx is not set
|
||||
# CONFIG_PPC_BOOK3S_32 is not set
|
||||
# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_8xx is not set
|
||||
# CONFIG_40x is not set
|
||||
|
|
@ -31,15 +31,16 @@ CONFIG_GENERIC_TIME=y
|
|||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
|
||||
CONFIG_PPC=y
|
||||
|
|
@ -53,11 +54,14 @@ CONFIG_PPC_UDBG_16550=y
|
|||
# CONFIG_GENERIC_TBSYNC is not set
|
||||
CONFIG_AUDIT_ARCH=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_DTC=y
|
||||
# CONFIG_DEFAULT_UIMAGE is not set
|
||||
CONFIG_PPC_DCR_NATIVE=y
|
||||
# CONFIG_PPC_DCR_MMIO is not set
|
||||
CONFIG_PPC_DCR=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
|
@ -71,6 +75,7 @@ CONFIG_SWAP=y
|
|||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_POSIX_MQUEUE_SYSCTL=y
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
|
@ -93,8 +98,12 @@ CONFIG_SYSFS_DEPRECATED_V2=y
|
|||
# CONFIG_NAMESPACES is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_GZIP=y
|
||||
# CONFIG_RD_BZIP2 is not set
|
||||
# CONFIG_RD_LZMA is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
|
|
@ -104,23 +113,30 @@ CONFIG_HOTPLUG=y
|
|||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_HAVE_PERF_COUNTERS=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
#
|
||||
# CONFIG_PERF_COUNTERS is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_KPROBES is not set
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
|
|
@ -128,6 +144,12 @@ CONFIG_HAVE_IOREMAP_PROT=y
|
|||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_GCOV_KERNEL is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
|
|
@ -139,8 +161,7 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
CONFIG_LBD=y
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
|
@ -176,6 +197,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y
|
|||
# CONFIG_ARCHES is not set
|
||||
CONFIG_CANYONLANDS=y
|
||||
# CONFIG_GLACIER is not set
|
||||
# CONFIG_REDWOOD is not set
|
||||
# CONFIG_YOSEMITE is not set
|
||||
# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
|
||||
CONFIG_PPC44x_SIMPLE=y
|
||||
|
|
@ -218,6 +240,7 @@ CONFIG_BINFMT_ELF=y
|
|||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_MATH_EMULATION is not set
|
||||
# CONFIG_IOMMU_HELPER is not set
|
||||
# CONFIG_SWIOTLB is not set
|
||||
CONFIG_PPC_NEED_DMA_SYNC_OPS=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_HAS_WALK_MEMORY=y
|
||||
|
|
@ -237,10 +260,14 @@ CONFIG_PHYS_ADDR_T_64BIT=y
|
|||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_STDBINUTILS=y
|
||||
CONFIG_PPC_4K_PAGES=y
|
||||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
# CONFIG_PPC_256K_PAGES is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_CMDLINE_BOOL=y
|
||||
|
|
@ -265,6 +292,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
|
|||
# CONFIG_PCI_LEGACY is not set
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCI_IOV is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
# CONFIG_HOTPLUG_PCI is not set
|
||||
# CONFIG_HAS_RAPIDIO is not set
|
||||
|
|
@ -282,14 +310,12 @@ CONFIG_PAGE_OFFSET=0xc0000000
|
|||
CONFIG_KERNEL_START=0xc0000000
|
||||
CONFIG_PHYSICAL_START=0x00000000
|
||||
CONFIG_TASK_SIZE=0xc0000000
|
||||
CONFIG_CONSISTENT_START=0xff100000
|
||||
CONFIG_CONSISTENT_SIZE=0x00200000
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
|
|
@ -339,6 +365,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
|
@ -351,7 +379,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
|
@ -375,7 +402,101 @@ CONFIG_EXTRA_FIRMWARE=""
|
|||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
CONFIG_CONNECTOR=y
|
||||
CONFIG_PROC_EVENTS=y
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
# CONFIG_MTD_PHYSMAP is not set
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
|
||||
CONFIG_MTD_NAND_ECC_SMC=y
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
CONFIG_MTD_NAND_NDFC=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
# CONFIG_MTD_NAND_NANDSIM is not set
|
||||
# CONFIG_MTD_NAND_PLATFORM is not set
|
||||
# CONFIG_MTD_ALAUDA is not set
|
||||
# CONFIG_MTD_NAND_FSL_ELBC is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_I2C=y
|
||||
# CONFIG_PARPORT is not set
|
||||
|
|
@ -418,7 +539,11 @@ CONFIG_HAVE_IDE=y
|
|||
#
|
||||
|
||||
#
|
||||
# Enable only one of the two stacks, unless you know what you are doing
|
||||
# You can enable one or both FireWire driver stacks.
|
||||
#
|
||||
|
||||
#
|
||||
# See the help texts for more information.
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
|
@ -439,6 +564,8 @@ CONFIG_NET_ETHERNET=y
|
|||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
CONFIG_IBM_NEW_EMAC=y
|
||||
|
|
@ -457,6 +584,7 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
|
|
@ -467,7 +595,6 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
|
|
@ -542,7 +669,6 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
|
@ -608,14 +734,17 @@ CONFIG_I2C_IBM_IIC=y
|
|||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
# CONFIG_SPI is not set
|
||||
|
||||
#
|
||||
# PPS support
|
||||
#
|
||||
# CONFIG_PPS is not set
|
||||
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||
# CONFIG_GPIOLIB is not set
|
||||
# CONFIG_W1 is not set
|
||||
|
|
@ -640,6 +769,7 @@ CONFIG_SENSORS_AD7414=y
|
|||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
# CONFIG_SENSORS_F75375S is not set
|
||||
# CONFIG_SENSORS_G760A is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
|
|
@ -654,11 +784,14 @@ CONFIG_SENSORS_AD7414=y
|
|||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_LM93 is not set
|
||||
# CONFIG_SENSORS_LTC4215 is not set
|
||||
# CONFIG_SENSORS_LTC4245 is not set
|
||||
# CONFIG_SENSORS_LM95241 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_MAX6650 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
|
|
@ -666,6 +799,7 @@ CONFIG_SENSORS_AD7414=y
|
|||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_ADS7828 is not set
|
||||
# CONFIG_SENSORS_THMC50 is not set
|
||||
# CONFIG_SENSORS_TMP401 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
|
|
@ -700,24 +834,9 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
# CONFIG_USB_DABUSB is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
|
|
@ -759,6 +878,7 @@ CONFIG_USB_MON=y
|
|||
# USB Host Controller Drivers
|
||||
#
|
||||
# CONFIG_USB_C67X00_HCD is not set
|
||||
# CONFIG_USB_XHCI_HCD is not set
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
|
|
@ -767,9 +887,9 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
|
|||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
# CONFIG_USB_ISP1760_HCD is not set
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
|
||||
CONFIG_USB_OHCI_HCD_PPC_OF=y
|
||||
CONFIG_USB_OHCI_HCD_PCI=y
|
||||
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
|
||||
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
|
||||
|
|
@ -789,11 +909,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
|
|||
# CONFIG_USB_TMC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
|
||||
#
|
||||
|
||||
#
|
||||
# see USB_STORAGE Help for more information
|
||||
# also be needed; see USB_STORAGE Help for more info
|
||||
#
|
||||
CONFIG_USB_LIBUSUAL=y
|
||||
|
||||
|
|
@ -821,7 +941,6 @@ CONFIG_USB_LIBUSUAL=y
|
|||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_PHIDGET is not set
|
||||
# CONFIG_USB_IDMOUSE is not set
|
||||
# CONFIG_USB_FTDI_ELAN is not set
|
||||
# CONFIG_USB_APPLEDISPLAY is not set
|
||||
|
|
@ -837,6 +956,7 @@ CONFIG_USB_LIBUSUAL=y
|
|||
#
|
||||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
# CONFIG_UWB is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
|
|
@ -844,9 +964,70 @@ CONFIG_USB_LIBUSUAL=y
|
|||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_INFINIBAND is not set
|
||||
# CONFIG_EDAC is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
|
||||
# CONFIG_RTC_DEBUG is not set
|
||||
|
||||
#
|
||||
# RTC interfaces
|
||||
#
|
||||
CONFIG_RTC_INTF_SYSFS=y
|
||||
CONFIG_RTC_INTF_PROC=y
|
||||
CONFIG_RTC_INTF_DEV=y
|
||||
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
|
||||
# CONFIG_RTC_DRV_TEST is not set
|
||||
|
||||
#
|
||||
# I2C RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_DS1307 is not set
|
||||
# CONFIG_RTC_DRV_DS1374 is not set
|
||||
# CONFIG_RTC_DRV_DS1672 is not set
|
||||
# CONFIG_RTC_DRV_MAX6900 is not set
|
||||
# CONFIG_RTC_DRV_RS5C372 is not set
|
||||
# CONFIG_RTC_DRV_ISL1208 is not set
|
||||
# CONFIG_RTC_DRV_X1205 is not set
|
||||
# CONFIG_RTC_DRV_PCF8563 is not set
|
||||
# CONFIG_RTC_DRV_PCF8583 is not set
|
||||
CONFIG_RTC_DRV_M41T80=y
|
||||
# CONFIG_RTC_DRV_M41T80_WDT is not set
|
||||
# CONFIG_RTC_DRV_S35390A is not set
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
# CONFIG_RTC_DRV_RX8025 is not set
|
||||
|
||||
#
|
||||
# SPI RTC drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Platform RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_DS1286 is not set
|
||||
# CONFIG_RTC_DRV_DS1511 is not set
|
||||
# CONFIG_RTC_DRV_DS1553 is not set
|
||||
# CONFIG_RTC_DRV_DS1742 is not set
|
||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
# on-CPU RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_GENERIC is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# TI VLYNQ
|
||||
#
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
|
|
@ -860,11 +1041,12 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
|
@ -873,6 +1055,11 @@ CONFIG_INOTIFY_USER=y
|
|||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# Caches
|
||||
#
|
||||
# CONFIG_FSCACHE is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
|
|
@ -906,6 +1093,7 @@ CONFIG_MISC_FILESYSTEMS=y
|
|||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
CONFIG_CRAMFS=y
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
|
|
@ -916,6 +1104,7 @@ CONFIG_CRAMFS=y
|
|||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
|
|
@ -927,7 +1116,6 @@ CONFIG_LOCKD=y
|
|||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_SUNRPC_REGISTER_V4 is not set
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
|
|
@ -941,8 +1129,48 @@ CONFIG_SUNRPC=y
|
|||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_NLS is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
# CONFIG_NLS_CODEPAGE_437 is not set
|
||||
# CONFIG_NLS_CODEPAGE_737 is not set
|
||||
# CONFIG_NLS_CODEPAGE_775 is not set
|
||||
# CONFIG_NLS_CODEPAGE_850 is not set
|
||||
# CONFIG_NLS_CODEPAGE_852 is not set
|
||||
# CONFIG_NLS_CODEPAGE_855 is not set
|
||||
# CONFIG_NLS_CODEPAGE_857 is not set
|
||||
# CONFIG_NLS_CODEPAGE_860 is not set
|
||||
# CONFIG_NLS_CODEPAGE_861 is not set
|
||||
# CONFIG_NLS_CODEPAGE_862 is not set
|
||||
# CONFIG_NLS_CODEPAGE_863 is not set
|
||||
# CONFIG_NLS_CODEPAGE_864 is not set
|
||||
# CONFIG_NLS_CODEPAGE_865 is not set
|
||||
# CONFIG_NLS_CODEPAGE_866 is not set
|
||||
# CONFIG_NLS_CODEPAGE_869 is not set
|
||||
# CONFIG_NLS_CODEPAGE_936 is not set
|
||||
# CONFIG_NLS_CODEPAGE_950 is not set
|
||||
# CONFIG_NLS_CODEPAGE_932 is not set
|
||||
# CONFIG_NLS_CODEPAGE_949 is not set
|
||||
# CONFIG_NLS_CODEPAGE_874 is not set
|
||||
# CONFIG_NLS_ISO8859_8 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1250 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1251 is not set
|
||||
# CONFIG_NLS_ASCII is not set
|
||||
# CONFIG_NLS_ISO8859_1 is not set
|
||||
# CONFIG_NLS_ISO8859_2 is not set
|
||||
# CONFIG_NLS_ISO8859_3 is not set
|
||||
# CONFIG_NLS_ISO8859_4 is not set
|
||||
# CONFIG_NLS_ISO8859_5 is not set
|
||||
# CONFIG_NLS_ISO8859_6 is not set
|
||||
# CONFIG_NLS_ISO8859_7 is not set
|
||||
# CONFIG_NLS_ISO8859_9 is not set
|
||||
# CONFIG_NLS_ISO8859_13 is not set
|
||||
# CONFIG_NLS_ISO8859_14 is not set
|
||||
# CONFIG_NLS_ISO8859_15 is not set
|
||||
# CONFIG_NLS_KOI8_R is not set
|
||||
# CONFIG_NLS_KOI8_U is not set
|
||||
# CONFIG_NLS_UTF8 is not set
|
||||
# CONFIG_DLM is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
|
|
@ -957,11 +1185,13 @@ CONFIG_CRC32=y
|
|||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_DECOMPRESS_GZIP=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAVE_LMB=y
|
||||
CONFIG_NLATTR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
|
|
@ -979,6 +1209,9 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
|
||||
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
|
|
@ -989,6 +1222,9 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
|
@ -1000,7 +1236,6 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
|
|
@ -1008,27 +1243,36 @@ CONFIG_SCHED_DEBUG=y
|
|||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
# CONFIG_KMEMCHECK is not set
|
||||
# CONFIG_PPC_DISABLE_WERROR is not set
|
||||
CONFIG_PPC_WERROR=y
|
||||
CONFIG_PRINT_STACK_DEPTH=64
|
||||
# CONFIG_DEBUG_STACKOVERFLOW is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
# CONFIG_PPC_EMULATED_STATS is not set
|
||||
# CONFIG_CODE_PATCHING_SELFTEST is not set
|
||||
# CONFIG_FTR_FIXUP_SELFTEST is not set
|
||||
# CONFIG_MSI_BITMAP_SELFTEST is not set
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.31-rc4
|
||||
# Wed Jul 29 23:32:13 2009
|
||||
# Linux kernel version: 2.6.31-rc5
|
||||
# Tue Aug 11 19:57:51 2009
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
|
|
@ -420,7 +420,90 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
|
|||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
# CONFIG_CONNECTOR is not set
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
CONFIG_MTD_CONCAT=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
# CONFIG_MTD_CFI_AMDSTD is not set
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
# CONFIG_MTD_PHYSMAP is not set
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_I2C=y
|
||||
CONFIG_OF_MDIO=y
|
||||
|
|
@ -436,6 +519,7 @@ CONFIG_BLK_DEV_LOOP=y
|
|||
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
# CONFIG_BLK_DEV_UB is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=32768
|
||||
|
|
@ -468,9 +552,38 @@ CONFIG_HAVE_IDE=y
|
|||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_DMA=y
|
||||
# CONFIG_SCSI_TGT is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
|
||||
#
|
||||
# SCSI support type (disk, tape, CD-ROM)
|
||||
#
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_CHR_DEV_ST is not set
|
||||
# CONFIG_CHR_DEV_OSST is not set
|
||||
# CONFIG_BLK_DEV_SR is not set
|
||||
# CONFIG_CHR_DEV_SG is not set
|
||||
# CONFIG_CHR_DEV_SCH is not set
|
||||
# CONFIG_SCSI_MULTI_LUN is not set
|
||||
# CONFIG_SCSI_CONSTANTS is not set
|
||||
# CONFIG_SCSI_LOGGING is not set
|
||||
# CONFIG_SCSI_SCAN_ASYNC is not set
|
||||
CONFIG_SCSI_WAIT_SCAN=m
|
||||
|
||||
#
|
||||
# SCSI Transports
|
||||
#
|
||||
# CONFIG_SCSI_SPI_ATTRS is not set
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_LIBSAS is not set
|
||||
# CONFIG_SCSI_SRP_ATTRS is not set
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_SCSI_OSD_INITIATOR is not set
|
||||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
# CONFIG_FUSION is not set
|
||||
|
|
@ -578,11 +691,21 @@ CONFIG_GIANFAR=y
|
|||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
|
||||
#
|
||||
# USB Network Adapters
|
||||
#
|
||||
# CONFIG_USB_CATC is not set
|
||||
# CONFIG_USB_KAWETH is not set
|
||||
# CONFIG_USB_PEGASUS is not set
|
||||
# CONFIG_USB_RTL8150 is not set
|
||||
# CONFIG_USB_USBNET is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_NET_FC is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
|
@ -633,9 +756,9 @@ CONFIG_DEVKMEM=y
|
|||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_PCI=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
# CONFIG_SERIAL_8250_PCI is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
|
|
@ -700,6 +823,7 @@ CONFIG_I2C_MPC=y
|
|||
#
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_TAOS_EVM is not set
|
||||
# CONFIG_I2C_TINY_USB is not set
|
||||
|
||||
#
|
||||
# Graphics adapter I2C/DDC channel drivers
|
||||
|
|
@ -814,6 +938,11 @@ CONFIG_WATCHDOG=y
|
|||
#
|
||||
# CONFIG_PCIPCWATCHDOG is not set
|
||||
# CONFIG_WDTPCI is not set
|
||||
|
||||
#
|
||||
# USB-based Watchdog Cards
|
||||
#
|
||||
# CONFIG_USBPCWATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
#
|
||||
|
|
@ -856,12 +985,134 @@ CONFIG_HID_SUPPORT=y
|
|||
CONFIG_HID=y
|
||||
# CONFIG_HID_DEBUG is not set
|
||||
# CONFIG_HIDRAW is not set
|
||||
|
||||
#
|
||||
# USB Input Devices
|
||||
#
|
||||
# CONFIG_USB_HID is not set
|
||||
# CONFIG_HID_PID is not set
|
||||
|
||||
#
|
||||
# USB HID Boot Protocol drivers
|
||||
#
|
||||
# CONFIG_USB_KBD is not set
|
||||
# CONFIG_USB_MOUSE is not set
|
||||
|
||||
#
|
||||
# Special HID drivers
|
||||
#
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
CONFIG_USB=y
|
||||
# CONFIG_USB_DEBUG is not set
|
||||
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
|
||||
|
||||
#
|
||||
# Miscellaneous USB options
|
||||
#
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
CONFIG_USB_DEVICE_CLASS=y
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
# CONFIG_USB_OTG is not set
|
||||
# CONFIG_USB_OTG_WHITELIST is not set
|
||||
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
|
||||
CONFIG_USB_MON=y
|
||||
# CONFIG_USB_WUSB is not set
|
||||
# CONFIG_USB_WUSB_CBAF is not set
|
||||
|
||||
#
|
||||
# USB Host Controller Drivers
|
||||
#
|
||||
# CONFIG_USB_C67X00_HCD is not set
|
||||
# CONFIG_USB_XHCI_HCD is not set
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_ROOT_HUB_TT=y
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
CONFIG_USB_EHCI_FSL=y
|
||||
CONFIG_USB_EHCI_HCD_PPC_OF=y
|
||||
# CONFIG_USB_OXU210HP_HCD is not set
|
||||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
# CONFIG_USB_ISP1760_HCD is not set
|
||||
# CONFIG_USB_OHCI_HCD is not set
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
# CONFIG_USB_SL811_HCD is not set
|
||||
# CONFIG_USB_R8A66597_HCD is not set
|
||||
# CONFIG_USB_WHCI_HCD is not set
|
||||
# CONFIG_USB_HWA_HCD is not set
|
||||
|
||||
#
|
||||
# USB Device Class drivers
|
||||
#
|
||||
# CONFIG_USB_ACM is not set
|
||||
# CONFIG_USB_PRINTER is not set
|
||||
# CONFIG_USB_WDM is not set
|
||||
# CONFIG_USB_TMC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
|
||||
#
|
||||
|
||||
#
|
||||
# also be needed; see USB_STORAGE Help for more info
|
||||
#
|
||||
CONFIG_USB_STORAGE=y
|
||||
# CONFIG_USB_STORAGE_DEBUG is not set
|
||||
# CONFIG_USB_STORAGE_DATAFAB is not set
|
||||
# CONFIG_USB_STORAGE_FREECOM is not set
|
||||
# CONFIG_USB_STORAGE_ISD200 is not set
|
||||
# CONFIG_USB_STORAGE_USBAT is not set
|
||||
# CONFIG_USB_STORAGE_SDDR09 is not set
|
||||
# CONFIG_USB_STORAGE_SDDR55 is not set
|
||||
# CONFIG_USB_STORAGE_JUMPSHOT is not set
|
||||
# CONFIG_USB_STORAGE_ALAUDA is not set
|
||||
# CONFIG_USB_STORAGE_ONETOUCH is not set
|
||||
# CONFIG_USB_STORAGE_KARMA is not set
|
||||
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
|
||||
# CONFIG_USB_LIBUSUAL is not set
|
||||
|
||||
#
|
||||
# USB Imaging devices
|
||||
#
|
||||
# CONFIG_USB_MDC800 is not set
|
||||
# CONFIG_USB_MICROTEK is not set
|
||||
|
||||
#
|
||||
# USB port drivers
|
||||
#
|
||||
# CONFIG_USB_SERIAL is not set
|
||||
|
||||
#
|
||||
# USB Miscellaneous drivers
|
||||
#
|
||||
# CONFIG_USB_EMI62 is not set
|
||||
# CONFIG_USB_EMI26 is not set
|
||||
# CONFIG_USB_ADUTUX is not set
|
||||
# CONFIG_USB_SEVSEG is not set
|
||||
# CONFIG_USB_RIO500 is not set
|
||||
# CONFIG_USB_LEGOTOWER is not set
|
||||
# CONFIG_USB_LCD is not set
|
||||
# CONFIG_USB_BERRY_CHARGE is not set
|
||||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_IDMOUSE is not set
|
||||
# CONFIG_USB_FTDI_ELAN is not set
|
||||
# CONFIG_USB_APPLEDISPLAY is not set
|
||||
# CONFIG_USB_SISUSBVGA is not set
|
||||
# CONFIG_USB_LD is not set
|
||||
# CONFIG_USB_TRANCEVIBRATOR is not set
|
||||
# CONFIG_USB_IOWARRIOR is not set
|
||||
# CONFIG_USB_TEST is not set
|
||||
# CONFIG_USB_ISIGHTFW is not set
|
||||
# CONFIG_USB_VST is not set
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
# CONFIG_UWB is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
|
|
@ -882,9 +1133,14 @@ CONFIG_HID=y
|
|||
#
|
||||
# File systems
|
||||
#
|
||||
# CONFIG_EXT2_FS is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_EXT4_FS is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
|
|
@ -940,6 +1196,7 @@ CONFIG_MISC_FILESYSTEMS=y
|
|||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
|
|
@ -977,7 +1234,46 @@ CONFIG_RPCSEC_GSS_KRB5=y
|
|||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_NLS is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
# CONFIG_NLS_CODEPAGE_437 is not set
|
||||
# CONFIG_NLS_CODEPAGE_737 is not set
|
||||
# CONFIG_NLS_CODEPAGE_775 is not set
|
||||
# CONFIG_NLS_CODEPAGE_850 is not set
|
||||
# CONFIG_NLS_CODEPAGE_852 is not set
|
||||
# CONFIG_NLS_CODEPAGE_855 is not set
|
||||
# CONFIG_NLS_CODEPAGE_857 is not set
|
||||
# CONFIG_NLS_CODEPAGE_860 is not set
|
||||
# CONFIG_NLS_CODEPAGE_861 is not set
|
||||
# CONFIG_NLS_CODEPAGE_862 is not set
|
||||
# CONFIG_NLS_CODEPAGE_863 is not set
|
||||
# CONFIG_NLS_CODEPAGE_864 is not set
|
||||
# CONFIG_NLS_CODEPAGE_865 is not set
|
||||
# CONFIG_NLS_CODEPAGE_866 is not set
|
||||
# CONFIG_NLS_CODEPAGE_869 is not set
|
||||
# CONFIG_NLS_CODEPAGE_936 is not set
|
||||
# CONFIG_NLS_CODEPAGE_950 is not set
|
||||
# CONFIG_NLS_CODEPAGE_932 is not set
|
||||
# CONFIG_NLS_CODEPAGE_949 is not set
|
||||
# CONFIG_NLS_CODEPAGE_874 is not set
|
||||
# CONFIG_NLS_ISO8859_8 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1250 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1251 is not set
|
||||
# CONFIG_NLS_ASCII is not set
|
||||
# CONFIG_NLS_ISO8859_1 is not set
|
||||
# CONFIG_NLS_ISO8859_2 is not set
|
||||
# CONFIG_NLS_ISO8859_3 is not set
|
||||
# CONFIG_NLS_ISO8859_4 is not set
|
||||
# CONFIG_NLS_ISO8859_5 is not set
|
||||
# CONFIG_NLS_ISO8859_6 is not set
|
||||
# CONFIG_NLS_ISO8859_7 is not set
|
||||
# CONFIG_NLS_ISO8859_9 is not set
|
||||
# CONFIG_NLS_ISO8859_13 is not set
|
||||
# CONFIG_NLS_ISO8859_14 is not set
|
||||
# CONFIG_NLS_ISO8859_15 is not set
|
||||
# CONFIG_NLS_KOI8_R is not set
|
||||
# CONFIG_NLS_KOI8_U is not set
|
||||
# CONFIG_NLS_UTF8 is not set
|
||||
# CONFIG_DLM is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.31-rc4
|
||||
# Wed Jul 29 23:31:51 2009
|
||||
# Linux kernel version: 2.6.31-rc5
|
||||
# Fri Aug 7 08:19:15 2009
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
|
|
@ -158,6 +158,7 @@ CONFIG_BASE_SMALL=0
|
|||
# CONFIG_MODULES is not set
|
||||
CONFIG_BLOCK=y
|
||||
CONFIG_LBDAF=y
|
||||
CONFIG_BLK_DEV_BSG=y
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
#
|
||||
|
|
@ -506,6 +507,7 @@ CONFIG_MTD_PHYSMAP_OF=y
|
|||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_I2C=y
|
||||
CONFIG_OF_MDIO=y
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
|
|
@ -582,7 +584,8 @@ CONFIG_PHYLIB=y
|
|||
# CONFIG_STE10XP is not set
|
||||
# CONFIG_LSI_ET1011C_PHY is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
# CONFIG_MDIO_GPIO is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_MACE is not set
|
||||
|
|
@ -608,8 +611,8 @@ CONFIG_MII=y
|
|||
# CONFIG_ATL2 is not set
|
||||
CONFIG_FS_ENET=y
|
||||
CONFIG_FS_ENET_HAS_SCC=y
|
||||
# CONFIG_FS_ENET_HAS_FCC is not set
|
||||
# CONFIG_FS_ENET_MDIO_FCC is not set
|
||||
CONFIG_FS_ENET_HAS_FCC=y
|
||||
CONFIG_FS_ENET_MDIO_FCC=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_TR is not set
|
||||
|
|
@ -680,7 +683,68 @@ CONFIG_HW_RANDOM=y
|
|||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
|
||||
#
|
||||
# PC SMBus host controller drivers
|
||||
#
|
||||
# CONFIG_I2C_ALI1535 is not set
|
||||
# CONFIG_I2C_ALI15X3 is not set
|
||||
# CONFIG_I2C_AMD756 is not set
|
||||
# CONFIG_I2C_AMD8111 is not set
|
||||
# CONFIG_I2C_I801 is not set
|
||||
# CONFIG_I2C_ISCH is not set
|
||||
# CONFIG_I2C_PIIX4 is not set
|
||||
# CONFIG_I2C_NFORCE2 is not set
|
||||
# CONFIG_I2C_SIS5595 is not set
|
||||
# CONFIG_I2C_SIS630 is not set
|
||||
# CONFIG_I2C_SIS96X is not set
|
||||
# CONFIG_I2C_VIAPRO is not set
|
||||
|
||||
#
|
||||
# Mac SMBus host controller drivers
|
||||
#
|
||||
# CONFIG_I2C_POWERMAC is not set
|
||||
|
||||
#
|
||||
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||
#
|
||||
CONFIG_I2C_CPM=y
|
||||
# CONFIG_I2C_DESIGNWARE is not set
|
||||
# CONFIG_I2C_GPIO is not set
|
||||
# CONFIG_I2C_MPC is not set
|
||||
# CONFIG_I2C_SIMTEC is not set
|
||||
|
||||
#
|
||||
# External I2C/SMBus adapter drivers
|
||||
#
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
|
||||
#
|
||||
# Graphics adapter I2C/DDC channel drivers
|
||||
#
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
|
||||
#
|
||||
# Other I2C/SMBus bus drivers
|
||||
#
|
||||
# CONFIG_I2C_PCA_PLATFORM is not set
|
||||
|
||||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
# CONFIG_SPI is not set
|
||||
|
||||
#
|
||||
|
|
@ -699,6 +763,9 @@ CONFIG_GPIOLIB=y
|
|||
#
|
||||
# I2C GPIO expanders:
|
||||
#
|
||||
# CONFIG_GPIO_MAX732X is not set
|
||||
# CONFIG_GPIO_PCA953X is not set
|
||||
# CONFIG_GPIO_PCF857X is not set
|
||||
|
||||
#
|
||||
# PCI GPIO expanders:
|
||||
|
|
@ -727,7 +794,14 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_TPS65010 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
|
|
|
|||
|
|
@ -203,6 +203,7 @@ CONFIG_MPC85xx_CDS=y
|
|||
CONFIG_MPC85xx_MDS=y
|
||||
CONFIG_MPC8536_DS=y
|
||||
CONFIG_MPC85xx_DS=y
|
||||
CONFIG_MPC85xx_RDB=y
|
||||
CONFIG_SOCRATES=y
|
||||
CONFIG_KSI8560=y
|
||||
# CONFIG_XES_MPC85xx is not set
|
||||
|
|
|
|||
|
|
@ -56,174 +56,102 @@
|
|||
#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
|
||||
#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
|
||||
|
||||
/* Macro for generating the ***_bits() functions */
|
||||
#define DEFINE_BITOP(fn, op, prefix, postfix) \
|
||||
static __inline__ void fn(unsigned long mask, \
|
||||
volatile unsigned long *_p) \
|
||||
{ \
|
||||
unsigned long old; \
|
||||
unsigned long *p = (unsigned long *)_p; \
|
||||
__asm__ __volatile__ ( \
|
||||
prefix \
|
||||
"1:" PPC_LLARX "%0,0,%3\n" \
|
||||
stringify_in_c(op) "%0,%0,%2\n" \
|
||||
PPC405_ERR77(0,%3) \
|
||||
PPC_STLCX "%0,0,%3\n" \
|
||||
"bne- 1b\n" \
|
||||
postfix \
|
||||
: "=&r" (old), "+m" (*p) \
|
||||
: "r" (mask), "r" (p) \
|
||||
: "cc", "memory"); \
|
||||
}
|
||||
|
||||
DEFINE_BITOP(set_bits, or, "", "")
|
||||
DEFINE_BITOP(clear_bits, andc, "", "")
|
||||
DEFINE_BITOP(clear_bits_unlock, andc, LWSYNC_ON_SMP, "")
|
||||
DEFINE_BITOP(change_bits, xor, "", "")
|
||||
|
||||
static __inline__ void set_bit(int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1:" PPC_LLARX "%0,0,%3 # set_bit\n"
|
||||
"or %0,%0,%2\n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%0,0,%3\n"
|
||||
"bne- 1b"
|
||||
: "=&r" (old), "+m" (*p)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc" );
|
||||
set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
|
||||
}
|
||||
|
||||
static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1:" PPC_LLARX "%0,0,%3 # clear_bit\n"
|
||||
"andc %0,%0,%2\n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%0,0,%3\n"
|
||||
"bne- 1b"
|
||||
: "=&r" (old), "+m" (*p)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc" );
|
||||
clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
|
||||
}
|
||||
|
||||
static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
LWSYNC_ON_SMP
|
||||
"1:" PPC_LLARX "%0,0,%3 # clear_bit_unlock\n"
|
||||
"andc %0,%0,%2\n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%0,0,%3\n"
|
||||
"bne- 1b"
|
||||
: "=&r" (old), "+m" (*p)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc", "memory");
|
||||
clear_bits_unlock(BITOP_MASK(nr), addr + BITOP_WORD(nr));
|
||||
}
|
||||
|
||||
static __inline__ void change_bit(int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1:" PPC_LLARX "%0,0,%3 # change_bit\n"
|
||||
"xor %0,%0,%2\n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%0,0,%3\n"
|
||||
"bne- 1b"
|
||||
: "=&r" (old), "+m" (*p)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc" );
|
||||
change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
|
||||
}
|
||||
|
||||
/* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
|
||||
* operands. */
|
||||
#define DEFINE_TESTOP(fn, op, prefix, postfix) \
|
||||
static __inline__ unsigned long fn( \
|
||||
unsigned long mask, \
|
||||
volatile unsigned long *_p) \
|
||||
{ \
|
||||
unsigned long old, t; \
|
||||
unsigned long *p = (unsigned long *)_p; \
|
||||
__asm__ __volatile__ ( \
|
||||
prefix \
|
||||
"1:" PPC_LLARX "%0,0,%3\n" \
|
||||
stringify_in_c(op) "%1,%0,%2\n" \
|
||||
PPC405_ERR77(0,%3) \
|
||||
PPC_STLCX "%1,0,%3\n" \
|
||||
"bne- 1b\n" \
|
||||
postfix \
|
||||
: "=&r" (old), "=&r" (t) \
|
||||
: "r" (mask), "r" (p) \
|
||||
: "cc", "memory"); \
|
||||
return (old & mask); \
|
||||
}
|
||||
|
||||
DEFINE_TESTOP(test_and_set_bits, or, LWSYNC_ON_SMP, ISYNC_ON_SMP)
|
||||
DEFINE_TESTOP(test_and_set_bits_lock, or, "", ISYNC_ON_SMP)
|
||||
DEFINE_TESTOP(test_and_clear_bits, andc, LWSYNC_ON_SMP, ISYNC_ON_SMP)
|
||||
DEFINE_TESTOP(test_and_change_bits, xor, LWSYNC_ON_SMP, ISYNC_ON_SMP)
|
||||
|
||||
static __inline__ int test_and_set_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old, t;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
LWSYNC_ON_SMP
|
||||
"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n"
|
||||
"or %1,%0,%2 \n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%1,0,%3 \n"
|
||||
"bne- 1b"
|
||||
ISYNC_ON_SMP
|
||||
: "=&r" (old), "=&r" (t)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc", "memory");
|
||||
|
||||
return (old & mask) != 0;
|
||||
return test_and_set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
|
||||
}
|
||||
|
||||
static __inline__ int test_and_set_bit_lock(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old, t;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit_lock\n"
|
||||
"or %1,%0,%2 \n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%1,0,%3 \n"
|
||||
"bne- 1b"
|
||||
ISYNC_ON_SMP
|
||||
: "=&r" (old), "=&r" (t)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc", "memory");
|
||||
|
||||
return (old & mask) != 0;
|
||||
return test_and_set_bits_lock(BITOP_MASK(nr),
|
||||
addr + BITOP_WORD(nr)) != 0;
|
||||
}
|
||||
|
||||
static __inline__ int test_and_clear_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old, t;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
LWSYNC_ON_SMP
|
||||
"1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n"
|
||||
"andc %1,%0,%2 \n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%1,0,%3 \n"
|
||||
"bne- 1b"
|
||||
ISYNC_ON_SMP
|
||||
: "=&r" (old), "=&r" (t)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc", "memory");
|
||||
|
||||
return (old & mask) != 0;
|
||||
return test_and_clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
|
||||
}
|
||||
|
||||
static __inline__ int test_and_change_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long old, t;
|
||||
unsigned long mask = BITOP_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
|
||||
|
||||
__asm__ __volatile__(
|
||||
LWSYNC_ON_SMP
|
||||
"1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n"
|
||||
"xor %1,%0,%2 \n"
|
||||
PPC405_ERR77(0,%3)
|
||||
PPC_STLCX "%1,0,%3 \n"
|
||||
"bne- 1b"
|
||||
ISYNC_ON_SMP
|
||||
: "=&r" (old), "=&r" (t)
|
||||
: "r" (mask), "r" (p)
|
||||
: "cc", "memory");
|
||||
|
||||
return (old & mask) != 0;
|
||||
}
|
||||
|
||||
static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
|
||||
{
|
||||
unsigned long old;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1:" PPC_LLARX "%0,0,%3 # set_bits\n"
|
||||
"or %0,%0,%2\n"
|
||||
PPC_STLCX "%0,0,%3\n"
|
||||
"bne- 1b"
|
||||
: "=&r" (old), "+m" (*addr)
|
||||
: "r" (mask), "r" (addr)
|
||||
: "cc");
|
||||
return test_and_change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
|
||||
}
|
||||
|
||||
#include <asm-generic/bitops/non-atomic.h>
|
||||
|
|
|
|||
|
|
@ -303,6 +303,17 @@ struct cbe_mic_tm_regs {
|
|||
extern struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np);
|
||||
extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu);
|
||||
|
||||
|
||||
/* Cell page table entries */
|
||||
#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
|
||||
#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
|
||||
#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
|
||||
#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
|
||||
#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
|
||||
#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
|
||||
#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
|
||||
#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
|
||||
|
||||
/* some utility functions to deal with SMT */
|
||||
extern u32 cbe_get_hw_thread_id(int cpu);
|
||||
extern u32 cbe_cpu_to_node(int cpu);
|
||||
|
|
|
|||
|
|
@ -5,6 +5,15 @@
|
|||
|
||||
/*
|
||||
* Mapping of threads to cores
|
||||
*
|
||||
* Note: This implementation is limited to a power of 2 number of
|
||||
* threads per core and the same number for each core in the system
|
||||
* (though it would work if some processors had less threads as long
|
||||
* as the CPU numbers are still allocated, just not brought offline).
|
||||
*
|
||||
* However, the API allows for a different implementation in the future
|
||||
* if needed, as long as you only use the functions and not the variables
|
||||
* directly.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
|
@ -67,5 +76,12 @@ static inline int cpu_first_thread_in_core(int cpu)
|
|||
return cpu & ~(threads_per_core - 1);
|
||||
}
|
||||
|
||||
static inline int cpu_last_thread_in_core(int cpu)
|
||||
{
|
||||
return cpu | (threads_per_core - 1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
#endif /* _ASM_POWERPC_CPUTHREADS_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef _ASM_POWERPC_DEVICE_H
|
||||
#define _ASM_POWERPC_DEVICE_H
|
||||
|
||||
struct dma_mapping_ops;
|
||||
struct dma_map_ops;
|
||||
struct device_node;
|
||||
|
||||
struct dev_archdata {
|
||||
|
|
@ -14,8 +14,11 @@ struct dev_archdata {
|
|||
struct device_node *of_node;
|
||||
|
||||
/* DMA operations on that device */
|
||||
struct dma_mapping_ops *dma_ops;
|
||||
struct dma_map_ops *dma_ops;
|
||||
void *dma_data;
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
dma_addr_t max_direct_dma_addr;
|
||||
#endif
|
||||
};
|
||||
|
||||
static inline void dev_archdata_set_node(struct dev_archdata *ad,
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/dma-attrs.h>
|
||||
#include <linux/dma-debug.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/swiotlb.h>
|
||||
|
||||
|
|
@ -63,59 +64,15 @@ static inline unsigned long device_to_mask(struct device *dev)
|
|||
return 0xfffffffful;
|
||||
}
|
||||
|
||||
/*
|
||||
* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
|
||||
*/
|
||||
struct dma_mapping_ops {
|
||||
void * (*alloc_coherent)(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
void (*free_coherent)(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
int (*map_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs);
|
||||
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs);
|
||||
int (*dma_supported)(struct device *dev, u64 mask);
|
||||
int (*set_dma_mask)(struct device *dev, u64 dma_mask);
|
||||
dma_addr_t (*map_page)(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs);
|
||||
void (*unmap_page)(struct device *dev,
|
||||
dma_addr_t dma_address, size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs);
|
||||
int (*addr_needs_map)(struct device *dev, dma_addr_t addr,
|
||||
size_t size);
|
||||
#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
|
||||
void (*sync_single_range_for_cpu)(struct device *hwdev,
|
||||
dma_addr_t dma_handle, unsigned long offset,
|
||||
size_t size,
|
||||
enum dma_data_direction direction);
|
||||
void (*sync_single_range_for_device)(struct device *hwdev,
|
||||
dma_addr_t dma_handle, unsigned long offset,
|
||||
size_t size,
|
||||
enum dma_data_direction direction);
|
||||
void (*sync_sg_for_cpu)(struct device *hwdev,
|
||||
struct scatterlist *sg, int nelems,
|
||||
enum dma_data_direction direction);
|
||||
void (*sync_sg_for_device)(struct device *hwdev,
|
||||
struct scatterlist *sg, int nelems,
|
||||
enum dma_data_direction direction);
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
* Available generic sets of operations
|
||||
*/
|
||||
#ifdef CONFIG_PPC64
|
||||
extern struct dma_mapping_ops dma_iommu_ops;
|
||||
extern struct dma_map_ops dma_iommu_ops;
|
||||
#endif
|
||||
extern struct dma_mapping_ops dma_direct_ops;
|
||||
extern struct dma_map_ops dma_direct_ops;
|
||||
|
||||
static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
|
||||
static inline struct dma_map_ops *get_dma_ops(struct device *dev)
|
||||
{
|
||||
/* We don't handle the NULL dev case for ISA for now. We could
|
||||
* do it via an out of line call but it is not needed for now. The
|
||||
|
|
@ -128,14 +85,19 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
|
|||
return dev->archdata.dma_ops;
|
||||
}
|
||||
|
||||
static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops)
|
||||
static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
|
||||
{
|
||||
dev->archdata.dma_ops = ops;
|
||||
}
|
||||
|
||||
/* this will be removed soon */
|
||||
#define flush_write_buffers()
|
||||
|
||||
#include <asm-generic/dma-mapping-common.h>
|
||||
|
||||
static inline int dma_supported(struct device *dev, u64 mask)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
struct dma_map_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
if (unlikely(dma_ops == NULL))
|
||||
return 0;
|
||||
|
|
@ -149,7 +111,7 @@ static inline int dma_supported(struct device *dev, u64 mask)
|
|||
|
||||
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
struct dma_map_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
if (unlikely(dma_ops == NULL))
|
||||
return -EIO;
|
||||
|
|
@ -161,262 +123,40 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* map_/unmap_single actually call through to map/unmap_page now that all the
|
||||
* dma_mapping_ops have been converted over. We just have to get the page and
|
||||
* offset to pass through to map_page
|
||||
*/
|
||||
static inline dma_addr_t dma_map_single_attrs(struct device *dev,
|
||||
void *cpu_addr,
|
||||
size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
return dma_ops->map_page(dev, virt_to_page(cpu_addr),
|
||||
(unsigned long)cpu_addr % PAGE_SIZE, size,
|
||||
direction, attrs);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_single_attrs(struct device *dev,
|
||||
dma_addr_t dma_addr,
|
||||
size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
|
||||
}
|
||||
|
||||
static inline dma_addr_t dma_map_page_attrs(struct device *dev,
|
||||
struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
return dma_ops->map_page(dev, page, offset, size, direction, attrs);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_page_attrs(struct device *dev,
|
||||
dma_addr_t dma_address,
|
||||
size_t size,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
|
||||
}
|
||||
|
||||
static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
return dma_ops->map_sg(dev, sg, nents, direction, attrs);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_sg_attrs(struct device *dev,
|
||||
struct scatterlist *sg,
|
||||
int nhwentries,
|
||||
enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
|
||||
}
|
||||
|
||||
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
struct dma_map_ops *dma_ops = get_dma_ops(dev);
|
||||
void *cpu_addr;
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
|
||||
|
||||
cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag);
|
||||
|
||||
debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
|
||||
|
||||
return cpu_addr;
|
||||
}
|
||||
|
||||
static inline void dma_free_coherent(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t dma_handle)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
struct dma_map_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
||||
|
||||
dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
|
||||
}
|
||||
|
||||
static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
|
||||
size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
|
||||
}
|
||||
|
||||
static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
|
||||
size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
|
||||
}
|
||||
|
||||
static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction direction)
|
||||
{
|
||||
return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
|
||||
}
|
||||
|
||||
static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nhwentries,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
|
||||
static inline void dma_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_single_range_for_cpu)
|
||||
dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
|
||||
size, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_single_range_for_device)
|
||||
dma_ops->sync_single_range_for_device(dev, dma_handle,
|
||||
0, size, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_sg_for_cpu(struct device *dev,
|
||||
struct scatterlist *sgl, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_sg_for_cpu)
|
||||
dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_sg_for_device(struct device *dev,
|
||||
struct scatterlist *sgl, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_sg_for_device)
|
||||
dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_single_range_for_cpu)
|
||||
dma_ops->sync_single_range_for_cpu(dev, dma_handle,
|
||||
offset, size, direction);
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
BUG_ON(!dma_ops);
|
||||
|
||||
if (dma_ops->sync_single_range_for_device)
|
||||
dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
|
||||
size, direction);
|
||||
}
|
||||
#else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
|
||||
static inline void dma_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dma_sync_sg_for_cpu(struct device *dev,
|
||||
struct scatterlist *sgl, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dma_sync_sg_for_device(struct device *dev,
|
||||
struct scatterlist *sgl, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dma_sync_single_range_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
||||
{
|
||||
struct dma_map_ops *dma_ops = get_dma_ops(dev);
|
||||
|
||||
if (dma_ops->mapping_error)
|
||||
return dma_ops->mapping_error(dev, dma_addr);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
return (dma_addr == DMA_ERROR_CODE);
|
||||
#else
|
||||
|
|
@ -426,10 +166,12 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|||
|
||||
static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
|
||||
{
|
||||
struct dma_mapping_ops *ops = get_dma_ops(dev);
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
struct dev_archdata *sd = &dev->archdata;
|
||||
|
||||
if (ops->addr_needs_map && ops->addr_needs_map(dev, addr, size))
|
||||
if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
if (!dev->dma_mask)
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,205 @@
|
|||
/*
|
||||
* Definitions for use by exception code on Book3-E
|
||||
*
|
||||
* Copyright (C) 2008 Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#ifndef _ASM_POWERPC_EXCEPTION_64E_H
|
||||
#define _ASM_POWERPC_EXCEPTION_64E_H
|
||||
|
||||
/*
|
||||
* SPRGs usage an other considerations...
|
||||
*
|
||||
* Since TLB miss and other standard exceptions can be interrupted by
|
||||
* critical exceptions which can themselves be interrupted by machine
|
||||
* checks, and since the two later can themselves cause a TLB miss when
|
||||
* hitting the linear mapping for the kernel stacks, we need to be a bit
|
||||
* creative on how we use SPRGs.
|
||||
*
|
||||
* The base idea is that we have one SRPG reserved for critical and one
|
||||
* for machine check interrupts. Those are used to save a GPR that can
|
||||
* then be used to get the PACA, and store as much context as we need
|
||||
* to save in there. That includes saving the SPRGs used by the TLB miss
|
||||
* handler for linear mapping misses and the associated SRR0/1 due to
|
||||
* the above re-entrancy issue.
|
||||
*
|
||||
* So here's the current usage pattern. It's done regardless of which
|
||||
* SPRGs are user-readable though, thus we might have to change some of
|
||||
* this later. In order to do that more easily, we use special constants
|
||||
* for naming them
|
||||
*
|
||||
* WARNING: Some of these SPRGs are user readable. We need to do something
|
||||
* about it as some point by making sure they can't be used to leak kernel
|
||||
* critical data
|
||||
*/
|
||||
|
||||
|
||||
/* We are out of SPRGs so we save some things in the PACA. The normal
|
||||
* exception frame is smaller than the CRIT or MC one though
|
||||
*/
|
||||
#define EX_R1 (0 * 8)
|
||||
#define EX_CR (1 * 8)
|
||||
#define EX_R10 (2 * 8)
|
||||
#define EX_R11 (3 * 8)
|
||||
#define EX_R14 (4 * 8)
|
||||
#define EX_R15 (5 * 8)
|
||||
|
||||
/* The TLB miss exception uses different slots */
|
||||
|
||||
#define EX_TLB_R10 ( 0 * 8)
|
||||
#define EX_TLB_R11 ( 1 * 8)
|
||||
#define EX_TLB_R12 ( 2 * 8)
|
||||
#define EX_TLB_R13 ( 3 * 8)
|
||||
#define EX_TLB_R14 ( 4 * 8)
|
||||
#define EX_TLB_R15 ( 5 * 8)
|
||||
#define EX_TLB_R16 ( 6 * 8)
|
||||
#define EX_TLB_CR ( 7 * 8)
|
||||
#define EX_TLB_DEAR ( 8 * 8) /* Level 0 and 2 only */
|
||||
#define EX_TLB_ESR ( 9 * 8) /* Level 0 and 2 only */
|
||||
#define EX_TLB_SRR0 (10 * 8)
|
||||
#define EX_TLB_SRR1 (11 * 8)
|
||||
#define EX_TLB_MMUCR0 (12 * 8) /* Level 0 */
|
||||
#define EX_TLB_MAS1 (12 * 8) /* Level 0 */
|
||||
#define EX_TLB_MAS2 (13 * 8) /* Level 0 */
|
||||
#ifdef CONFIG_BOOK3E_MMU_TLB_STATS
|
||||
#define EX_TLB_R8 (14 * 8)
|
||||
#define EX_TLB_R9 (15 * 8)
|
||||
#define EX_TLB_LR (16 * 8)
|
||||
#define EX_TLB_SIZE (17 * 8)
|
||||
#else
|
||||
#define EX_TLB_SIZE (14 * 8)
|
||||
#endif
|
||||
|
||||
#define START_EXCEPTION(label) \
|
||||
.globl exc_##label##_book3e; \
|
||||
exc_##label##_book3e:
|
||||
|
||||
/* TLB miss exception prolog
|
||||
*
|
||||
* This prolog handles re-entrancy (up to 3 levels supported in the PACA
|
||||
* though we currently don't test for overflow). It provides you with a
|
||||
* re-entrancy safe working space of r10...r16 and CR with r12 being used
|
||||
* as the exception area pointer in the PACA for that level of re-entrancy
|
||||
* and r13 containing the PACA pointer.
|
||||
*
|
||||
* SRR0 and SRR1 are saved, but DEAR and ESR are not, since they don't apply
|
||||
* as-is for instruction exceptions. It's up to the actual exception code
|
||||
* to save them as well if required.
|
||||
*/
|
||||
#define TLB_MISS_PROLOG \
|
||||
mtspr SPRN_SPRG_TLB_SCRATCH,r12; \
|
||||
mfspr r12,SPRN_SPRG_TLB_EXFRAME; \
|
||||
std r10,EX_TLB_R10(r12); \
|
||||
mfcr r10; \
|
||||
std r11,EX_TLB_R11(r12); \
|
||||
mfspr r11,SPRN_SPRG_TLB_SCRATCH; \
|
||||
std r13,EX_TLB_R13(r12); \
|
||||
mfspr r13,SPRN_SPRG_PACA; \
|
||||
std r14,EX_TLB_R14(r12); \
|
||||
addi r14,r12,EX_TLB_SIZE; \
|
||||
std r15,EX_TLB_R15(r12); \
|
||||
mfspr r15,SPRN_SRR1; \
|
||||
std r16,EX_TLB_R16(r12); \
|
||||
mfspr r16,SPRN_SRR0; \
|
||||
std r10,EX_TLB_CR(r12); \
|
||||
std r11,EX_TLB_R12(r12); \
|
||||
mtspr SPRN_SPRG_TLB_EXFRAME,r14; \
|
||||
std r15,EX_TLB_SRR1(r12); \
|
||||
std r16,EX_TLB_SRR0(r12); \
|
||||
TLB_MISS_PROLOG_STATS
|
||||
|
||||
/* And these are the matching epilogs that restores things
|
||||
*
|
||||
* There are 3 epilogs:
|
||||
*
|
||||
* - SUCCESS : Unwinds one level
|
||||
* - ERROR : restore from level 0 and reset
|
||||
* - ERROR_SPECIAL : restore from current level and reset
|
||||
*
|
||||
* Normal errors use ERROR, that is, they restore the initial fault context
|
||||
* and trigger a fault. However, there is a special case for linear mapping
|
||||
* errors. Those should basically never happen, but if they do happen, we
|
||||
* want the error to point out the context that did that linear mapping
|
||||
* fault, not the initial level 0 (basically, we got a bogus PGF or something
|
||||
* like that). For userland errors on the linear mapping, there is no
|
||||
* difference since those are always level 0 anyway
|
||||
*/
|
||||
|
||||
#define TLB_MISS_RESTORE(freg) \
|
||||
ld r14,EX_TLB_CR(r12); \
|
||||
ld r10,EX_TLB_R10(r12); \
|
||||
ld r15,EX_TLB_SRR0(r12); \
|
||||
ld r16,EX_TLB_SRR1(r12); \
|
||||
mtspr SPRN_SPRG_TLB_EXFRAME,freg; \
|
||||
ld r11,EX_TLB_R11(r12); \
|
||||
mtcr r14; \
|
||||
ld r13,EX_TLB_R13(r12); \
|
||||
ld r14,EX_TLB_R14(r12); \
|
||||
mtspr SPRN_SRR0,r15; \
|
||||
ld r15,EX_TLB_R15(r12); \
|
||||
mtspr SPRN_SRR1,r16; \
|
||||
TLB_MISS_RESTORE_STATS \
|
||||
ld r16,EX_TLB_R16(r12); \
|
||||
ld r12,EX_TLB_R12(r12); \
|
||||
|
||||
#define TLB_MISS_EPILOG_SUCCESS \
|
||||
TLB_MISS_RESTORE(r12)
|
||||
|
||||
#define TLB_MISS_EPILOG_ERROR \
|
||||
addi r12,r13,PACA_EXTLB; \
|
||||
TLB_MISS_RESTORE(r12)
|
||||
|
||||
#define TLB_MISS_EPILOG_ERROR_SPECIAL \
|
||||
addi r11,r13,PACA_EXTLB; \
|
||||
TLB_MISS_RESTORE(r11)
|
||||
|
||||
#ifdef CONFIG_BOOK3E_MMU_TLB_STATS
|
||||
#define TLB_MISS_PROLOG_STATS \
|
||||
mflr r10; \
|
||||
std r8,EX_TLB_R8(r12); \
|
||||
std r9,EX_TLB_R9(r12); \
|
||||
std r10,EX_TLB_LR(r12);
|
||||
#define TLB_MISS_RESTORE_STATS \
|
||||
ld r16,EX_TLB_LR(r12); \
|
||||
ld r9,EX_TLB_R9(r12); \
|
||||
ld r8,EX_TLB_R8(r12); \
|
||||
mtlr r16;
|
||||
#define TLB_MISS_STATS_D(name) \
|
||||
addi r9,r13,MMSTAT_DSTATS+name; \
|
||||
bl .tlb_stat_inc;
|
||||
#define TLB_MISS_STATS_I(name) \
|
||||
addi r9,r13,MMSTAT_ISTATS+name; \
|
||||
bl .tlb_stat_inc;
|
||||
#define TLB_MISS_STATS_X(name) \
|
||||
ld r8,PACA_EXTLB+EX_TLB_ESR(r13); \
|
||||
cmpdi cr2,r8,-1; \
|
||||
beq cr2,61f; \
|
||||
addi r9,r13,MMSTAT_DSTATS+name; \
|
||||
b 62f; \
|
||||
61: addi r9,r13,MMSTAT_ISTATS+name; \
|
||||
62: bl .tlb_stat_inc;
|
||||
#define TLB_MISS_STATS_SAVE_INFO \
|
||||
std r14,EX_TLB_ESR(r12); /* save ESR */ \
|
||||
|
||||
|
||||
#else
|
||||
#define TLB_MISS_PROLOG_STATS
|
||||
#define TLB_MISS_RESTORE_STATS
|
||||
#define TLB_MISS_STATS_D(name)
|
||||
#define TLB_MISS_STATS_I(name)
|
||||
#define TLB_MISS_STATS_X(name)
|
||||
#define TLB_MISS_STATS_Y(name)
|
||||
#define TLB_MISS_STATS_SAVE_INFO
|
||||
#endif
|
||||
|
||||
#define SET_IVOR(vector_number, vector_offset) \
|
||||
li r3,vector_offset@l; \
|
||||
ori r3,r3,interrupt_base_book3e@l; \
|
||||
mtspr SPRN_IVOR##vector_number,r3;
|
||||
|
||||
#endif /* _ASM_POWERPC_EXCEPTION_64E_H */
|
||||
|
||||
|
|
@ -57,17 +57,16 @@
|
|||
addi reg,reg,(label)-_stext; /* virt addr of handler ... */
|
||||
|
||||
#define EXCEPTION_PROLOG_1(area) \
|
||||
mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
|
||||
mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \
|
||||
std r9,area+EX_R9(r13); /* save r9 - r12 */ \
|
||||
std r10,area+EX_R10(r13); \
|
||||
std r11,area+EX_R11(r13); \
|
||||
std r12,area+EX_R12(r13); \
|
||||
mfspr r9,SPRN_SPRG1; \
|
||||
mfspr r9,SPRN_SPRG_SCRATCH0; \
|
||||
std r9,area+EX_R13(r13); \
|
||||
mfcr r9
|
||||
|
||||
#define EXCEPTION_PROLOG_PSERIES(area, label) \
|
||||
EXCEPTION_PROLOG_1(area); \
|
||||
#define EXCEPTION_PROLOG_PSERIES_1(label) \
|
||||
ld r12,PACAKBASE(r13); /* get high part of &label */ \
|
||||
ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
|
||||
mfspr r11,SPRN_SRR0; /* save SRR0 */ \
|
||||
|
|
@ -78,6 +77,10 @@
|
|||
rfid; \
|
||||
b . /* prevent speculative execution */
|
||||
|
||||
#define EXCEPTION_PROLOG_PSERIES(area, label) \
|
||||
EXCEPTION_PROLOG_1(area); \
|
||||
EXCEPTION_PROLOG_PSERIES_1(label);
|
||||
|
||||
/*
|
||||
* The common exception prolog is used for all except a few exceptions
|
||||
* such as a segment miss on a kernel address. We have to be prepared
|
||||
|
|
@ -144,7 +147,7 @@
|
|||
.globl label##_pSeries; \
|
||||
label##_pSeries: \
|
||||
HMT_MEDIUM; \
|
||||
mtspr SPRN_SPRG1,r13; /* save r13 */ \
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
|
||||
|
||||
#define HSTD_EXCEPTION_PSERIES(n, label) \
|
||||
|
|
@ -152,13 +155,13 @@ label##_pSeries: \
|
|||
.globl label##_pSeries; \
|
||||
label##_pSeries: \
|
||||
HMT_MEDIUM; \
|
||||
mtspr SPRN_SPRG1,r20; /* save r20 */ \
|
||||
mtspr SPRN_SPRG_SCRATCH0,r20; /* save r20 */ \
|
||||
mfspr r20,SPRN_HSRR0; /* copy HSRR0 to SRR0 */ \
|
||||
mtspr SPRN_SRR0,r20; \
|
||||
mfspr r20,SPRN_HSRR1; /* copy HSRR0 to SRR0 */ \
|
||||
mtspr SPRN_SRR1,r20; \
|
||||
mfspr r20,SPRN_SPRG1; /* restore r20 */ \
|
||||
mtspr SPRN_SPRG1,r13; /* save r13 */ \
|
||||
mfspr r20,SPRN_SPRG_SCRATCH0; /* restore r20 */ \
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
|
||||
|
||||
|
||||
|
|
@ -167,15 +170,15 @@ label##_pSeries: \
|
|||
.globl label##_pSeries; \
|
||||
label##_pSeries: \
|
||||
HMT_MEDIUM; \
|
||||
mtspr SPRN_SPRG1,r13; /* save r13 */ \
|
||||
mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
|
||||
mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \
|
||||
std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
|
||||
std r10,PACA_EXGEN+EX_R10(r13); \
|
||||
lbz r10,PACASOFTIRQEN(r13); \
|
||||
mfcr r9; \
|
||||
cmpwi r10,0; \
|
||||
beq masked_interrupt; \
|
||||
mfspr r10,SPRN_SPRG1; \
|
||||
mfspr r10,SPRN_SPRG_SCRATCH0; \
|
||||
std r10,PACA_EXGEN+EX_R13(r13); \
|
||||
std r11,PACA_EXGEN+EX_R11(r13); \
|
||||
std r12,PACA_EXGEN+EX_R12(r13); \
|
||||
|
|
@ -1,29 +1 @@
|
|||
#ifndef _ASM_POWERPC_HARDIRQ_H
|
||||
#define _ASM_POWERPC_HARDIRQ_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/bug.h>
|
||||
|
||||
/* The __last_jiffy_stamp field is needed to ensure that no decrementer
|
||||
* interrupt is lost on SMP machines. Since on most CPUs it is in the same
|
||||
* cache line as local_irq_count, it is cheap to access and is also used on UP
|
||||
* for uniformity.
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending; /* set_bit is used on this */
|
||||
unsigned int __last_jiffy_stamp;
|
||||
} ____cacheline_aligned irq_cpustat_t;
|
||||
|
||||
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
|
||||
|
||||
#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp)
|
||||
|
||||
static inline void ack_bad_irq(int irq)
|
||||
{
|
||||
printk(KERN_CRIT "illegal vector %d received!\n", irq);
|
||||
BUG();
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_HARDIRQ_H */
|
||||
#include <asm-generic/hardirq.h>
|
||||
|
|
|
|||
|
|
@ -49,8 +49,13 @@ extern void iseries_handle_interrupts(void);
|
|||
#define raw_irqs_disabled() (local_get_flags() == 0)
|
||||
#define raw_irqs_disabled_flags(flags) ((flags) == 0)
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define __hard_irq_enable() __asm__ __volatile__("wrteei 1": : :"memory");
|
||||
#define __hard_irq_disable() __asm__ __volatile__("wrteei 0": : :"memory");
|
||||
#else
|
||||
#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
|
||||
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
|
||||
#endif
|
||||
|
||||
#define hard_irq_disable() \
|
||||
do { \
|
||||
|
|
|
|||
|
|
@ -35,16 +35,6 @@
|
|||
#define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1))
|
||||
#define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE)
|
||||
|
||||
/* Cell page table entries */
|
||||
#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
|
||||
#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
|
||||
#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
|
||||
#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
|
||||
#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
|
||||
#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
|
||||
#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
|
||||
#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
|
||||
|
||||
/* Boot time flags */
|
||||
extern int iommu_is_off;
|
||||
extern int iommu_force_on;
|
||||
|
|
|
|||
|
|
@ -302,7 +302,8 @@ extern void irq_free_virt(unsigned int virq, unsigned int count);
|
|||
|
||||
/* -- OF helpers -- */
|
||||
|
||||
/* irq_create_of_mapping - Map a hardware interrupt into linux virq space
|
||||
/**
|
||||
* irq_create_of_mapping - Map a hardware interrupt into linux virq space
|
||||
* @controller: Device node of the interrupt controller
|
||||
* @inspec: Interrupt specifier from the device-tree
|
||||
* @intsize: Size of the interrupt specifier from the device-tree
|
||||
|
|
@ -314,8 +315,8 @@ extern void irq_free_virt(unsigned int virq, unsigned int count);
|
|||
extern unsigned int irq_create_of_mapping(struct device_node *controller,
|
||||
u32 *intspec, unsigned int intsize);
|
||||
|
||||
|
||||
/* irq_of_parse_and_map - Parse nad Map an interrupt into linux virq space
|
||||
/**
|
||||
* irq_of_parse_and_map - Parse and Map an interrupt into linux virq space
|
||||
* @device: Device node of the device whose interrupt is to be mapped
|
||||
* @index: Index of the interrupt to map
|
||||
*
|
||||
|
|
|
|||
|
|
@ -209,14 +209,14 @@ struct machdep_calls {
|
|||
/*
|
||||
* optional PCI "hooks"
|
||||
*/
|
||||
/* Called in indirect_* to avoid touching devices */
|
||||
int (*pci_exclude_device)(struct pci_controller *, unsigned char, unsigned char);
|
||||
|
||||
/* Called at then very end of pcibios_init() */
|
||||
void (*pcibios_after_init)(void);
|
||||
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
/* Called in indirect_* to avoid touching devices */
|
||||
int (*pci_exclude_device)(struct pci_controller *, unsigned char, unsigned char);
|
||||
|
||||
/* Called after PPC generic resource fixup to perform
|
||||
machine specific fixups */
|
||||
void (*pcibios_fixup_resources)(struct pci_dev *);
|
||||
|
|
|
|||
|
|
@ -61,4 +61,7 @@ typedef struct {
|
|||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#define mmu_virtual_psize MMU_PAGE_4K
|
||||
#define mmu_linear_psize MMU_PAGE_256M
|
||||
|
||||
#endif /* _ASM_POWERPC_MMU_40X_H_ */
|
||||
|
|
|
|||
|
|
@ -79,16 +79,22 @@ typedef struct {
|
|||
|
||||
#if (PAGE_SHIFT == 12)
|
||||
#define PPC44x_TLBE_SIZE PPC44x_TLB_4K
|
||||
#define mmu_virtual_psize MMU_PAGE_4K
|
||||
#elif (PAGE_SHIFT == 14)
|
||||
#define PPC44x_TLBE_SIZE PPC44x_TLB_16K
|
||||
#define mmu_virtual_psize MMU_PAGE_16K
|
||||
#elif (PAGE_SHIFT == 16)
|
||||
#define PPC44x_TLBE_SIZE PPC44x_TLB_64K
|
||||
#define mmu_virtual_psize MMU_PAGE_64K
|
||||
#elif (PAGE_SHIFT == 18)
|
||||
#define PPC44x_TLBE_SIZE PPC44x_TLB_256K
|
||||
#define mmu_virtual_psize MMU_PAGE_256K
|
||||
#else
|
||||
#error "Unsupported PAGE_SIZE"
|
||||
#endif
|
||||
|
||||
#define mmu_linear_psize MMU_PAGE_256M
|
||||
|
||||
#define PPC44x_PGD_OFF_SHIFT (32 - PGDIR_SHIFT + PGD_T_LOG2)
|
||||
#define PPC44x_PGD_OFF_MASK_BIT (PGDIR_SHIFT - PGD_T_LOG2)
|
||||
#define PPC44x_PTE_ADD_SHIFT (32 - PGDIR_SHIFT + PTE_SHIFT + PTE_T_LOG2)
|
||||
|
|
|
|||
|
|
@ -143,4 +143,7 @@ typedef struct {
|
|||
} mm_context_t;
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#define mmu_virtual_psize MMU_PAGE_4K
|
||||
#define mmu_linear_psize MMU_PAGE_8M
|
||||
|
||||
#endif /* _ASM_POWERPC_MMU_8XX_H_ */
|
||||
|
|
|
|||
|
|
@ -38,58 +38,140 @@
|
|||
#define BOOK3E_PAGESZ_1TB 30
|
||||
#define BOOK3E_PAGESZ_2TB 31
|
||||
|
||||
#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
|
||||
#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
|
||||
#define MAS0_NV(x) ((x) & 0x00000FFF)
|
||||
/* MAS registers bit definitions */
|
||||
|
||||
#define MAS1_VALID 0x80000000
|
||||
#define MAS1_IPROT 0x40000000
|
||||
#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
|
||||
#define MAS1_IND 0x00002000
|
||||
#define MAS1_TS 0x00001000
|
||||
#define MAS1_TSIZE(x) ((x << 7) & 0x00000F80)
|
||||
#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
|
||||
#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
|
||||
#define MAS0_NV(x) ((x) & 0x00000FFF)
|
||||
#define MAS0_HES 0x00004000
|
||||
#define MAS0_WQ_ALLWAYS 0x00000000
|
||||
#define MAS0_WQ_COND 0x00001000
|
||||
#define MAS0_WQ_CLR_RSRV 0x00002000
|
||||
|
||||
#define MAS2_EPN 0xFFFFF000
|
||||
#define MAS2_X0 0x00000040
|
||||
#define MAS2_X1 0x00000020
|
||||
#define MAS2_W 0x00000010
|
||||
#define MAS2_I 0x00000008
|
||||
#define MAS2_M 0x00000004
|
||||
#define MAS2_G 0x00000002
|
||||
#define MAS2_E 0x00000001
|
||||
#define MAS1_VALID 0x80000000
|
||||
#define MAS1_IPROT 0x40000000
|
||||
#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
|
||||
#define MAS1_IND 0x00002000
|
||||
#define MAS1_TS 0x00001000
|
||||
#define MAS1_TSIZE_MASK 0x00000f80
|
||||
#define MAS1_TSIZE_SHIFT 7
|
||||
#define MAS1_TSIZE(x) ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
|
||||
|
||||
#define MAS2_EPN 0xFFFFF000
|
||||
#define MAS2_X0 0x00000040
|
||||
#define MAS2_X1 0x00000020
|
||||
#define MAS2_W 0x00000010
|
||||
#define MAS2_I 0x00000008
|
||||
#define MAS2_M 0x00000004
|
||||
#define MAS2_G 0x00000002
|
||||
#define MAS2_E 0x00000001
|
||||
#define MAS2_EPN_MASK(size) (~0 << (size + 10))
|
||||
#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags))
|
||||
|
||||
#define MAS3_RPN 0xFFFFF000
|
||||
#define MAS3_U0 0x00000200
|
||||
#define MAS3_U1 0x00000100
|
||||
#define MAS3_U2 0x00000080
|
||||
#define MAS3_U3 0x00000040
|
||||
#define MAS3_UX 0x00000020
|
||||
#define MAS3_SX 0x00000010
|
||||
#define MAS3_UW 0x00000008
|
||||
#define MAS3_SW 0x00000004
|
||||
#define MAS3_UR 0x00000002
|
||||
#define MAS3_SR 0x00000001
|
||||
#define MAS3_RPN 0xFFFFF000
|
||||
#define MAS3_U0 0x00000200
|
||||
#define MAS3_U1 0x00000100
|
||||
#define MAS3_U2 0x00000080
|
||||
#define MAS3_U3 0x00000040
|
||||
#define MAS3_UX 0x00000020
|
||||
#define MAS3_SX 0x00000010
|
||||
#define MAS3_UW 0x00000008
|
||||
#define MAS3_SW 0x00000004
|
||||
#define MAS3_UR 0x00000002
|
||||
#define MAS3_SR 0x00000001
|
||||
#define MAS3_SPSIZE 0x0000003e
|
||||
#define MAS3_SPSIZE_SHIFT 1
|
||||
|
||||
#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
|
||||
#define MAS4_INDD 0x00008000
|
||||
#define MAS4_TSIZED(x) MAS1_TSIZE(x)
|
||||
#define MAS4_X0D 0x00000040
|
||||
#define MAS4_X1D 0x00000020
|
||||
#define MAS4_WD 0x00000010
|
||||
#define MAS4_ID 0x00000008
|
||||
#define MAS4_MD 0x00000004
|
||||
#define MAS4_GD 0x00000002
|
||||
#define MAS4_ED 0x00000001
|
||||
#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
|
||||
#define MAS4_INDD 0x00008000 /* Default IND */
|
||||
#define MAS4_TSIZED(x) MAS1_TSIZE(x)
|
||||
#define MAS4_X0D 0x00000040
|
||||
#define MAS4_X1D 0x00000020
|
||||
#define MAS4_WD 0x00000010
|
||||
#define MAS4_ID 0x00000008
|
||||
#define MAS4_MD 0x00000004
|
||||
#define MAS4_GD 0x00000002
|
||||
#define MAS4_ED 0x00000001
|
||||
#define MAS4_WIMGED_MASK 0x0000001f /* Default WIMGE */
|
||||
#define MAS4_WIMGED_SHIFT 0
|
||||
#define MAS4_VLED MAS4_X1D /* Default VLE */
|
||||
#define MAS4_ACMD 0x000000c0 /* Default ACM */
|
||||
#define MAS4_ACMD_SHIFT 6
|
||||
#define MAS4_TSIZED_MASK 0x00000f80 /* Default TSIZE */
|
||||
#define MAS4_TSIZED_SHIFT 7
|
||||
|
||||
#define MAS6_SPID0 0x3FFF0000
|
||||
#define MAS6_SPID1 0x00007FFE
|
||||
#define MAS6_ISIZE(x) MAS1_TSIZE(x)
|
||||
#define MAS6_SAS 0x00000001
|
||||
#define MAS6_SPID MAS6_SPID0
|
||||
#define MAS6_SPID0 0x3FFF0000
|
||||
#define MAS6_SPID1 0x00007FFE
|
||||
#define MAS6_ISIZE(x) MAS1_TSIZE(x)
|
||||
#define MAS6_SAS 0x00000001
|
||||
#define MAS6_SPID MAS6_SPID0
|
||||
#define MAS6_SIND 0x00000002 /* Indirect page */
|
||||
#define MAS6_SIND_SHIFT 1
|
||||
#define MAS6_SPID_MASK 0x3fff0000
|
||||
#define MAS6_SPID_SHIFT 16
|
||||
#define MAS6_ISIZE_MASK 0x00000f80
|
||||
#define MAS6_ISIZE_SHIFT 7
|
||||
|
||||
#define MAS7_RPN 0xFFFFFFFF
|
||||
#define MAS7_RPN 0xFFFFFFFF
|
||||
|
||||
/* Bit definitions for MMUCSR0 */
|
||||
#define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */
|
||||
#define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */
|
||||
#define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */
|
||||
#define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */
|
||||
#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
|
||||
MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
|
||||
#define MMUCSR0_TLB0PS 0x00000780 /* TLB0 Page Size */
|
||||
#define MMUCSR0_TLB1PS 0x00007800 /* TLB1 Page Size */
|
||||
#define MMUCSR0_TLB2PS 0x00078000 /* TLB2 Page Size */
|
||||
#define MMUCSR0_TLB3PS 0x00780000 /* TLB3 Page Size */
|
||||
|
||||
/* TLBnCFG encoding */
|
||||
#define TLBnCFG_N_ENTRY 0x00000fff /* number of entries */
|
||||
#define TLBnCFG_HES 0x00002000 /* HW select supported */
|
||||
#define TLBnCFG_IPROT 0x00008000 /* IPROT supported */
|
||||
#define TLBnCFG_GTWE 0x00010000 /* Guest can write */
|
||||
#define TLBnCFG_IND 0x00020000 /* IND entries supported */
|
||||
#define TLBnCFG_PT 0x00040000 /* Can load from page table */
|
||||
#define TLBnCFG_ASSOC 0xff000000 /* Associativity */
|
||||
|
||||
/* TLBnPS encoding */
|
||||
#define TLBnPS_4K 0x00000004
|
||||
#define TLBnPS_8K 0x00000008
|
||||
#define TLBnPS_16K 0x00000010
|
||||
#define TLBnPS_32K 0x00000020
|
||||
#define TLBnPS_64K 0x00000040
|
||||
#define TLBnPS_128K 0x00000080
|
||||
#define TLBnPS_256K 0x00000100
|
||||
#define TLBnPS_512K 0x00000200
|
||||
#define TLBnPS_1M 0x00000400
|
||||
#define TLBnPS_2M 0x00000800
|
||||
#define TLBnPS_4M 0x00001000
|
||||
#define TLBnPS_8M 0x00002000
|
||||
#define TLBnPS_16M 0x00004000
|
||||
#define TLBnPS_32M 0x00008000
|
||||
#define TLBnPS_64M 0x00010000
|
||||
#define TLBnPS_128M 0x00020000
|
||||
#define TLBnPS_256M 0x00040000
|
||||
#define TLBnPS_512M 0x00080000
|
||||
#define TLBnPS_1G 0x00100000
|
||||
#define TLBnPS_2G 0x00200000
|
||||
#define TLBnPS_4G 0x00400000
|
||||
#define TLBnPS_8G 0x00800000
|
||||
#define TLBnPS_16G 0x01000000
|
||||
#define TLBnPS_32G 0x02000000
|
||||
#define TLBnPS_64G 0x04000000
|
||||
#define TLBnPS_128G 0x08000000
|
||||
#define TLBnPS_256G 0x10000000
|
||||
|
||||
/* tlbilx action encoding */
|
||||
#define TLBILX_T_ALL 0
|
||||
#define TLBILX_T_TID 1
|
||||
#define TLBILX_T_FULLMATCH 3
|
||||
#define TLBILX_T_CLASS0 4
|
||||
#define TLBILX_T_CLASS1 5
|
||||
#define TLBILX_T_CLASS2 6
|
||||
#define TLBILX_T_CLASS3 7
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
@ -100,6 +182,34 @@ typedef struct {
|
|||
unsigned int active;
|
||||
unsigned long vdso_base;
|
||||
} mm_context_t;
|
||||
|
||||
/* Page size definitions, common between 32 and 64-bit
|
||||
*
|
||||
* shift : is the "PAGE_SHIFT" value for that page size
|
||||
* penc : is the pte encoding mask
|
||||
*
|
||||
*/
|
||||
struct mmu_psize_def
|
||||
{
|
||||
unsigned int shift; /* number of bits */
|
||||
unsigned int enc; /* PTE encoding */
|
||||
};
|
||||
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
|
||||
|
||||
/* The page sizes use the same names as 64-bit hash but are
|
||||
* constants
|
||||
*/
|
||||
#if defined(CONFIG_PPC_4K_PAGES)
|
||||
#define mmu_virtual_psize MMU_PAGE_4K
|
||||
#elif defined(CONFIG_PPC_64K_PAGES)
|
||||
#define mmu_virtual_psize MMU_PAGE_64K
|
||||
#else
|
||||
#error Unsupported page size
|
||||
#endif
|
||||
|
||||
extern int mmu_linear_psize;
|
||||
extern int mmu_vmemmap_psize;
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */
|
||||
|
|
|
|||
|
|
@ -55,21 +55,25 @@ struct ppc_bat {
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* Hardware Page Table Entry */
|
||||
/*
|
||||
* Hardware Page Table Entry
|
||||
* Note that the xpn and x bitfields are used only by processors that
|
||||
* support extended addressing; otherwise, those bits are reserved.
|
||||
*/
|
||||
struct hash_pte {
|
||||
unsigned long v:1; /* Entry is valid */
|
||||
unsigned long vsid:24; /* Virtual segment identifier */
|
||||
unsigned long h:1; /* Hash algorithm indicator */
|
||||
unsigned long api:6; /* Abbreviated page index */
|
||||
unsigned long rpn:20; /* Real (physical) page number */
|
||||
unsigned long :3; /* Unused */
|
||||
unsigned long xpn:3; /* Real page number bits 0-2, optional */
|
||||
unsigned long r:1; /* Referenced */
|
||||
unsigned long c:1; /* Changed */
|
||||
unsigned long w:1; /* Write-thru cache mode */
|
||||
unsigned long i:1; /* Cache inhibited */
|
||||
unsigned long m:1; /* Memory coherence */
|
||||
unsigned long g:1; /* Guarded */
|
||||
unsigned long :1; /* Unused */
|
||||
unsigned long x:1; /* Real page number bit 3, optional */
|
||||
unsigned long pp:2; /* Page protection */
|
||||
};
|
||||
|
||||
|
|
@ -80,4 +84,10 @@ typedef struct {
|
|||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/* We happily ignore the smaller BATs on 601, we don't actually use
|
||||
* those definitions on hash32 at the moment anyway
|
||||
*/
|
||||
#define mmu_virtual_psize MMU_PAGE_4K
|
||||
#define mmu_linear_psize MMU_PAGE_256M
|
||||
|
||||
#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ extern char initial_stab[];
|
|||
|
||||
#define SLB_NUM_BOLTED 3
|
||||
#define SLB_CACHE_ENTRIES 8
|
||||
#define SLB_MIN_SIZE 32
|
||||
|
||||
/* Bits in the SLB ESID word */
|
||||
#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
|
||||
|
|
@ -138,26 +139,6 @@ struct mmu_psize_def
|
|||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* The kernel use the constants below to index in the page sizes array.
|
||||
* The use of fixed constants for this purpose is better for performances
|
||||
* of the low level hash refill handlers.
|
||||
*
|
||||
* A non supported page size has a "shift" field set to 0
|
||||
*
|
||||
* Any new page size being implemented can get a new entry in here. Whether
|
||||
* the kernel will use it or not is a different matter though. The actual page
|
||||
* size used by hugetlbfs is not defined here and may be made variable
|
||||
*/
|
||||
|
||||
#define MMU_PAGE_4K 0 /* 4K */
|
||||
#define MMU_PAGE_64K 1 /* 64K */
|
||||
#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */
|
||||
#define MMU_PAGE_1M 3 /* 1M */
|
||||
#define MMU_PAGE_16M 4 /* 16M */
|
||||
#define MMU_PAGE_16G 5 /* 16G */
|
||||
#define MMU_PAGE_COUNT 6
|
||||
|
||||
/*
|
||||
* Segment sizes.
|
||||
* These are the values used by hardware in the B field of
|
||||
|
|
@ -296,6 +277,7 @@ extern void slb_flush_and_rebolt(void);
|
|||
extern void stab_initialize(unsigned long stab);
|
||||
|
||||
extern void slb_vmalloc_update(void);
|
||||
extern void slb_set_size(u16 size);
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
|
||||
#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
|
||||
#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
|
||||
#define MMU_FTR_TYPE_3E ASM_CONST(0x00000020)
|
||||
|
||||
/*
|
||||
* This is individual features
|
||||
|
|
@ -57,6 +58,15 @@
|
|||
*/
|
||||
#define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
|
||||
|
||||
/* Enable use of TLB reservation. Processor should support tlbsrx.
|
||||
* instruction and MAS0[WQ].
|
||||
*/
|
||||
#define MMU_FTR_USE_TLBRSRV ASM_CONST(0x00800000)
|
||||
|
||||
/* Use paired MAS registers (MAS7||MAS3, etc.)
|
||||
*/
|
||||
#define MMU_FTR_USE_PAIRED_MAS ASM_CONST(0x01000000)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm/cputable.h>
|
||||
|
||||
|
|
@ -73,6 +83,41 @@ extern void early_init_mmu_secondary(void);
|
|||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/* The kernel use the constants below to index in the page sizes array.
|
||||
* The use of fixed constants for this purpose is better for performances
|
||||
* of the low level hash refill handlers.
|
||||
*
|
||||
* A non supported page size has a "shift" field set to 0
|
||||
*
|
||||
* Any new page size being implemented can get a new entry in here. Whether
|
||||
* the kernel will use it or not is a different matter though. The actual page
|
||||
* size used by hugetlbfs is not defined here and may be made variable
|
||||
*
|
||||
* Note: This array ended up being a false good idea as it's growing to the
|
||||
* point where I wonder if we should replace it with something different,
|
||||
* to think about, feedback welcome. --BenH.
|
||||
*/
|
||||
|
||||
/* There are #define as they have to be used in assembly
|
||||
*
|
||||
* WARNING: If you change this list, make sure to update the array of
|
||||
* names currently in arch/powerpc/mm/hugetlbpage.c or bad things will
|
||||
* happen
|
||||
*/
|
||||
#define MMU_PAGE_4K 0
|
||||
#define MMU_PAGE_16K 1
|
||||
#define MMU_PAGE_64K 2
|
||||
#define MMU_PAGE_64K_AP 3 /* "Admixed pages" (hash64 only) */
|
||||
#define MMU_PAGE_256K 4
|
||||
#define MMU_PAGE_1M 5
|
||||
#define MMU_PAGE_8M 6
|
||||
#define MMU_PAGE_16M 7
|
||||
#define MMU_PAGE_256M 8
|
||||
#define MMU_PAGE_1G 9
|
||||
#define MMU_PAGE_16G 10
|
||||
#define MMU_PAGE_64G 11
|
||||
#define MMU_PAGE_COUNT 12
|
||||
|
||||
|
||||
#if defined(CONFIG_PPC_STD_MMU_64)
|
||||
/* 64-bit classic hash table MMU */
|
||||
|
|
@ -94,5 +139,6 @@ extern void early_init_mmu_secondary(void);
|
|||
# include <asm/mmu-8xx.h>
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_MMU_H_ */
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@
|
|||
/*
|
||||
* Most if the context management is out of line
|
||||
*/
|
||||
extern void mmu_context_init(void);
|
||||
extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
|
||||
extern void destroy_context(struct mm_struct *mm);
|
||||
|
||||
|
|
@ -23,6 +22,12 @@ extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
|
|||
extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
|
||||
extern void set_context(unsigned long id, pgd_t *pgd);
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
static inline void mmu_context_init(void) { }
|
||||
#else
|
||||
extern void mmu_context_init(void);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* switch_mm is the entry point called from the architecture independent
|
||||
* code in kernel/sched.c
|
||||
|
|
@ -38,6 +43,10 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
tsk->thread.pgdir = next->pgd;
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
/* 64-bit Book3E keeps track of current PGD in the PACA */
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
get_paca()->pgd = next->pgd;
|
||||
#endif
|
||||
/* Nothing else to do if we aren't actually switching */
|
||||
if (prev == next)
|
||||
return;
|
||||
|
|
@ -84,6 +93,10 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
|
|||
static inline void enter_lazy_tlb(struct mm_struct *mm,
|
||||
struct task_struct *tsk)
|
||||
{
|
||||
/* 64-bit Book3E keeps track of current PGD in the PACA */
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
get_paca()->pgd = NULL;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
|
|
@ -107,6 +107,9 @@ extern void pmac_xpram_write(int xpaddr, u8 data);
|
|||
/* Synchronize NVRAM */
|
||||
extern void nvram_sync(void);
|
||||
|
||||
/* Determine NVRAM size */
|
||||
extern ssize_t nvram_get_size(void);
|
||||
|
||||
/* Normal access to NVRAM */
|
||||
extern unsigned char nvram_read_byte(int i);
|
||||
extern void nvram_write_byte(unsigned char c, int i);
|
||||
|
|
|
|||
|
|
@ -14,9 +14,11 @@
|
|||
#define _ASM_POWERPC_PACA_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/types.h>
|
||||
#include <asm/lppaca.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/types.h>
|
||||
#include <asm/lppaca.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/exception-64e.h>
|
||||
|
||||
register struct paca_struct *local_paca asm("r13");
|
||||
|
||||
|
|
@ -91,6 +93,21 @@ struct paca_struct {
|
|||
u16 slb_cache[SLB_CACHE_ENTRIES];
|
||||
#endif /* CONFIG_PPC_STD_MMU_64 */
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
pgd_t *pgd; /* Current PGD */
|
||||
pgd_t *kernel_pgd; /* Kernel PGD */
|
||||
u64 exgen[8] __attribute__((aligned(0x80)));
|
||||
u64 extlb[EX_TLB_SIZE*3] __attribute__((aligned(0x80)));
|
||||
u64 exmc[8]; /* used for machine checks */
|
||||
u64 excrit[8]; /* used for crit interrupts */
|
||||
u64 exdbg[8]; /* used for debug interrupts */
|
||||
|
||||
/* Kernel stack pointers for use by special exceptions */
|
||||
void *mc_kstack;
|
||||
void *crit_kstack;
|
||||
void *dbg_kstack;
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
mm_context_t context;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -139,7 +139,11 @@ extern phys_addr_t kernstart_addr;
|
|||
* Don't compare things with KERNELBASE or PAGE_OFFSET to test for
|
||||
* "kernelness", use is_kernel_addr() - it should do what you want.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
#define is_kernel_addr(x) ((x) >= 0x8000000000000000ul)
|
||||
#else
|
||||
#define is_kernel_addr(x) ((x) >= PAGE_OFFSET)
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
|
|||
|
|
@ -135,12 +135,22 @@ extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
|
|||
#endif /* __ASSEMBLY__ */
|
||||
#else
|
||||
#define slice_init()
|
||||
#ifdef CONFIG_PPC_STD_MMU_64
|
||||
#define get_slice_psize(mm, addr) ((mm)->context.user_psize)
|
||||
#define slice_set_user_psize(mm, psize) \
|
||||
do { \
|
||||
(mm)->context.user_psize = (psize); \
|
||||
(mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
|
||||
} while (0)
|
||||
#else /* CONFIG_PPC_STD_MMU_64 */
|
||||
#ifdef CONFIG_PPC_64K_PAGES
|
||||
#define get_slice_psize(mm, addr) MMU_PAGE_64K
|
||||
#else /* CONFIG_PPC_64K_PAGES */
|
||||
#define get_slice_psize(mm, addr) MMU_PAGE_4K
|
||||
#endif /* !CONFIG_PPC_64K_PAGES */
|
||||
#define slice_set_user_psize(mm, psize) do { BUG(); } while(0)
|
||||
#endif /* !CONFIG_PPC_STD_MMU_64 */
|
||||
|
||||
#define slice_set_range_psize(mm, start, len, psize) \
|
||||
slice_set_user_psize((mm), (psize))
|
||||
#define slice_mm_new_context(mm) 1
|
||||
|
|
|
|||
|
|
@ -77,9 +77,7 @@ struct pci_controller {
|
|||
|
||||
int first_busno;
|
||||
int last_busno;
|
||||
#ifndef CONFIG_PPC64
|
||||
int self_busno;
|
||||
#endif
|
||||
|
||||
void __iomem *io_base_virt;
|
||||
#ifdef CONFIG_PPC64
|
||||
|
|
@ -104,7 +102,6 @@ struct pci_controller {
|
|||
unsigned int __iomem *cfg_addr;
|
||||
void __iomem *cfg_data;
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
/*
|
||||
* Used for variants of PCI indirect handling and possible quirks:
|
||||
* SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
|
||||
|
|
@ -128,7 +125,6 @@ struct pci_controller {
|
|||
#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
|
||||
#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
|
||||
u32 indirect_type;
|
||||
#endif /* !CONFIG_PPC64 */
|
||||
/* Currently, we limit ourselves to 1 IO range and 3 mem
|
||||
* ranges since the common pci_bus structure can't handle more
|
||||
*/
|
||||
|
|
@ -146,21 +142,6 @@ struct pci_controller {
|
|||
#endif /* CONFIG_PPC64 */
|
||||
};
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
|
||||
static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
|
||||
{
|
||||
return bus->sysdata;
|
||||
}
|
||||
|
||||
static inline int isa_vaddr_is_ioport(void __iomem *address)
|
||||
{
|
||||
/* No specific ISA handling on ppc32 at this stage, it
|
||||
* all goes through PCI
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* These are used for config access before all the PCI probing
|
||||
has been done. */
|
||||
extern int early_read_config_byte(struct pci_controller *hose, int bus,
|
||||
|
|
@ -182,6 +163,22 @@ extern int early_find_capability(struct pci_controller *hose, int bus,
|
|||
extern void setup_indirect_pci(struct pci_controller* hose,
|
||||
resource_size_t cfg_addr,
|
||||
resource_size_t cfg_data, u32 flags);
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
|
||||
static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
|
||||
{
|
||||
return bus->sysdata;
|
||||
}
|
||||
|
||||
static inline int isa_vaddr_is_ioport(void __iomem *address)
|
||||
{
|
||||
/* No specific ISA handling on ppc32 at this stage, it
|
||||
* all goes through PCI
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
|
||||
/*
|
||||
|
|
@ -284,11 +281,6 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
|
|||
extern int pcibios_unmap_io_space(struct pci_bus *bus);
|
||||
extern int pcibios_map_io_space(struct pci_bus *bus);
|
||||
|
||||
/* Return values for ppc_md.pci_probe_mode function */
|
||||
#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
|
||||
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
|
||||
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE))
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -22,6 +22,11 @@
|
|||
|
||||
#include <asm-generic/pci-dma-compat.h>
|
||||
|
||||
/* Return values for ppc_md.pci_probe_mode function */
|
||||
#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
|
||||
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
|
||||
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
|
||||
|
||||
#define PCIBIOS_MIN_IO 0x1000
|
||||
#define PCIBIOS_MIN_MEM 0x10000000
|
||||
|
||||
|
|
@ -61,8 +66,8 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
|
||||
extern struct dma_mapping_ops *get_pci_dma_ops(void);
|
||||
extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
|
||||
extern struct dma_map_ops *get_pci_dma_ops(void);
|
||||
#else /* CONFIG_PCI */
|
||||
#define set_pci_dma_ops(d)
|
||||
#define get_pci_dma_ops() NULL
|
||||
|
|
@ -228,6 +233,8 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
|
|||
|
||||
extern void pcibios_setup_bus_devices(struct pci_bus *bus);
|
||||
extern void pcibios_setup_bus_self(struct pci_bus *bus);
|
||||
extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
|
||||
extern void pcibios_scan_phb(struct pci_controller *hose, void *sysdata);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_POWERPC_PCI_H */
|
||||
|
|
|
|||
|
|
@ -4,6 +4,15 @@
|
|||
|
||||
#include <linux/mm.h>
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
extern void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address);
|
||||
#else /* CONFIG_PPC_BOOK3E */
|
||||
static inline void tlb_flush_pgtable(struct mmu_gather *tlb,
|
||||
unsigned long address)
|
||||
{
|
||||
}
|
||||
#endif /* !CONFIG_PPC_BOOK3E */
|
||||
|
||||
static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
|
||||
{
|
||||
free_page((unsigned long)pte);
|
||||
|
|
@ -19,7 +28,12 @@ typedef struct pgtable_free {
|
|||
unsigned long val;
|
||||
} pgtable_free_t;
|
||||
|
||||
#define PGF_CACHENUM_MASK 0x7
|
||||
/* This needs to be big enough to allow for MMU_PAGE_COUNT + 2 to be stored
|
||||
* and small enough to fit in the low bits of any naturally aligned page
|
||||
* table cache entry. Arbitrarily set to 0x1f, that should give us some
|
||||
* room to grow
|
||||
*/
|
||||
#define PGF_CACHENUM_MASK 0x1f
|
||||
|
||||
static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
|
||||
unsigned long mask)
|
||||
|
|
@ -35,19 +49,27 @@ static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
|
|||
#include <asm/pgalloc-32.h>
|
||||
#endif
|
||||
|
||||
extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#define __pte_free_tlb(tlb,ptepage,address) \
|
||||
do { \
|
||||
pgtable_page_dtor(ptepage); \
|
||||
pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
|
||||
PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
|
||||
} while (0)
|
||||
#else
|
||||
#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, (pte))
|
||||
#endif
|
||||
extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
|
||||
extern void pte_free_finish(void);
|
||||
#else /* CONFIG_SMP */
|
||||
static inline void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
|
||||
{
|
||||
pgtable_free(pgf);
|
||||
}
|
||||
static inline void pte_free_finish(void) { }
|
||||
#endif /* !CONFIG_SMP */
|
||||
|
||||
static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage,
|
||||
unsigned long address)
|
||||
{
|
||||
pgtable_free_t pgf = pgtable_free_cache(page_address(ptepage),
|
||||
PTE_NONCACHE_NUM,
|
||||
PTE_TABLE_SIZE-1);
|
||||
tlb_flush_pgtable(tlb, address);
|
||||
pgtable_page_dtor(ptepage);
|
||||
pgtable_free_tlb(tlb, pgf);
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_PGALLOC_H */
|
||||
|
|
|
|||
|
|
@ -111,6 +111,8 @@ extern int icache_44x_need_flush;
|
|||
#include <asm/pte-40x.h>
|
||||
#elif defined(CONFIG_44x)
|
||||
#include <asm/pte-44x.h>
|
||||
#elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
|
||||
#include <asm/pte-book3e.h>
|
||||
#elif defined(CONFIG_FSL_BOOKE)
|
||||
#include <asm/pte-fsl-booke.h>
|
||||
#elif defined(CONFIG_8xx)
|
||||
|
|
@ -186,7 +188,7 @@ static inline unsigned long pte_update(pte_t *p,
|
|||
#endif /* !PTE_ATOMIC_UPDATES */
|
||||
|
||||
#ifdef CONFIG_44x
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_EXEC))
|
||||
icache_44x_need_flush = 1;
|
||||
#endif
|
||||
return old;
|
||||
|
|
@ -217,7 +219,7 @@ static inline unsigned long long pte_update(pte_t *p,
|
|||
#endif /* !PTE_ATOMIC_UPDATES */
|
||||
|
||||
#ifdef CONFIG_44x
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_EXEC))
|
||||
icache_44x_need_flush = 1;
|
||||
#endif
|
||||
return old;
|
||||
|
|
@ -267,8 +269,7 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
|
|||
static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
|
||||
{
|
||||
unsigned long bits = pte_val(entry) &
|
||||
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
|
||||
_PAGE_HWEXEC | _PAGE_EXEC);
|
||||
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
|
||||
pte_update(ptep, 0, bits);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -10,10 +10,10 @@
|
|||
#define PGD_INDEX_SIZE 4
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE)
|
||||
#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
|
||||
#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
|
||||
#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
|
||||
|
|
@ -32,8 +32,6 @@
|
|||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/* Bits to mask out from a PMD to get to the PTE page */
|
||||
#define PMD_MASKED_BITS 0x1ff
|
||||
/* Bits to mask out from a PGD/PUD to get to the PMD page */
|
||||
|
|
|
|||
|
|
@ -5,11 +5,6 @@
|
|||
* the ppc64 hashed page table.
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/stddef.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#ifdef CONFIG_PPC_64K_PAGES
|
||||
#include <asm/pgtable-ppc64-64k.h>
|
||||
#else
|
||||
|
|
@ -38,26 +33,47 @@
|
|||
#endif
|
||||
|
||||
/*
|
||||
* Define the address range of the vmalloc VM area.
|
||||
* Define the address range of the kernel non-linear virtual area
|
||||
*/
|
||||
#define VMALLOC_START ASM_CONST(0xD000000000000000)
|
||||
#define VMALLOC_SIZE (PGTABLE_RANGE >> 1)
|
||||
#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define KERN_VIRT_START ASM_CONST(0x8000000000000000)
|
||||
#else
|
||||
#define KERN_VIRT_START ASM_CONST(0xD000000000000000)
|
||||
#endif
|
||||
#define KERN_VIRT_SIZE PGTABLE_RANGE
|
||||
|
||||
/*
|
||||
* Define the address ranges for MMIO and IO space :
|
||||
* The vmalloc space starts at the beginning of that region, and
|
||||
* occupies half of it on hash CPUs and a quarter of it on Book3E
|
||||
* (we keep a quarter for the virtual memmap)
|
||||
*/
|
||||
#define VMALLOC_START KERN_VIRT_START
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
|
||||
#else
|
||||
#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
|
||||
#endif
|
||||
#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
|
||||
|
||||
/*
|
||||
* The second half of the kernel virtual space is used for IO mappings,
|
||||
* it's itself carved into the PIO region (ISA and PHB IO space) and
|
||||
* the ioremap space
|
||||
*
|
||||
* ISA_IO_BASE = VMALLOC_END, 64K reserved area
|
||||
* ISA_IO_BASE = KERN_IO_START, 64K reserved area
|
||||
* PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
|
||||
* IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
|
||||
*/
|
||||
#define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
|
||||
#define FULL_IO_SIZE 0x80000000ul
|
||||
#define ISA_IO_BASE (VMALLOC_END)
|
||||
#define ISA_IO_END (VMALLOC_END + 0x10000ul)
|
||||
#define ISA_IO_BASE (KERN_IO_START)
|
||||
#define ISA_IO_END (KERN_IO_START + 0x10000ul)
|
||||
#define PHB_IO_BASE (ISA_IO_END)
|
||||
#define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE)
|
||||
#define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
|
||||
#define IOREMAP_BASE (PHB_IO_END)
|
||||
#define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE)
|
||||
#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
|
||||
|
||||
|
||||
/*
|
||||
* Region IDs
|
||||
|
|
@ -68,23 +84,32 @@
|
|||
|
||||
#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
|
||||
#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
|
||||
#define VMEMMAP_REGION_ID (0xfUL)
|
||||
#define VMEMMAP_REGION_ID (0xfUL) /* Server only */
|
||||
#define USER_REGION_ID (0UL)
|
||||
|
||||
/*
|
||||
* Defines the address of the vmemap area, in its own region
|
||||
* Defines the address of the vmemap area, in its own region on
|
||||
* hash table CPUs and after the vmalloc space on Book3E
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
#define VMEMMAP_BASE VMALLOC_END
|
||||
#define VMEMMAP_END KERN_IO_START
|
||||
#else
|
||||
#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
|
||||
#endif
|
||||
#define vmemmap ((struct page *)VMEMMAP_BASE)
|
||||
|
||||
|
||||
/*
|
||||
* Include the PTE bits definitions
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3S
|
||||
#include <asm/pte-hash64.h>
|
||||
#else
|
||||
#include <asm/pte-book3e.h>
|
||||
#endif
|
||||
#include <asm/pte-common.h>
|
||||
|
||||
|
||||
#ifdef CONFIG_PPC_MM_SLICES
|
||||
#define HAVE_ARCH_UNMAPPED_AREA
|
||||
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
|
||||
|
|
@ -92,6 +117,9 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
||||
/*
|
||||
* This is the default implementation of various PTE accessors, it's
|
||||
* used in all cases except Book3S with 64K pages where we have a
|
||||
|
|
@ -285,8 +313,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|||
static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
|
||||
{
|
||||
unsigned long bits = pte_val(entry) &
|
||||
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
|
||||
_PAGE_EXEC | _PAGE_HWEXEC);
|
||||
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
|
||||
|
||||
#ifdef PTE_ATOMIC_UPDATES
|
||||
unsigned long old, tmp;
|
||||
|
|
|
|||
|
|
@ -27,10 +27,22 @@ extern perf_irq_t perf_irq;
|
|||
|
||||
int reserve_pmc_hardware(perf_irq_t new_perf_irq);
|
||||
void release_pmc_hardware(void);
|
||||
void ppc_enable_pmcs(void);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
void power4_enable_pmcs(void);
|
||||
void pasemi_enable_pmcs(void);
|
||||
#include <asm/lppaca.h>
|
||||
|
||||
static inline void ppc_set_pmu_inuse(int inuse)
|
||||
{
|
||||
get_lppaca()->pmcregs_in_use = inuse;
|
||||
}
|
||||
|
||||
extern void power4_enable_pmcs(void);
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
|
||||
static inline void ppc_set_pmu_inuse(int inuse) { }
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
|
|
@ -48,6 +48,8 @@
|
|||
#define PPC_INST_TLBIE 0x7c000264
|
||||
#define PPC_INST_TLBILX 0x7c000024
|
||||
#define PPC_INST_WAIT 0x7c00007c
|
||||
#define PPC_INST_TLBIVAX 0x7c000624
|
||||
#define PPC_INST_TLBSRX_DOT 0x7c0006a5
|
||||
|
||||
/* macros to insert fields into opcodes */
|
||||
#define __PPC_RA(a) (((a) & 0x1f) << 16)
|
||||
|
|
@ -76,6 +78,10 @@
|
|||
__PPC_WC(w))
|
||||
#define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \
|
||||
__PPC_RB(a) | __PPC_RS(lp))
|
||||
#define PPC_TLBSRX_DOT(a,b) stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
|
||||
__PPC_RA(a) | __PPC_RB(b))
|
||||
#define PPC_TLBIVAX(a,b) stringify_in_c(.long PPC_INST_TLBIVAX | \
|
||||
__PPC_RA(a) | __PPC_RB(b))
|
||||
|
||||
/*
|
||||
* Define what the VSX XX1 form instructions will look like, then add
|
||||
|
|
|
|||
|
|
@ -39,7 +39,6 @@ void *traverse_pci_devices(struct device_node *start, traverse_func pre,
|
|||
|
||||
extern void pci_devs_phb_init(void);
|
||||
extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
|
||||
extern void scan_phb(struct pci_controller *hose);
|
||||
|
||||
/* From rtas_pci.h */
|
||||
extern void init_pci_config_tokens (void);
|
||||
|
|
|
|||
|
|
@ -98,13 +98,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \
|
|||
#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
|
||||
#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
|
||||
|
||||
#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
|
||||
#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,base,b
|
||||
#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
|
||||
#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
|
||||
#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
|
||||
#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
|
||||
#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
|
||||
#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
|
||||
#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,base,b
|
||||
#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
|
||||
#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
|
||||
#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
|
||||
|
|
@ -112,26 +112,26 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \
|
|||
#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
|
||||
|
||||
/* Save the lower 32 VSRs in the thread VSR region */
|
||||
#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base)
|
||||
#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,base,b)
|
||||
#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
|
||||
#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base)
|
||||
#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base)
|
||||
#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base)
|
||||
#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base)
|
||||
#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base)
|
||||
#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,base,b)
|
||||
#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base)
|
||||
#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base)
|
||||
#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
|
||||
#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)
|
||||
#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base)
|
||||
/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */
|
||||
#define SAVE_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,b,base)
|
||||
#define SAVE_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,base,b)
|
||||
#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base)
|
||||
#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base)
|
||||
#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base)
|
||||
#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base)
|
||||
#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base)
|
||||
#define REST_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,b,base)
|
||||
#define REST_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,base,b)
|
||||
#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base)
|
||||
#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base)
|
||||
#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base)
|
||||
|
|
@ -375,8 +375,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
|
|||
#define PPC440EP_ERR42
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_BOOKE)
|
||||
/*
|
||||
* toreal/fromreal/tophys/tovirt macros. 32-bit BookE makes them
|
||||
* keep the address intact to be compatible with code shared with
|
||||
* 32-bit classic.
|
||||
*
|
||||
* On the other hand, I find it useful to have them behave as expected
|
||||
* by their name (ie always do the addition) on 64-bit BookE
|
||||
*/
|
||||
#if defined(CONFIG_BOOKE) && !defined(CONFIG_PPC64)
|
||||
#define toreal(rd)
|
||||
#define fromreal(rd)
|
||||
|
||||
|
|
@ -426,10 +433,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
|
|||
.previous
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
#define RFI rfid
|
||||
#define MTMSRD(r) mtmsrd r
|
||||
|
||||
#else
|
||||
#define FIX_SRR1(ra, rb)
|
||||
#ifndef CONFIG_40x
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
#define _PAGE_RW 0x040 /* software: Writes permitted */
|
||||
#define _PAGE_DIRTY 0x080 /* software: dirty page */
|
||||
#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
|
||||
#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
|
||||
#define _PAGE_EXEC 0x200 /* hardware: EX permission */
|
||||
#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
|
||||
|
||||
#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@
|
|||
#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
|
||||
#define _PAGE_RW 0x00000002 /* S: Write permission */
|
||||
#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
|
||||
#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
|
||||
#define _PAGE_EXEC 0x00000004 /* H: Execute permission */
|
||||
#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
|
||||
#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
|
||||
#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@
|
|||
/* These five software bits must be masked out when the entry is loaded
|
||||
* into the TLB.
|
||||
*/
|
||||
#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
|
||||
#define _PAGE_GUARDED 0x0010 /* software: guarded access */
|
||||
#define _PAGE_DIRTY 0x0020 /* software: page changed */
|
||||
#define _PAGE_RW 0x0040 /* software: user write access allowed */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,84 @@
|
|||
#ifndef _ASM_POWERPC_PTE_BOOK3E_H
|
||||
#define _ASM_POWERPC_PTE_BOOK3E_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/* PTE bit definitions for processors compliant to the Book3E
|
||||
* architecture 2.06 or later. The position of the PTE bits
|
||||
* matches the HW definition of the optional Embedded Page Table
|
||||
* category.
|
||||
*/
|
||||
|
||||
/* Architected bits */
|
||||
#define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
|
||||
#define _PAGE_FILE 0x000002 /* (!present only) software: pte holds file offset */
|
||||
#define _PAGE_SW1 0x000002
|
||||
#define _PAGE_BAP_SR 0x000004
|
||||
#define _PAGE_BAP_UR 0x000008
|
||||
#define _PAGE_BAP_SW 0x000010
|
||||
#define _PAGE_BAP_UW 0x000020
|
||||
#define _PAGE_BAP_SX 0x000040
|
||||
#define _PAGE_BAP_UX 0x000080
|
||||
#define _PAGE_PSIZE_MSK 0x000f00
|
||||
#define _PAGE_PSIZE_4K 0x000200
|
||||
#define _PAGE_PSIZE_8K 0x000300
|
||||
#define _PAGE_PSIZE_16K 0x000400
|
||||
#define _PAGE_PSIZE_32K 0x000500
|
||||
#define _PAGE_PSIZE_64K 0x000600
|
||||
#define _PAGE_PSIZE_128K 0x000700
|
||||
#define _PAGE_PSIZE_256K 0x000800
|
||||
#define _PAGE_PSIZE_512K 0x000900
|
||||
#define _PAGE_PSIZE_1M 0x000a00
|
||||
#define _PAGE_PSIZE_2M 0x000b00
|
||||
#define _PAGE_PSIZE_4M 0x000c00
|
||||
#define _PAGE_PSIZE_8M 0x000d00
|
||||
#define _PAGE_PSIZE_16M 0x000e00
|
||||
#define _PAGE_PSIZE_32M 0x000f00
|
||||
#define _PAGE_DIRTY 0x001000 /* C: page changed */
|
||||
#define _PAGE_SW0 0x002000
|
||||
#define _PAGE_U3 0x004000
|
||||
#define _PAGE_U2 0x008000
|
||||
#define _PAGE_U1 0x010000
|
||||
#define _PAGE_U0 0x020000
|
||||
#define _PAGE_ACCESSED 0x040000
|
||||
#define _PAGE_LENDIAN 0x080000
|
||||
#define _PAGE_GUARDED 0x100000
|
||||
#define _PAGE_COHERENT 0x200000 /* M: enforce memory coherence */
|
||||
#define _PAGE_NO_CACHE 0x400000 /* I: cache inhibit */
|
||||
#define _PAGE_WRITETHRU 0x800000 /* W: cache write-through */
|
||||
|
||||
/* "Higher level" linux bit combinations */
|
||||
#define _PAGE_EXEC _PAGE_BAP_UX /* .. and was cache cleaned */
|
||||
#define _PAGE_RW (_PAGE_BAP_SW | _PAGE_BAP_UW) /* User write permission */
|
||||
#define _PAGE_KERNEL_RW (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY)
|
||||
#define _PAGE_KERNEL_RO (_PAGE_BAP_SR)
|
||||
#define _PAGE_KERNEL_RWX (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY | _PAGE_BAP_SX)
|
||||
#define _PAGE_KERNEL_ROX (_PAGE_BAP_SR | _PAGE_BAP_SX)
|
||||
#define _PAGE_USER (_PAGE_BAP_UR | _PAGE_BAP_SR) /* Can be read */
|
||||
|
||||
#define _PAGE_HASHPTE 0
|
||||
#define _PAGE_BUSY 0
|
||||
|
||||
#define _PAGE_SPECIAL _PAGE_SW0
|
||||
|
||||
/* Flags to be preserved on PTE modifications */
|
||||
#define _PAGE_HPTEFLAGS _PAGE_BUSY
|
||||
|
||||
/* Base page size */
|
||||
#ifdef CONFIG_PPC_64K_PAGES
|
||||
#define _PAGE_PSIZE _PAGE_PSIZE_64K
|
||||
#define PTE_RPN_SHIFT (28)
|
||||
#else
|
||||
#define _PAGE_PSIZE _PAGE_PSIZE_4K
|
||||
#define PTE_RPN_SHIFT (24)
|
||||
#endif
|
||||
|
||||
/* On 32-bit, we never clear the top part of the PTE */
|
||||
#ifdef CONFIG_PPC32
|
||||
#define _PTE_NONE_MASK 0xffffffff00000000ULL
|
||||
#define _PMD_PRESENT 0
|
||||
#define _PMD_PRESENT_MASK (PAGE_MASK)
|
||||
#define _PMD_BAD (~PAGE_MASK)
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */
|
||||
|
|
@ -13,9 +13,6 @@
|
|||
#ifndef _PAGE_HWWRITE
|
||||
#define _PAGE_HWWRITE 0
|
||||
#endif
|
||||
#ifndef _PAGE_HWEXEC
|
||||
#define _PAGE_HWEXEC 0
|
||||
#endif
|
||||
#ifndef _PAGE_EXEC
|
||||
#define _PAGE_EXEC 0
|
||||
#endif
|
||||
|
|
@ -34,6 +31,9 @@
|
|||
#ifndef _PAGE_4K_PFN
|
||||
#define _PAGE_4K_PFN 0
|
||||
#endif
|
||||
#ifndef _PAGE_SAO
|
||||
#define _PAGE_SAO 0
|
||||
#endif
|
||||
#ifndef _PAGE_PSIZE
|
||||
#define _PAGE_PSIZE 0
|
||||
#endif
|
||||
|
|
@ -45,10 +45,16 @@
|
|||
#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
|
||||
#endif
|
||||
#ifndef _PAGE_KERNEL_RO
|
||||
#define _PAGE_KERNEL_RO 0
|
||||
#define _PAGE_KERNEL_RO 0
|
||||
#endif
|
||||
#ifndef _PAGE_KERNEL_ROX
|
||||
#define _PAGE_KERNEL_ROX (_PAGE_EXEC)
|
||||
#endif
|
||||
#ifndef _PAGE_KERNEL_RW
|
||||
#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
|
||||
#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
|
||||
#endif
|
||||
#ifndef _PAGE_KERNEL_RWX
|
||||
#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
|
||||
#endif
|
||||
#ifndef _PAGE_HPTEFLAGS
|
||||
#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
|
||||
|
|
@ -93,8 +99,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
|
|||
#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
|
||||
_PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
|
||||
_PAGE_USER | _PAGE_ACCESSED | \
|
||||
_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
|
||||
_PAGE_EXEC | _PAGE_HWEXEC)
|
||||
_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
|
||||
|
||||
/*
|
||||
* We define 2 sets of base prot bits, one for basic pages (ie,
|
||||
|
|
@ -151,11 +156,9 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
|
|||
_PAGE_NO_CACHE)
|
||||
#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
|
||||
_PAGE_NO_CACHE | _PAGE_GUARDED)
|
||||
#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC | \
|
||||
_PAGE_HWEXEC)
|
||||
#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC | \
|
||||
_PAGE_HWEXEC)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
|
||||
|
||||
/* Protection used for kernel text. We want the debuggers to be able to
|
||||
* set breakpoints anywhere, so don't write protect the kernel text
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
|
||||
#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
|
||||
#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
|
||||
#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
|
||||
#define _PAGE_EXEC 0x00010 /* H: SX permission */
|
||||
#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
|
||||
|
||||
#define _PAGE_ENDIAN 0x00040 /* H: E bit */
|
||||
|
|
@ -33,13 +33,6 @@
|
|||
#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
|
||||
#define _PAGE_SPECIAL 0x00800 /* S: Special page */
|
||||
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
/* ERPN in a PTE never gets cleared, ignore it */
|
||||
#define _PTE_NONE_MASK 0xffffffffffff0000ULL
|
||||
/* We extend the size of the PTE flags area when using 64-bit PTEs */
|
||||
#define PTE_RPN_SHIFT (PAGE_SHIFT + 8)
|
||||
#endif
|
||||
|
||||
#define _PMD_PRESENT 0
|
||||
#define _PMD_PRESENT_MASK (PAGE_MASK)
|
||||
#define _PMD_BAD (~PAGE_MASK)
|
||||
|
|
|
|||
|
|
@ -26,7 +26,6 @@
|
|||
#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
|
||||
#define _PAGE_DIRTY 0x080 /* C: page changed */
|
||||
#define _PAGE_ACCESSED 0x100 /* R: page referenced */
|
||||
#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
|
||||
#define _PAGE_RW 0x400 /* software: user write access allowed */
|
||||
#define _PAGE_SPECIAL 0x800 /* software: Special page */
|
||||
|
||||
|
|
|
|||
|
|
@ -98,19 +98,15 @@
|
|||
#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */
|
||||
#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#if defined(CONFIG_PPC_BOOK3S_64)
|
||||
/* Server variant */
|
||||
#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV
|
||||
#define MSR_KERNEL MSR_ | MSR_SF
|
||||
|
||||
#define MSR_USER32 MSR_ | MSR_PR | MSR_EE
|
||||
#define MSR_USER64 MSR_USER32 | MSR_SF
|
||||
|
||||
#else /* 32-bit */
|
||||
#elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx)
|
||||
/* Default MSR for kernel mode. */
|
||||
#ifndef MSR_KERNEL /* reg_booke.h also defines this */
|
||||
#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
|
||||
#endif
|
||||
|
||||
#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)
|
||||
#endif
|
||||
|
||||
|
|
@ -645,6 +641,137 @@
|
|||
#define MMCR0_PMC2_LOADMISSTIME 0x5
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPRG usage:
|
||||
*
|
||||
* All 64-bit:
|
||||
* - SPRG1 stores PACA pointer
|
||||
*
|
||||
* 64-bit server:
|
||||
* - SPRG0 unused (reserved for HV on Power4)
|
||||
* - SPRG2 scratch for exception vectors
|
||||
* - SPRG3 unused (user visible)
|
||||
*
|
||||
* 64-bit embedded
|
||||
* - SPRG0 generic exception scratch
|
||||
* - SPRG2 TLB exception stack
|
||||
* - SPRG3 unused (user visible)
|
||||
* - SPRG4 unused (user visible)
|
||||
* - SPRG6 TLB miss scratch (user visible, sorry !)
|
||||
* - SPRG7 critical exception scratch
|
||||
* - SPRG8 machine check exception scratch
|
||||
* - SPRG9 debug exception scratch
|
||||
*
|
||||
* All 32-bit:
|
||||
* - SPRG3 current thread_info pointer
|
||||
* (virtual on BookE, physical on others)
|
||||
*
|
||||
* 32-bit classic:
|
||||
* - SPRG0 scratch for exception vectors
|
||||
* - SPRG1 scratch for exception vectors
|
||||
* - SPRG2 indicator that we are in RTAS
|
||||
* - SPRG4 (603 only) pseudo TLB LRU data
|
||||
*
|
||||
* 32-bit 40x:
|
||||
* - SPRG0 scratch for exception vectors
|
||||
* - SPRG1 scratch for exception vectors
|
||||
* - SPRG2 scratch for exception vectors
|
||||
* - SPRG4 scratch for exception vectors (not 403)
|
||||
* - SPRG5 scratch for exception vectors (not 403)
|
||||
* - SPRG6 scratch for exception vectors (not 403)
|
||||
* - SPRG7 scratch for exception vectors (not 403)
|
||||
*
|
||||
* 32-bit 440 and FSL BookE:
|
||||
* - SPRG0 scratch for exception vectors
|
||||
* - SPRG1 scratch for exception vectors (*)
|
||||
* - SPRG2 scratch for crit interrupts handler
|
||||
* - SPRG4 scratch for exception vectors
|
||||
* - SPRG5 scratch for exception vectors
|
||||
* - SPRG6 scratch for machine check handler
|
||||
* - SPRG7 scratch for exception vectors
|
||||
* - SPRG9 scratch for debug vectors (e500 only)
|
||||
*
|
||||
* Additionally, BookE separates "read" and "write"
|
||||
* of those registers. That allows to use the userspace
|
||||
* readable variant for reads, which can avoid a fault
|
||||
* with KVM type virtualization.
|
||||
*
|
||||
* (*) Under KVM, the host SPRG1 is used to point to
|
||||
* the current VCPU data structure
|
||||
*
|
||||
* 32-bit 8xx:
|
||||
* - SPRG0 scratch for exception vectors
|
||||
* - SPRG1 scratch for exception vectors
|
||||
* - SPRG2 apparently unused but initialized
|
||||
*
|
||||
*/
|
||||
#ifdef CONFIG_PPC64
|
||||
#define SPRN_SPRG_PACA SPRN_SPRG1
|
||||
#else
|
||||
#define SPRN_SPRG_THREAD SPRN_SPRG3
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG2
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
#define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8
|
||||
#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7
|
||||
#define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9
|
||||
#define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2
|
||||
#define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6
|
||||
#define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S_32
|
||||
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
|
||||
#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
|
||||
#define SPRN_SPRG_RTAS SPRN_SPRG2
|
||||
#define SPRN_SPRG_603_LRU SPRN_SPRG4
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_40x
|
||||
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
|
||||
#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
|
||||
#define SPRN_SPRG_SCRATCH2 SPRN_SPRG2
|
||||
#define SPRN_SPRG_SCRATCH3 SPRN_SPRG4
|
||||
#define SPRN_SPRG_SCRATCH4 SPRN_SPRG5
|
||||
#define SPRN_SPRG_SCRATCH5 SPRN_SPRG6
|
||||
#define SPRN_SPRG_SCRATCH6 SPRN_SPRG7
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOOKE
|
||||
#define SPRN_SPRG_RSCRATCH0 SPRN_SPRG0
|
||||
#define SPRN_SPRG_WSCRATCH0 SPRN_SPRG0
|
||||
#define SPRN_SPRG_RSCRATCH1 SPRN_SPRG1
|
||||
#define SPRN_SPRG_WSCRATCH1 SPRN_SPRG1
|
||||
#define SPRN_SPRG_RSCRATCH_CRIT SPRN_SPRG2
|
||||
#define SPRN_SPRG_WSCRATCH_CRIT SPRN_SPRG2
|
||||
#define SPRN_SPRG_RSCRATCH2 SPRN_SPRG4R
|
||||
#define SPRN_SPRG_WSCRATCH2 SPRN_SPRG4W
|
||||
#define SPRN_SPRG_RSCRATCH3 SPRN_SPRG5R
|
||||
#define SPRN_SPRG_WSCRATCH3 SPRN_SPRG5W
|
||||
#define SPRN_SPRG_RSCRATCH_MC SPRN_SPRG6R
|
||||
#define SPRN_SPRG_WSCRATCH_MC SPRN_SPRG6W
|
||||
#define SPRN_SPRG_RSCRATCH4 SPRN_SPRG7R
|
||||
#define SPRN_SPRG_WSCRATCH4 SPRN_SPRG7W
|
||||
#ifdef CONFIG_E200
|
||||
#define SPRN_SPRG_RSCRATCH_DBG SPRN_SPRG6R
|
||||
#define SPRN_SPRG_WSCRATCH_DBG SPRN_SPRG6W
|
||||
#else
|
||||
#define SPRN_SPRG_RSCRATCH_DBG SPRN_SPRG9
|
||||
#define SPRN_SPRG_WSCRATCH_DBG SPRN_SPRG9
|
||||
#endif
|
||||
#define SPRN_SPRG_RVCPU SPRN_SPRG1
|
||||
#define SPRN_SPRG_WVCPU SPRN_SPRG1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_8xx
|
||||
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
|
||||
#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* An mtfsf instruction with the L bit set. On CPUs that support this a
|
||||
* full 64bits of FPSCR is restored and on other CPUs the L bit is ignored.
|
||||
|
|
|
|||
|
|
@ -18,18 +18,26 @@
|
|||
#define MSR_IS MSR_IR /* Instruction Space */
|
||||
#define MSR_DS MSR_DR /* Data Space */
|
||||
#define MSR_PMM (1<<2) /* Performance monitor mark bit */
|
||||
#define MSR_CM (1<<31) /* Computation Mode (0=32-bit, 1=64-bit) */
|
||||
|
||||
/* Default MSR for kernel mode. */
|
||||
#if defined (CONFIG_40x)
|
||||
#if defined(CONFIG_PPC_BOOK3E_64)
|
||||
#define MSR_ MSR_ME | MSR_CE
|
||||
#define MSR_KERNEL MSR_ | MSR_CM
|
||||
#define MSR_USER32 MSR_ | MSR_PR | MSR_EE
|
||||
#define MSR_USER64 MSR_USER32 | MSR_CM
|
||||
#elif defined (CONFIG_40x)
|
||||
#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
|
||||
#elif defined(CONFIG_BOOKE)
|
||||
#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)
|
||||
#else
|
||||
#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE)
|
||||
#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)
|
||||
#endif
|
||||
|
||||
/* Special Purpose Registers (SPRNs)*/
|
||||
#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
|
||||
#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
|
||||
#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
|
||||
#define SPRN_SPRG3R 0x103 /* Special Purpose Register General 3 Read */
|
||||
#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
|
||||
#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
|
||||
#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
|
||||
|
|
@ -38,11 +46,18 @@
|
|||
#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */
|
||||
#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */
|
||||
#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */
|
||||
#define SPRN_EPCR 0x133 /* Embedded Processor Control Register */
|
||||
#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */
|
||||
#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */
|
||||
#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */
|
||||
#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */
|
||||
#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */
|
||||
#define SPRN_MAS8 0x155 /* MMU Assist Register 8 */
|
||||
#define SPRN_TLB0PS 0x158 /* TLB 0 Page Size Register */
|
||||
#define SPRN_MAS5_MAS6 0x15c /* MMU Assist Register 5 || 6 */
|
||||
#define SPRN_MAS8_MAS1 0x15d /* MMU Assist Register 8 || 1 */
|
||||
#define SPRN_MAS7_MAS3 0x174 /* MMU Assist Register 7 || 3 */
|
||||
#define SPRN_MAS0_MAS1 0x175 /* MMU Assist Register 0 || 1 */
|
||||
#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */
|
||||
#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */
|
||||
#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */
|
||||
|
|
@ -93,6 +108,8 @@
|
|||
#define SPRN_PID2 0x27A /* Process ID Register 2 */
|
||||
#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
|
||||
#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
|
||||
#define SPRN_TLB2CFG 0x2B2 /* TLB 2 Config Register */
|
||||
#define SPRN_TLB3CFG 0x2B3 /* TLB 3 Config Register */
|
||||
#define SPRN_EPR 0x2BE /* External Proxy Register */
|
||||
#define SPRN_CCR1 0x378 /* Core Configuration Register 1 */
|
||||
#define SPRN_ZPR 0x3B0 /* Zone Protection Register (40x) */
|
||||
|
|
@ -415,16 +432,31 @@
|
|||
#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
|
||||
#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
|
||||
|
||||
/* Bit definitions for MMUCSR0 */
|
||||
#define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */
|
||||
#define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */
|
||||
#define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */
|
||||
#define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */
|
||||
|
||||
/* Bit definitions for SGR. */
|
||||
#define SGR_NORMAL 0 /* Speculative fetching allowed. */
|
||||
#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
|
||||
|
||||
/* Bit definitions for EPCR */
|
||||
#define SPRN_EPCR_EXTGS 0x80000000 /* External Input interrupt
|
||||
* directed to Guest state */
|
||||
#define SPRN_EPCR_DTLBGS 0x40000000 /* Data TLB Error interrupt
|
||||
* directed to guest state */
|
||||
#define SPRN_EPCR_ITLBGS 0x20000000 /* Instr. TLB error interrupt
|
||||
* directed to guest state */
|
||||
#define SPRN_EPCR_DSIGS 0x10000000 /* Data Storage interrupt
|
||||
* directed to guest state */
|
||||
#define SPRN_EPCR_ISIGS 0x08000000 /* Instr. Storage interrupt
|
||||
* directed to guest state */
|
||||
#define SPRN_EPCR_DUVD 0x04000000 /* Disable Hypervisor Debug */
|
||||
#define SPRN_EPCR_ICM 0x02000000 /* Interrupt computation mode
|
||||
* (copied to MSR:CM on intr) */
|
||||
#define SPRN_EPCR_GICM 0x01000000 /* Guest Interrupt Comp. mode */
|
||||
#define SPRN_EPCR_DGTMI 0x00800000 /* Disable TLB Guest Management
|
||||
* instructions */
|
||||
#define SPRN_EPCR_DMIUH 0x00400000 /* Disable MAS Interrupt updates
|
||||
* for hypervisor */
|
||||
|
||||
|
||||
/*
|
||||
* The IBM-403 is an even more odd special case, as it is much
|
||||
* older than the IBM-405 series. We put these down here incase someone
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#ifndef _ASM_POWERPC_SETUP_H
|
||||
#define _ASM_POWERPC_SETUP_H
|
||||
|
||||
#define COMMAND_LINE_SIZE 512
|
||||
#include <asm-generic/setup.h>
|
||||
|
||||
#endif /* _ASM_POWERPC_SETUP_H */
|
||||
|
|
|
|||
|
|
@ -148,6 +148,16 @@ extern struct smp_ops_t *smp_ops;
|
|||
extern void arch_send_call_function_single_ipi(int cpu);
|
||||
extern void arch_send_call_function_ipi(cpumask_t mask);
|
||||
|
||||
/* Definitions relative to the secondary CPU spin loop
|
||||
* and entry point. Not all of them exist on both 32 and
|
||||
* 64-bit but defining them all here doesn't harm
|
||||
*/
|
||||
extern void generic_secondary_smp_init(void);
|
||||
extern void generic_secondary_thread_init(void);
|
||||
extern unsigned long __secondary_hold_spinloop;
|
||||
extern unsigned long __secondary_hold_acknowledge;
|
||||
extern char __secondary_hold;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
|
|
@ -13,15 +13,13 @@
|
|||
|
||||
#include <linux/swiotlb.h>
|
||||
|
||||
extern struct dma_mapping_ops swiotlb_dma_ops;
|
||||
extern struct dma_mapping_ops swiotlb_pci_dma_ops;
|
||||
|
||||
int swiotlb_arch_address_needs_mapping(struct device *, dma_addr_t,
|
||||
size_t size);
|
||||
extern struct dma_map_ops swiotlb_dma_ops;
|
||||
|
||||
static inline void dma_mark_clean(void *addr, size_t size) {}
|
||||
|
||||
extern unsigned int ppc_swiotlb_enable;
|
||||
int __init swiotlb_setup_bus_notifier(void);
|
||||
|
||||
extern void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev);
|
||||
|
||||
#endif /* __ASM_SWIOTLB_H */
|
||||
|
|
|
|||
|
|
@ -95,8 +95,8 @@ SYSCALL(reboot)
|
|||
SYSX(sys_ni_syscall,compat_sys_old_readdir,sys_old_readdir)
|
||||
SYSCALL_SPU(mmap)
|
||||
SYSCALL_SPU(munmap)
|
||||
SYSCALL_SPU(truncate)
|
||||
SYSCALL_SPU(ftruncate)
|
||||
COMPAT_SYS_SPU(truncate)
|
||||
COMPAT_SYS_SPU(ftruncate)
|
||||
SYSCALL_SPU(fchmod)
|
||||
SYSCALL_SPU(fchown)
|
||||
COMPAT_SYS_SPU(getpriority)
|
||||
|
|
|
|||
|
|
@ -25,57 +25,25 @@
|
|||
|
||||
#include <linux/pagemap.h>
|
||||
|
||||
struct mmu_gather;
|
||||
|
||||
#define tlb_start_vma(tlb, vma) do { } while (0)
|
||||
#define tlb_end_vma(tlb, vma) do { } while (0)
|
||||
|
||||
#if !defined(CONFIG_PPC_STD_MMU)
|
||||
|
||||
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
|
||||
|
||||
#elif defined(__powerpc64__)
|
||||
|
||||
extern void pte_free_finish(void);
|
||||
|
||||
static inline void tlb_flush(struct mmu_gather *tlb)
|
||||
{
|
||||
struct ppc64_tlb_batch *tlbbatch = &__get_cpu_var(ppc64_tlb_batch);
|
||||
|
||||
/* If there's a TLB batch pending, then we must flush it because the
|
||||
* pages are going to be freed and we really don't want to have a CPU
|
||||
* access a freed page because it has a stale TLB
|
||||
*/
|
||||
if (tlbbatch->index)
|
||||
__flush_tlb_pending(tlbbatch);
|
||||
|
||||
pte_free_finish();
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
extern void tlb_flush(struct mmu_gather *tlb);
|
||||
|
||||
#endif
|
||||
|
||||
/* Get the generic bits... */
|
||||
#include <asm-generic/tlb.h>
|
||||
|
||||
#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__)
|
||||
|
||||
#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
|
||||
|
||||
#else
|
||||
extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
|
||||
unsigned long address);
|
||||
|
||||
static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
|
||||
unsigned long address)
|
||||
unsigned long address)
|
||||
{
|
||||
#ifdef CONFIG_PPC_STD_MMU_32
|
||||
if (pte_val(*ptep) & _PAGE_HASHPTE)
|
||||
flush_hash_entry(tlb->mm, ptep, address);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_POWERPC_TLB_H */
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
*
|
||||
* - flush_tlb_mm(mm) flushes the specified mm context TLB's
|
||||
* - flush_tlb_page(vma, vmaddr) flushes one page
|
||||
* - local_flush_tlb_mm(mm) flushes the specified mm context on
|
||||
* - local_flush_tlb_mm(mm, full) flushes the specified mm context on
|
||||
* the local processor
|
||||
* - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
|
||||
* - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
|
||||
|
|
@ -29,7 +29,8 @@
|
|||
* specific tlbie's
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
struct vm_area_struct;
|
||||
struct mm_struct;
|
||||
|
||||
#define MMU_NO_CONTEXT ((unsigned int)-1)
|
||||
|
||||
|
|
@ -40,12 +41,18 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
|
|||
extern void local_flush_tlb_mm(struct mm_struct *mm);
|
||||
extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
|
||||
|
||||
extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
|
||||
int tsize, int ind);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
extern void flush_tlb_mm(struct mm_struct *mm);
|
||||
extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
|
||||
extern void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
|
||||
int tsize, int ind);
|
||||
#else
|
||||
#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
|
||||
#define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
|
||||
#define __flush_tlb_page(mm,addr,p,i) __local_flush_tlb_page(mm,addr,p,i)
|
||||
#endif
|
||||
#define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
|
||||
|
||||
|
|
|
|||
|
|
@ -7,9 +7,8 @@
|
|||
#define VDSO32_LBASE 0x100000
|
||||
#define VDSO64_LBASE 0x100000
|
||||
|
||||
/* Default map addresses */
|
||||
/* Default map addresses for 32bit vDSO */
|
||||
#define VDSO32_MBASE VDSO32_LBASE
|
||||
#define VDSO64_MBASE VDSO64_LBASE
|
||||
|
||||
#define VDSO_VERSION_STRING LINUX_2.6.15
|
||||
|
||||
|
|
|
|||
|
|
@ -33,10 +33,10 @@ obj-y := cputable.o ptrace.o syscalls.o \
|
|||
obj-y += vdso32/
|
||||
obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
|
||||
signal_64.o ptrace32.o \
|
||||
paca.o cpu_setup_ppc970.o \
|
||||
cpu_setup_pa6t.o \
|
||||
firmware.o nvram_64.o
|
||||
paca.o nvram_64.o firmware.o
|
||||
obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o
|
||||
obj64-$(CONFIG_RELOCATABLE) += reloc_64.o
|
||||
obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o
|
||||
obj-$(CONFIG_PPC64) += vdso64/
|
||||
obj-$(CONFIG_ALTIVEC) += vecemu.o
|
||||
obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
|
||||
|
|
@ -63,8 +63,8 @@ obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
|
|||
obj-$(CONFIG_44x) += cpu_setup_44x.o
|
||||
obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o dbell.o
|
||||
|
||||
extra-$(CONFIG_PPC_STD_MMU) := head_32.o
|
||||
extra-$(CONFIG_PPC64) := head_64.o
|
||||
extra-y := head_$(CONFIG_WORD_SIZE).o
|
||||
extra-$(CONFIG_PPC_BOOK3E_32) := head_new_booke.o
|
||||
extra-$(CONFIG_40x) := head_40x.o
|
||||
extra-$(CONFIG_44x) := head_44x.o
|
||||
extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
|
||||
|
|
@ -88,7 +88,7 @@ obj-$(CONFIG_SWIOTLB) += dma-swiotlb.o
|
|||
|
||||
pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
|
||||
obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
|
||||
pci-common.o
|
||||
pci-common.o pci_of_scan.o
|
||||
obj-$(CONFIG_PCI_MSI) += msi.o
|
||||
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o \
|
||||
machine_kexec_$(CONFIG_WORD_SIZE).o
|
||||
|
|
@ -115,6 +115,13 @@ ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC),)
|
|||
obj-y += ppc_save_regs.o
|
||||
endif
|
||||
|
||||
# Disable GCOV in odd or sensitive code
|
||||
GCOV_PROFILE_prom_init.o := n
|
||||
GCOV_PROFILE_ftrace.o := n
|
||||
GCOV_PROFILE_machine_kexec_64.o := n
|
||||
GCOV_PROFILE_machine_kexec_32.o := n
|
||||
GCOV_PROFILE_kprobes.o := n
|
||||
|
||||
extra-$(CONFIG_PPC_FPU) += fpu.o
|
||||
extra-$(CONFIG_ALTIVEC) += vector.o
|
||||
extra-$(CONFIG_PPC64) += entry_64.o
|
||||
|
|
|
|||
|
|
@ -52,9 +52,11 @@
|
|||
#include <linux/kvm_host.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
||||
#include "head_booke.h"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FSL_BOOKE)
|
||||
#include "../mm/mmu_decl.h"
|
||||
|
|
@ -140,6 +142,20 @@ int main(void)
|
|||
context.high_slices_psize));
|
||||
DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
|
||||
#endif /* CONFIG_PPC_MM_SLICES */
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
|
||||
DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
|
||||
DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
|
||||
DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
|
||||
DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
|
||||
DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
|
||||
DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
|
||||
DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
|
||||
DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
|
||||
DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
#ifdef CONFIG_PPC_STD_MMU_64
|
||||
DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
|
||||
DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
|
||||
|
|
@ -262,6 +278,7 @@ int main(void)
|
|||
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#if defined(CONFIG_PPC32)
|
||||
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
||||
DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
|
||||
DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
|
||||
|
|
@ -280,7 +297,7 @@ int main(void)
|
|||
DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
|
||||
DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
|
||||
#endif
|
||||
|
||||
#endif
|
||||
DEFINE(CLONE_VM, CLONE_VM);
|
||||
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ _GLOBAL(__setup_cpu_603)
|
|||
mflr r4
|
||||
BEGIN_MMU_FTR_SECTION
|
||||
li r10,0
|
||||
mtspr SPRN_SPRG4,r10 /* init SW LRU tracking */
|
||||
mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
|
||||
END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
|
||||
BEGIN_FTR_SECTION
|
||||
bl __init_fpu_registers
|
||||
|
|
|
|||
|
|
@ -89,11 +89,15 @@ extern void __restore_cpu_power7(void);
|
|||
#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
|
||||
PPC_FEATURE_TRUE_LE | \
|
||||
PPC_FEATURE_HAS_ALTIVEC_COMP)
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
|
||||
#else
|
||||
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
|
||||
PPC_FEATURE_BOOKE)
|
||||
#endif
|
||||
|
||||
static struct cpu_spec __initdata cpu_specs[] = {
|
||||
#ifdef CONFIG_PPC64
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
{ /* Power3 */
|
||||
.pvr_mask = 0xffff0000,
|
||||
.pvr_value = 0x00400000,
|
||||
|
|
@ -508,7 +512,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.machine_check = machine_check_generic,
|
||||
.platform = "power4",
|
||||
}
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* CONFIG_PPC_BOOK3S_64 */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#if CLASSIC_PPC
|
||||
{ /* 601 */
|
||||
|
|
@ -1630,7 +1635,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460EX */
|
||||
.pvr_mask = 0xffff0002,
|
||||
.pvr_mask = 0xffff0006,
|
||||
.pvr_value = 0x13020002,
|
||||
.cpu_name = "460EX",
|
||||
.cpu_features = CPU_FTRS_440x6,
|
||||
|
|
@ -1642,8 +1647,21 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.machine_check = machine_check_440A,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460EX Rev B */
|
||||
.pvr_mask = 0xffff0007,
|
||||
.pvr_value = 0x13020004,
|
||||
.cpu_name = "460EX Rev. B",
|
||||
.cpu_features = CPU_FTRS_440x6,
|
||||
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
||||
.mmu_features = MMU_FTR_TYPE_44x,
|
||||
.icache_bsize = 32,
|
||||
.dcache_bsize = 32,
|
||||
.cpu_setup = __setup_cpu_460ex,
|
||||
.machine_check = machine_check_440A,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460GT */
|
||||
.pvr_mask = 0xffff0002,
|
||||
.pvr_mask = 0xffff0006,
|
||||
.pvr_value = 0x13020000,
|
||||
.cpu_name = "460GT",
|
||||
.cpu_features = CPU_FTRS_440x6,
|
||||
|
|
@ -1655,6 +1673,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.machine_check = machine_check_440A,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460GT Rev B */
|
||||
.pvr_mask = 0xffff0007,
|
||||
.pvr_value = 0x13020005,
|
||||
.cpu_name = "460GT Rev. B",
|
||||
.cpu_features = CPU_FTRS_440x6,
|
||||
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
||||
.mmu_features = MMU_FTR_TYPE_44x,
|
||||
.icache_bsize = 32,
|
||||
.dcache_bsize = 32,
|
||||
.cpu_setup = __setup_cpu_460gt,
|
||||
.machine_check = machine_check_440A,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460SX */
|
||||
.pvr_mask = 0xffffff00,
|
||||
.pvr_value = 0x13541800,
|
||||
|
|
@ -1797,6 +1828,29 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
}
|
||||
#endif /* CONFIG_E500 */
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E_64
|
||||
{ /* This is a default entry to get going, to be replaced by
|
||||
* a real one at some stage
|
||||
*/
|
||||
#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
|
||||
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
|
||||
CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
|
||||
.pvr_mask = 0x00000000,
|
||||
.pvr_value = 0x00000000,
|
||||
.cpu_name = "Book3E",
|
||||
.cpu_features = CPU_FTRS_BASE_BOOK3E,
|
||||
.cpu_user_features = COMMON_USER_PPC64,
|
||||
.mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
|
||||
MMU_FTR_USE_TLBIVAX_BCAST |
|
||||
MMU_FTR_LOCK_BCAST_INVAL,
|
||||
.icache_bsize = 64,
|
||||
.dcache_bsize = 64,
|
||||
.num_pmcs = 0,
|
||||
.machine_check = machine_check_generic,
|
||||
.platform = "power6",
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct cpu_spec the_cpu_spec;
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ static int dma_iommu_dma_supported(struct device *dev, u64 mask)
|
|||
return 1;
|
||||
}
|
||||
|
||||
struct dma_mapping_ops dma_iommu_ops = {
|
||||
struct dma_map_ops dma_iommu_ops = {
|
||||
.alloc_coherent = dma_iommu_alloc_coherent,
|
||||
.free_coherent = dma_iommu_free_coherent,
|
||||
.map_sg = dma_iommu_map_sg,
|
||||
|
|
|
|||
|
|
@ -24,26 +24,6 @@
|
|||
int swiotlb __read_mostly;
|
||||
unsigned int ppc_swiotlb_enable;
|
||||
|
||||
/*
|
||||
* Determine if an address is reachable by a pci device, or if we must bounce.
|
||||
*/
|
||||
static int
|
||||
swiotlb_pci_addr_needs_map(struct device *hwdev, dma_addr_t addr, size_t size)
|
||||
{
|
||||
dma_addr_t max;
|
||||
struct pci_controller *hose;
|
||||
struct pci_dev *pdev = to_pci_dev(hwdev);
|
||||
|
||||
hose = pci_bus_to_host(pdev->bus);
|
||||
max = hose->dma_window_base_cur + hose->dma_window_size;
|
||||
|
||||
/* check that we're within mapped pci window space */
|
||||
if ((addr + size > max) | (addr < hose->dma_window_base_cur))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* At the moment, all platforms that use this code only require
|
||||
* swiotlb to be used if we're operating on HIGHMEM. Since
|
||||
|
|
@ -51,7 +31,7 @@ swiotlb_pci_addr_needs_map(struct device *hwdev, dma_addr_t addr, size_t size)
|
|||
* map_page, and unmap_page on highmem, use normal dma_ops
|
||||
* for everything else.
|
||||
*/
|
||||
struct dma_mapping_ops swiotlb_dma_ops = {
|
||||
struct dma_map_ops swiotlb_dma_ops = {
|
||||
.alloc_coherent = dma_direct_alloc_coherent,
|
||||
.free_coherent = dma_direct_free_coherent,
|
||||
.map_sg = swiotlb_map_sg_attrs,
|
||||
|
|
@ -62,33 +42,34 @@ struct dma_mapping_ops swiotlb_dma_ops = {
|
|||
.sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
|
||||
.sync_single_range_for_device = swiotlb_sync_single_range_for_device,
|
||||
.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = swiotlb_sync_sg_for_device
|
||||
.sync_sg_for_device = swiotlb_sync_sg_for_device,
|
||||
.mapping_error = swiotlb_dma_mapping_error,
|
||||
};
|
||||
|
||||
struct dma_mapping_ops swiotlb_pci_dma_ops = {
|
||||
.alloc_coherent = dma_direct_alloc_coherent,
|
||||
.free_coherent = dma_direct_free_coherent,
|
||||
.map_sg = swiotlb_map_sg_attrs,
|
||||
.unmap_sg = swiotlb_unmap_sg_attrs,
|
||||
.dma_supported = swiotlb_dma_supported,
|
||||
.map_page = swiotlb_map_page,
|
||||
.unmap_page = swiotlb_unmap_page,
|
||||
.addr_needs_map = swiotlb_pci_addr_needs_map,
|
||||
.sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
|
||||
.sync_single_range_for_device = swiotlb_sync_single_range_for_device,
|
||||
.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = swiotlb_sync_sg_for_device
|
||||
};
|
||||
void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev)
|
||||
{
|
||||
struct pci_controller *hose;
|
||||
struct dev_archdata *sd;
|
||||
|
||||
hose = pci_bus_to_host(pdev->bus);
|
||||
sd = &pdev->dev.archdata;
|
||||
sd->max_direct_dma_addr =
|
||||
hose->dma_window_base_cur + hose->dma_window_size;
|
||||
}
|
||||
|
||||
static int ppc_swiotlb_bus_notify(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
struct device *dev = data;
|
||||
struct dev_archdata *sd;
|
||||
|
||||
/* We are only intereted in device addition */
|
||||
if (action != BUS_NOTIFY_ADD_DEVICE)
|
||||
return 0;
|
||||
|
||||
sd = &dev->archdata;
|
||||
sd->max_direct_dma_addr = 0;
|
||||
|
||||
/* May need to bounce if the device can't address all of DRAM */
|
||||
if (dma_get_mask(dev) < lmb_end_of_DRAM())
|
||||
set_dma_ops(dev, &swiotlb_dma_ops);
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/dma-debug.h>
|
||||
#include <linux/lmb.h>
|
||||
#include <asm/bug.h>
|
||||
#include <asm/abs_addr.h>
|
||||
|
|
@ -140,7 +141,7 @@ static inline void dma_direct_sync_single_range(struct device *dev,
|
|||
}
|
||||
#endif
|
||||
|
||||
struct dma_mapping_ops dma_direct_ops = {
|
||||
struct dma_map_ops dma_direct_ops = {
|
||||
.alloc_coherent = dma_direct_alloc_coherent,
|
||||
.free_coherent = dma_direct_free_coherent,
|
||||
.map_sg = dma_direct_map_sg,
|
||||
|
|
@ -156,3 +157,13 @@ struct dma_mapping_ops dma_direct_ops = {
|
|||
#endif
|
||||
};
|
||||
EXPORT_SYMBOL(dma_direct_ops);
|
||||
|
||||
#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
|
||||
|
||||
static int __init dma_init(void)
|
||||
{
|
||||
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
|
||||
|
||||
return 0;
|
||||
}
|
||||
fs_initcall(dma_init);
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ crit_transfer_to_handler:
|
|||
mfspr r0,SPRN_SRR1
|
||||
stw r0,_SRR1(r11)
|
||||
|
||||
mfspr r8,SPRN_SPRG3
|
||||
mfspr r8,SPRN_SPRG_THREAD
|
||||
lwz r0,KSP_LIMIT(r8)
|
||||
stw r0,SAVED_KSP_LIMIT(r11)
|
||||
rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
|
||||
|
|
@ -108,7 +108,7 @@ crit_transfer_to_handler:
|
|||
mfspr r0,SPRN_SRR1
|
||||
stw r0,crit_srr1@l(0)
|
||||
|
||||
mfspr r8,SPRN_SPRG3
|
||||
mfspr r8,SPRN_SPRG_THREAD
|
||||
lwz r0,KSP_LIMIT(r8)
|
||||
stw r0,saved_ksp_limit@l(0)
|
||||
rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
|
||||
|
|
@ -138,7 +138,7 @@ transfer_to_handler:
|
|||
mfspr r2,SPRN_XER
|
||||
stw r12,_CTR(r11)
|
||||
stw r2,_XER(r11)
|
||||
mfspr r12,SPRN_SPRG3
|
||||
mfspr r12,SPRN_SPRG_THREAD
|
||||
addi r2,r12,-THREAD
|
||||
tovirt(r2,r2) /* set r2 to current */
|
||||
beq 2f /* if from user, fix up THREAD.regs */
|
||||
|
|
@ -680,7 +680,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPE)
|
|||
|
||||
tophys(r0,r4)
|
||||
CLR_TOP32(r0)
|
||||
mtspr SPRN_SPRG3,r0 /* Update current THREAD phys addr */
|
||||
mtspr SPRN_SPRG_THREAD,r0 /* Update current THREAD phys addr */
|
||||
lwz r1,KSP(r4) /* Load new stack pointer */
|
||||
|
||||
/* save the old current 'last' for return value */
|
||||
|
|
@ -1057,7 +1057,7 @@ exc_exit_restart_end:
|
|||
#ifdef CONFIG_40x
|
||||
.globl ret_from_crit_exc
|
||||
ret_from_crit_exc:
|
||||
mfspr r9,SPRN_SPRG3
|
||||
mfspr r9,SPRN_SPRG_THREAD
|
||||
lis r10,saved_ksp_limit@ha;
|
||||
lwz r10,saved_ksp_limit@l(r10);
|
||||
tovirt(r9,r9);
|
||||
|
|
@ -1074,7 +1074,7 @@ ret_from_crit_exc:
|
|||
#ifdef CONFIG_BOOKE
|
||||
.globl ret_from_crit_exc
|
||||
ret_from_crit_exc:
|
||||
mfspr r9,SPRN_SPRG3
|
||||
mfspr r9,SPRN_SPRG_THREAD
|
||||
lwz r10,SAVED_KSP_LIMIT(r1)
|
||||
stw r10,KSP_LIMIT(r9)
|
||||
RESTORE_xSRR(SRR0,SRR1);
|
||||
|
|
@ -1083,7 +1083,7 @@ ret_from_crit_exc:
|
|||
|
||||
.globl ret_from_debug_exc
|
||||
ret_from_debug_exc:
|
||||
mfspr r9,SPRN_SPRG3
|
||||
mfspr r9,SPRN_SPRG_THREAD
|
||||
lwz r10,SAVED_KSP_LIMIT(r1)
|
||||
stw r10,KSP_LIMIT(r9)
|
||||
lwz r9,THREAD_INFO-THREAD(r9)
|
||||
|
|
@ -1097,7 +1097,7 @@ ret_from_debug_exc:
|
|||
|
||||
.globl ret_from_mcheck_exc
|
||||
ret_from_mcheck_exc:
|
||||
mfspr r9,SPRN_SPRG3
|
||||
mfspr r9,SPRN_SPRG_THREAD
|
||||
lwz r10,SAVED_KSP_LIMIT(r1)
|
||||
stw r10,KSP_LIMIT(r9)
|
||||
RESTORE_xSRR(SRR0,SRR1);
|
||||
|
|
@ -1255,7 +1255,7 @@ _GLOBAL(enter_rtas)
|
|||
MTMSRD(r0) /* don't get trashed */
|
||||
li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
|
||||
mtlr r6
|
||||
mtspr SPRN_SPRG2,r7
|
||||
mtspr SPRN_SPRG_RTAS,r7
|
||||
mtspr SPRN_SRR0,r8
|
||||
mtspr SPRN_SRR1,r9
|
||||
RFI
|
||||
|
|
@ -1265,7 +1265,7 @@ _GLOBAL(enter_rtas)
|
|||
FIX_SRR1(r9,r0)
|
||||
addi r1,r1,INT_FRAME_SIZE
|
||||
li r0,0
|
||||
mtspr SPRN_SPRG2,r0
|
||||
mtspr SPRN_SPRG_RTAS,r0
|
||||
mtspr SPRN_SRR0,r8
|
||||
mtspr SPRN_SRR1,r9
|
||||
RFI /* return to caller */
|
||||
|
|
|
|||
|
|
@ -120,9 +120,15 @@ BEGIN_FW_FTR_SECTION
|
|||
2:
|
||||
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
|
||||
#endif /* CONFIG_PPC_ISERIES */
|
||||
|
||||
/* Hard enable interrupts */
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 1
|
||||
#else
|
||||
mfmsr r11
|
||||
ori r11,r11,MSR_EE
|
||||
mtmsrd r11,1
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
#ifdef SHOW_SYSCALLS
|
||||
bl .do_show_syscall
|
||||
|
|
@ -168,15 +174,25 @@ syscall_exit:
|
|||
#endif
|
||||
clrrdi r12,r1,THREAD_SHIFT
|
||||
|
||||
/* disable interrupts so current_thread_info()->flags can't change,
|
||||
and so that we don't get interrupted after loading SRR0/1. */
|
||||
ld r8,_MSR(r1)
|
||||
#ifdef CONFIG_PPC_BOOK3S
|
||||
/* No MSR:RI on BookE */
|
||||
andi. r10,r8,MSR_RI
|
||||
beq- unrecov_restore
|
||||
#endif
|
||||
|
||||
/* Disable interrupts so current_thread_info()->flags can't change,
|
||||
* and so that we don't get interrupted after loading SRR0/1.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 0
|
||||
#else
|
||||
mfmsr r10
|
||||
rldicl r10,r10,48,1
|
||||
rotldi r10,r10,16
|
||||
mtmsrd r10,1
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
ld r9,TI_FLAGS(r12)
|
||||
li r11,-_LAST_ERRNO
|
||||
andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
|
||||
|
|
@ -194,9 +210,13 @@ syscall_error_cont:
|
|||
* userspace and we take an exception after restoring r13,
|
||||
* we end up corrupting the userspace r13 value.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3S
|
||||
/* No MSR:RI on BookE */
|
||||
li r12,MSR_RI
|
||||
andc r11,r10,r12
|
||||
mtmsrd r11,1 /* clear MSR.RI */
|
||||
#endif /* CONFIG_PPC_BOOK3S */
|
||||
|
||||
beq- 1f
|
||||
ACCOUNT_CPU_USER_EXIT(r11, r12)
|
||||
ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
|
||||
|
|
@ -206,7 +226,7 @@ syscall_error_cont:
|
|||
mtcr r5
|
||||
mtspr SPRN_SRR0,r7
|
||||
mtspr SPRN_SRR1,r8
|
||||
rfid
|
||||
RFI
|
||||
b . /* prevent speculative execution */
|
||||
|
||||
syscall_error:
|
||||
|
|
@ -276,9 +296,13 @@ syscall_exit_work:
|
|||
beq .ret_from_except_lite
|
||||
|
||||
/* Re-enable interrupts */
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 1
|
||||
#else
|
||||
mfmsr r10
|
||||
ori r10,r10,MSR_EE
|
||||
mtmsrd r10,1
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
bl .save_nvgprs
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
|
|
@ -380,7 +404,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
|
|||
and. r0,r0,r22
|
||||
beq+ 1f
|
||||
andc r22,r22,r0
|
||||
mtmsrd r22
|
||||
MTMSRD(r22)
|
||||
isync
|
||||
1: std r20,_NIP(r1)
|
||||
mfcr r23
|
||||
|
|
@ -399,6 +423,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
|
|||
std r6,PACACURRENT(r13) /* Set new 'current' */
|
||||
|
||||
ld r8,KSP(r4) /* new stack pointer */
|
||||
#ifdef CONFIG_PPC_BOOK3S
|
||||
BEGIN_FTR_SECTION
|
||||
BEGIN_FTR_SECTION_NESTED(95)
|
||||
clrrdi r6,r8,28 /* get its ESID */
|
||||
|
|
@ -445,8 +470,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
|
|||
slbie r6 /* Workaround POWER5 < DD2.1 issue */
|
||||
slbmte r7,r0
|
||||
isync
|
||||
|
||||
2:
|
||||
#endif /* !CONFIG_PPC_BOOK3S */
|
||||
|
||||
clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
|
||||
/* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
|
||||
because we don't need to leave the 288-byte ABI gap at the
|
||||
|
|
@ -490,10 +516,14 @@ _GLOBAL(ret_from_except_lite)
|
|||
* can't change between when we test it and when we return
|
||||
* from the interrupt.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 0
|
||||
#else
|
||||
mfmsr r10 /* Get current interrupt state */
|
||||
rldicl r9,r10,48,1 /* clear MSR_EE */
|
||||
rotldi r9,r9,16
|
||||
mtmsrd r9,1 /* Update machine state */
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
#ifdef CONFIG_PREEMPT
|
||||
clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
|
||||
|
|
@ -540,6 +570,9 @@ ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
|
|||
rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
|
||||
stb r4,PACAHARDIRQEN(r13)
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
b .exception_return_book3e
|
||||
#else
|
||||
ld r4,_CTR(r1)
|
||||
ld r0,_LINK(r1)
|
||||
mtctr r4
|
||||
|
|
@ -588,6 +621,8 @@ ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
|
|||
rfid
|
||||
b . /* prevent speculative execution */
|
||||
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
iseries_check_pending_irqs:
|
||||
#ifdef CONFIG_PPC_ISERIES
|
||||
ld r5,SOFTE(r1)
|
||||
|
|
@ -638,6 +673,11 @@ do_work:
|
|||
li r0,1
|
||||
stb r0,PACASOFTIRQEN(r13)
|
||||
stb r0,PACAHARDIRQEN(r13)
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 1
|
||||
bl .preempt_schedule
|
||||
wrteei 0
|
||||
#else
|
||||
ori r10,r10,MSR_EE
|
||||
mtmsrd r10,1 /* reenable interrupts */
|
||||
bl .preempt_schedule
|
||||
|
|
@ -646,6 +686,7 @@ do_work:
|
|||
rldicl r10,r10,48,1 /* disable interrupts again */
|
||||
rotldi r10,r10,16
|
||||
mtmsrd r10,1
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
ld r4,TI_FLAGS(r9)
|
||||
andi. r0,r4,_TIF_NEED_RESCHED
|
||||
bne 1b
|
||||
|
|
@ -654,8 +695,12 @@ do_work:
|
|||
user_work:
|
||||
#endif
|
||||
/* Enable interrupts */
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
wrteei 1
|
||||
#else
|
||||
ori r10,r10,MSR_EE
|
||||
mtmsrd r10,1
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
andi. r0,r4,_TIF_NEED_RESCHED
|
||||
beq 1f
|
||||
|
|
@ -762,7 +807,7 @@ _GLOBAL(enter_rtas)
|
|||
|
||||
_STATIC(rtas_return_loc)
|
||||
/* relocation is off at this point */
|
||||
mfspr r4,SPRN_SPRG3 /* Get PACA */
|
||||
mfspr r4,SPRN_SPRG_PACA /* Get PACA */
|
||||
clrldi r4,r4,2 /* convert to realmode address */
|
||||
|
||||
bcl 20,31,$+4
|
||||
|
|
@ -793,7 +838,7 @@ _STATIC(rtas_restore_regs)
|
|||
REST_8GPRS(14, r1) /* Restore the non-volatiles */
|
||||
REST_10GPRS(22, r1) /* ditto */
|
||||
|
||||
mfspr r13,SPRN_SPRG3
|
||||
mfspr r13,SPRN_SPRG_PACA
|
||||
|
||||
ld r4,_CCR(r1)
|
||||
mtcr r4
|
||||
|
|
@ -823,33 +868,24 @@ _GLOBAL(enter_prom)
|
|||
* of all registers that it saves. We therefore save those registers
|
||||
* PROM might touch to the stack. (r0, r3-r13 are caller saved)
|
||||
*/
|
||||
SAVE_8GPRS(2, r1)
|
||||
SAVE_GPR(2, r1)
|
||||
SAVE_GPR(13, r1)
|
||||
SAVE_8GPRS(14, r1)
|
||||
SAVE_10GPRS(22, r1)
|
||||
mfcr r4
|
||||
std r4,_CCR(r1)
|
||||
mfctr r5
|
||||
std r5,_CTR(r1)
|
||||
mfspr r6,SPRN_XER
|
||||
std r6,_XER(r1)
|
||||
mfdar r7
|
||||
std r7,_DAR(r1)
|
||||
mfdsisr r8
|
||||
std r8,_DSISR(r1)
|
||||
mfsrr0 r9
|
||||
std r9,_SRR0(r1)
|
||||
mfsrr1 r10
|
||||
std r10,_SRR1(r1)
|
||||
mfcr r10
|
||||
mfmsr r11
|
||||
std r10,_CCR(r1)
|
||||
std r11,_MSR(r1)
|
||||
|
||||
/* Get the PROM entrypoint */
|
||||
ld r0,GPR4(r1)
|
||||
mtlr r0
|
||||
mtlr r4
|
||||
|
||||
/* Switch MSR to 32 bits mode
|
||||
*/
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
rlwinm r11,r11,0,1,31
|
||||
mtmsr r11
|
||||
#else /* CONFIG_PPC_BOOK3E */
|
||||
mfmsr r11
|
||||
li r12,1
|
||||
rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
|
||||
|
|
@ -858,10 +894,10 @@ _GLOBAL(enter_prom)
|
|||
rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
|
||||
andc r11,r11,r12
|
||||
mtmsrd r11
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
isync
|
||||
|
||||
/* Restore arguments & enter PROM here... */
|
||||
ld r3,GPR3(r1)
|
||||
/* Enter PROM here... */
|
||||
blrl
|
||||
|
||||
/* Just make sure that r1 top 32 bits didn't get
|
||||
|
|
@ -871,7 +907,7 @@ _GLOBAL(enter_prom)
|
|||
|
||||
/* Restore the MSR (back to 64 bits) */
|
||||
ld r0,_MSR(r1)
|
||||
mtmsrd r0
|
||||
MTMSRD(r0)
|
||||
isync
|
||||
|
||||
/* Restore other registers */
|
||||
|
|
@ -881,18 +917,6 @@ _GLOBAL(enter_prom)
|
|||
REST_10GPRS(22, r1)
|
||||
ld r4,_CCR(r1)
|
||||
mtcr r4
|
||||
ld r5,_CTR(r1)
|
||||
mtctr r5
|
||||
ld r6,_XER(r1)
|
||||
mtspr SPRN_XER,r6
|
||||
ld r7,_DAR(r1)
|
||||
mtdar r7
|
||||
ld r8,_DSISR(r1)
|
||||
mtdsisr r8
|
||||
ld r9,_SRR0(r1)
|
||||
mtsrr0 r9
|
||||
ld r10,_SRR1(r1)
|
||||
mtsrr1 r10
|
||||
|
||||
addi r1,r1,PROM_FRAME_SIZE
|
||||
ld r0,16(r1)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -12,6 +12,8 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <asm/exception-64s.h>
|
||||
|
||||
/*
|
||||
* We layout physical memory as follows:
|
||||
* 0x0000 - 0x00ff : Secondary processor spin code
|
||||
|
|
@ -22,18 +24,6 @@
|
|||
* 0x8000 - : Early init and support code
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* SPRG Usage
|
||||
*
|
||||
* Register Definition
|
||||
*
|
||||
* SPRG0 reserved for hypervisor
|
||||
* SPRG1 temp - used to save gpr
|
||||
* SPRG2 temp - used to save gpr
|
||||
* SPRG3 virt addr of paca
|
||||
*/
|
||||
|
||||
/*
|
||||
* This is the start of the interrupt handlers for pSeries
|
||||
* This code runs with relocation off.
|
||||
|
|
@ -51,34 +41,44 @@ __start_interrupts:
|
|||
. = 0x200
|
||||
_machine_check_pSeries:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13 /* save r13 */
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
|
||||
|
||||
. = 0x300
|
||||
.globl data_access_pSeries
|
||||
data_access_pSeries:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13
|
||||
BEGIN_FTR_SECTION
|
||||
mtspr SPRN_SPRG2,r12
|
||||
mfspr r13,SPRN_DAR
|
||||
mfspr r12,SPRN_DSISR
|
||||
srdi r13,r13,60
|
||||
rlwimi r13,r12,16,0x20
|
||||
mfcr r12
|
||||
cmpwi r13,0x2c
|
||||
mfspr r13,SPRN_SPRG_PACA
|
||||
std r9,PACA_EXSLB+EX_R9(r13)
|
||||
std r10,PACA_EXSLB+EX_R10(r13)
|
||||
mfspr r10,SPRN_DAR
|
||||
mfspr r9,SPRN_DSISR
|
||||
srdi r10,r10,60
|
||||
rlwimi r10,r9,16,0x20
|
||||
mfcr r9
|
||||
cmpwi r10,0x2c
|
||||
beq do_stab_bolted_pSeries
|
||||
mtcrf 0x80,r12
|
||||
mfspr r12,SPRN_SPRG2
|
||||
END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
|
||||
ld r10,PACA_EXSLB+EX_R10(r13)
|
||||
std r11,PACA_EXGEN+EX_R11(r13)
|
||||
ld r11,PACA_EXSLB+EX_R9(r13)
|
||||
std r12,PACA_EXGEN+EX_R12(r13)
|
||||
mfspr r12,SPRN_SPRG_SCRATCH0
|
||||
std r10,PACA_EXGEN+EX_R10(r13)
|
||||
std r11,PACA_EXGEN+EX_R9(r13)
|
||||
std r12,PACA_EXGEN+EX_R13(r13)
|
||||
EXCEPTION_PROLOG_PSERIES_1(data_access_common)
|
||||
FTR_SECTION_ELSE
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
|
||||
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
|
||||
|
||||
. = 0x380
|
||||
.globl data_access_slb_pSeries
|
||||
data_access_slb_pSeries:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13
|
||||
mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13
|
||||
mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */
|
||||
std r3,PACA_EXSLB+EX_R3(r13)
|
||||
mfspr r3,SPRN_DAR
|
||||
std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
|
||||
|
|
@ -91,7 +91,7 @@ data_access_slb_pSeries:
|
|||
std r10,PACA_EXSLB+EX_R10(r13)
|
||||
std r11,PACA_EXSLB+EX_R11(r13)
|
||||
std r12,PACA_EXSLB+EX_R12(r13)
|
||||
mfspr r10,SPRN_SPRG1
|
||||
mfspr r10,SPRN_SPRG_SCRATCH0
|
||||
std r10,PACA_EXSLB+EX_R13(r13)
|
||||
mfspr r12,SPRN_SRR1 /* and SRR1 */
|
||||
#ifndef CONFIG_RELOCATABLE
|
||||
|
|
@ -115,8 +115,8 @@ data_access_slb_pSeries:
|
|||
.globl instruction_access_slb_pSeries
|
||||
instruction_access_slb_pSeries:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13
|
||||
mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13
|
||||
mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */
|
||||
std r3,PACA_EXSLB+EX_R3(r13)
|
||||
mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
|
||||
std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
|
||||
|
|
@ -129,7 +129,7 @@ instruction_access_slb_pSeries:
|
|||
std r10,PACA_EXSLB+EX_R10(r13)
|
||||
std r11,PACA_EXSLB+EX_R11(r13)
|
||||
std r12,PACA_EXSLB+EX_R12(r13)
|
||||
mfspr r10,SPRN_SPRG1
|
||||
mfspr r10,SPRN_SPRG_SCRATCH0
|
||||
std r10,PACA_EXSLB+EX_R13(r13)
|
||||
mfspr r12,SPRN_SRR1 /* and SRR1 */
|
||||
#ifndef CONFIG_RELOCATABLE
|
||||
|
|
@ -159,7 +159,7 @@ BEGIN_FTR_SECTION
|
|||
beq- 1f
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
|
||||
mr r9,r13
|
||||
mfspr r13,SPRN_SPRG3
|
||||
mfspr r13,SPRN_SPRG_PACA
|
||||
mfspr r11,SPRN_SRR0
|
||||
ld r12,PACAKBASE(r13)
|
||||
ld r10,PACAKMSR(r13)
|
||||
|
|
@ -228,15 +228,17 @@ masked_interrupt:
|
|||
rotldi r10,r10,16
|
||||
mtspr SPRN_SRR1,r10
|
||||
ld r10,PACA_EXGEN+EX_R10(r13)
|
||||
mfspr r13,SPRN_SPRG1
|
||||
mfspr r13,SPRN_SPRG_SCRATCH0
|
||||
rfid
|
||||
b .
|
||||
|
||||
.align 7
|
||||
do_stab_bolted_pSeries:
|
||||
mtcrf 0x80,r12
|
||||
mfspr r12,SPRN_SPRG2
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
|
||||
std r11,PACA_EXSLB+EX_R11(r13)
|
||||
std r12,PACA_EXSLB+EX_R12(r13)
|
||||
mfspr r10,SPRN_SPRG_SCRATCH0
|
||||
std r10,PACA_EXSLB+EX_R13(r13)
|
||||
EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted)
|
||||
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
/*
|
||||
|
|
@ -246,14 +248,14 @@ do_stab_bolted_pSeries:
|
|||
.align 7
|
||||
system_reset_fwnmi:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13 /* save r13 */
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
|
||||
|
||||
.globl machine_check_fwnmi
|
||||
.align 7
|
||||
machine_check_fwnmi:
|
||||
HMT_MEDIUM
|
||||
mtspr SPRN_SPRG1,r13 /* save r13 */
|
||||
mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */
|
||||
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
|
||||
|
||||
#endif /* CONFIG_PPC_PSERIES */
|
||||
|
|
@ -268,7 +270,7 @@ slb_miss_user_pseries:
|
|||
std r10,PACA_EXGEN+EX_R10(r13)
|
||||
std r11,PACA_EXGEN+EX_R11(r13)
|
||||
std r12,PACA_EXGEN+EX_R12(r13)
|
||||
mfspr r10,SPRG1
|
||||
mfspr r10,SPRG_SCRATCH0
|
||||
ld r11,PACA_EXSLB+EX_R9(r13)
|
||||
ld r12,PACA_EXSLB+EX_R3(r13)
|
||||
std r10,PACA_EXGEN+EX_R13(r13)
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
|||
#endif /* CONFIG_SMP */
|
||||
/* enable use of FP after return */
|
||||
#ifdef CONFIG_PPC32
|
||||
mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
|
||||
mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
|
||||
lwz r4,THREAD_FPEXC_MODE(r5)
|
||||
ori r9,r9,MSR_FP /* enable FP for current */
|
||||
or r9,r9,r4
|
||||
|
|
|
|||
|
|
@ -244,8 +244,8 @@ __secondary_hold_acknowledge:
|
|||
* task's thread_struct.
|
||||
*/
|
||||
#define EXCEPTION_PROLOG \
|
||||
mtspr SPRN_SPRG0,r10; \
|
||||
mtspr SPRN_SPRG1,r11; \
|
||||
mtspr SPRN_SPRG_SCRATCH0,r10; \
|
||||
mtspr SPRN_SPRG_SCRATCH1,r11; \
|
||||
mfcr r10; \
|
||||
EXCEPTION_PROLOG_1; \
|
||||
EXCEPTION_PROLOG_2
|
||||
|
|
@ -255,7 +255,7 @@ __secondary_hold_acknowledge:
|
|||
andi. r11,r11,MSR_PR; \
|
||||
tophys(r11,r1); /* use tophys(r1) if kernel */ \
|
||||
beq 1f; \
|
||||
mfspr r11,SPRN_SPRG3; \
|
||||
mfspr r11,SPRN_SPRG_THREAD; \
|
||||
lwz r11,THREAD_INFO-THREAD(r11); \
|
||||
addi r11,r11,THREAD_SIZE; \
|
||||
tophys(r11,r11); \
|
||||
|
|
@ -267,9 +267,9 @@ __secondary_hold_acknowledge:
|
|||
stw r10,_CCR(r11); /* save registers */ \
|
||||
stw r12,GPR12(r11); \
|
||||
stw r9,GPR9(r11); \
|
||||
mfspr r10,SPRN_SPRG0; \
|
||||
mfspr r10,SPRN_SPRG_SCRATCH0; \
|
||||
stw r10,GPR10(r11); \
|
||||
mfspr r12,SPRN_SPRG1; \
|
||||
mfspr r12,SPRN_SPRG_SCRATCH1; \
|
||||
stw r12,GPR11(r11); \
|
||||
mflr r10; \
|
||||
stw r10,_LINK(r11); \
|
||||
|
|
@ -355,11 +355,11 @@ i##n: \
|
|||
* -- paulus.
|
||||
*/
|
||||
. = 0x200
|
||||
mtspr SPRN_SPRG0,r10
|
||||
mtspr SPRN_SPRG1,r11
|
||||
mtspr SPRN_SPRG_SCRATCH0,r10
|
||||
mtspr SPRN_SPRG_SCRATCH1,r11
|
||||
mfcr r10
|
||||
#ifdef CONFIG_PPC_CHRP
|
||||
mfspr r11,SPRN_SPRG2
|
||||
mfspr r11,SPRN_SPRG_RTAS
|
||||
cmpwi 0,r11,0
|
||||
bne 7f
|
||||
#endif /* CONFIG_PPC_CHRP */
|
||||
|
|
@ -367,7 +367,7 @@ i##n: \
|
|||
7: EXCEPTION_PROLOG_2
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
#ifdef CONFIG_PPC_CHRP
|
||||
mfspr r4,SPRN_SPRG2
|
||||
mfspr r4,SPRN_SPRG_RTAS
|
||||
cmpwi cr1,r4,0
|
||||
bne cr1,1f
|
||||
#endif
|
||||
|
|
@ -485,7 +485,7 @@ InstructionTLBMiss:
|
|||
mfspr r3,SPRN_IMISS
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
mfspr r2,SPRN_SPRG_THREAD
|
||||
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
|
||||
lwz r2,PGDIR(r2)
|
||||
bge- 112f
|
||||
|
|
@ -559,7 +559,7 @@ DataLoadTLBMiss:
|
|||
mfspr r3,SPRN_DMISS
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
mfspr r2,SPRN_SPRG_THREAD
|
||||
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
|
||||
lwz r2,PGDIR(r2)
|
||||
bge- 112f
|
||||
|
|
@ -598,12 +598,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
|
|||
mtcrf 0x80,r2
|
||||
BEGIN_MMU_FTR_SECTION
|
||||
li r0,1
|
||||
mfspr r1,SPRN_SPRG4
|
||||
mfspr r1,SPRN_SPRG_603_LRU
|
||||
rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
|
||||
slw r0,r0,r2
|
||||
xor r1,r0,r1
|
||||
srw r0,r1,r2
|
||||
mtspr SPRN_SPRG4,r1
|
||||
mtspr SPRN_SPRG_603_LRU,r1
|
||||
mfspr r2,SPRN_SRR1
|
||||
rlwimi r2,r0,31-14,14,14
|
||||
mtspr SPRN_SRR1,r2
|
||||
|
|
@ -643,7 +643,7 @@ DataStoreTLBMiss:
|
|||
mfspr r3,SPRN_DMISS
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
mfspr r2,SPRN_SPRG_THREAD
|
||||
li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
|
||||
lwz r2,PGDIR(r2)
|
||||
bge- 112f
|
||||
|
|
@ -678,12 +678,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
|
|||
mtcrf 0x80,r2
|
||||
BEGIN_MMU_FTR_SECTION
|
||||
li r0,1
|
||||
mfspr r1,SPRN_SPRG4
|
||||
mfspr r1,SPRN_SPRG_603_LRU
|
||||
rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
|
||||
slw r0,r0,r2
|
||||
xor r1,r0,r1
|
||||
srw r0,r1,r2
|
||||
mtspr SPRN_SPRG4,r1
|
||||
mtspr SPRN_SPRG_603_LRU,r1
|
||||
mfspr r2,SPRN_SRR1
|
||||
rlwimi r2,r0,31-14,14,14
|
||||
mtspr SPRN_SRR1,r2
|
||||
|
|
@ -864,9 +864,9 @@ __secondary_start:
|
|||
tophys(r4,r2)
|
||||
addi r4,r4,THREAD /* phys address of our thread_struct */
|
||||
CLR_TOP32(r4)
|
||||
mtspr SPRN_SPRG3,r4
|
||||
mtspr SPRN_SPRG_THREAD,r4
|
||||
li r3,0
|
||||
mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */
|
||||
mtspr SPRN_SPRG_RTAS,r3 /* 0 => not in RTAS */
|
||||
|
||||
/* enable MMU and jump to start_secondary */
|
||||
li r4,MSR_KERNEL
|
||||
|
|
@ -947,9 +947,9 @@ start_here:
|
|||
tophys(r4,r2)
|
||||
addi r4,r4,THREAD /* init task's THREAD */
|
||||
CLR_TOP32(r4)
|
||||
mtspr SPRN_SPRG3,r4
|
||||
mtspr SPRN_SPRG_THREAD,r4
|
||||
li r3,0
|
||||
mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */
|
||||
mtspr SPRN_SPRG_RTAS,r3 /* 0 => not in RTAS */
|
||||
|
||||
/* stack */
|
||||
lis r1,init_thread_union@ha
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue