net: qed: address kernel-doc warnings
Get rid of the kernel-doc warnings when building with W=1+ by rewriting the problematic doc comments according to the recommended format and style. Note that this only fixes problems found in C source files, headers aren't in scope for now. Signed-off-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -996,14 +996,17 @@ bool qed_send_qm_stop_cmd(struct qed_hwfn *p_hwfn,
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} while (0)
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/**
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* @brief qed_dmae_to_grc - is an internal function - writes from host to
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* wide-bus registers (split registers are not supported yet)
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* qed_dmae_to_grc() - Internal function for writing from host to
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* wide-bus registers (split registers are not supported yet).
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*
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* @param p_hwfn - HW device data
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* @param p_ptt - ptt window used for writing the registers.
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* @param p_data - pointer to source data.
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* @param addr - Destination register address.
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* @param len_in_dwords - data length in DWARDS (u32)
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* @p_hwfn: HW device data.
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* @p_ptt: PTT window used for writing the registers.
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* @p_data: Pointer to source data.
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* @addr: Destination register address.
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* @len_in_dwords: Data length in dwords (u32).
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*
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* Return: Length of the written data in dwords (u32) or -1 on invalid
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* input.
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*/
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static int qed_dmae_to_grc(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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@ -816,11 +816,12 @@ static inline u16 qed_attn_update_idx(struct qed_hwfn *p_hwfn,
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}
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/**
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* @brief qed_int_assertion - handles asserted attention bits
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* qed_int_assertion() - Handle asserted attention bits.
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*
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* @param p_hwfn
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* @param asserted_bits newly asserted bits
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* @return int
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* @p_hwfn: HW device data.
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* @asserted_bits: Newly asserted bits.
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*
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* Return: Zero value.
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*/
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static int qed_int_assertion(struct qed_hwfn *p_hwfn, u16 asserted_bits)
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{
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@ -880,16 +881,17 @@ static void qed_int_attn_print(struct qed_hwfn *p_hwfn,
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}
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/**
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* @brief qed_int_deassertion_aeu_bit - handles the effects of a single
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* cause of the attention
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* qed_int_deassertion_aeu_bit() - Handles the effects of a single
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* cause of the attention.
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*
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* @param p_hwfn
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* @param p_aeu - descriptor of an AEU bit which caused the attention
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* @param aeu_en_reg - register offset of the AEU enable reg. which configured
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* this bit to this group.
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* @param bit_index - index of this bit in the aeu_en_reg
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* @p_hwfn: HW device data.
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* @p_aeu: Descriptor of an AEU bit which caused the attention.
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* @aeu_en_reg: Register offset of the AEU enable reg. which configured
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* this bit to this group.
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* @p_bit_name: AEU bit description for logging purposes.
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* @bitmask: Index of this bit in the aeu_en_reg.
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*
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* @return int
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* Return: Zero on success, negative errno otherwise.
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*/
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static int
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qed_int_deassertion_aeu_bit(struct qed_hwfn *p_hwfn,
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@ -938,12 +940,12 @@ out:
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}
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/**
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* @brief qed_int_deassertion_parity - handle a single parity AEU source
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* qed_int_deassertion_parity() - Handle a single parity AEU source.
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*
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* @param p_hwfn
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* @param p_aeu - descriptor of an AEU bit which caused the parity
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* @param aeu_en_reg - address of the AEU enable register
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* @param bit_index
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* @p_hwfn: HW device data.
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* @p_aeu: Descriptor of an AEU bit which caused the parity.
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* @aeu_en_reg: Address of the AEU enable register.
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* @bit_index: Index (0-31) of an AEU bit.
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*/
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static void qed_int_deassertion_parity(struct qed_hwfn *p_hwfn,
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struct aeu_invert_reg_bit *p_aeu,
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@ -976,12 +978,13 @@ static void qed_int_deassertion_parity(struct qed_hwfn *p_hwfn,
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}
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/**
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* @brief - handles deassertion of previously asserted attentions.
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* qed_int_deassertion() - Handle deassertion of previously asserted
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* attentions.
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*
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* @param p_hwfn
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* @param deasserted_bits - newly deasserted bits
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* @return int
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* @p_hwfn: HW device data.
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* @deasserted_bits: newly deasserted bits.
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*
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* Return: Zero value.
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*/
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static int qed_int_deassertion(struct qed_hwfn *p_hwfn,
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u16 deasserted_bits)
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@ -2241,9 +2244,9 @@ int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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}
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/**
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* @brief Initialize igu runtime registers
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* qed_int_igu_init_rt() - Initialize IGU runtime registers.
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*
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* @param p_hwfn
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* @p_hwfn: HW device data.
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*/
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void qed_int_igu_init_rt(struct qed_hwfn *p_hwfn)
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{
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@ -642,18 +642,18 @@ void qed_spq_return_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry *p_ent)
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}
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/**
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* @brief qed_spq_add_entry - adds a new entry to the pending
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* list. Should be used while lock is being held.
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* qed_spq_add_entry() - Add a new entry to the pending list.
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* Should be used while lock is being held.
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*
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* Addes an entry to the pending list is there is room (en empty
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* @p_hwfn: HW device data.
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* @p_ent: An entry to add.
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* @priority: Desired priority.
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*
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* Adds an entry to the pending list is there is room (an empty
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* element is available in the free_pool), or else places the
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* entry in the unlimited_pending pool.
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*
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* @param p_hwfn
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* @param p_ent
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* @param priority
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*
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* @return int
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* Return: zero on success, -EINVAL on invalid @priority.
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*/
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static int qed_spq_add_entry(struct qed_hwfn *p_hwfn,
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struct qed_spq_entry *p_ent,
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@ -823,16 +823,17 @@ static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
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}
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/**
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* @brief qed_iov_config_perm_table - configure the permission
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* zone table.
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* In E4, queue zone permission table size is 320x9. There
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* are 320 VF queues for single engine device (256 for dual
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* engine device), and each entry has the following format:
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* {Valid, VF[7:0]}
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* @param p_hwfn
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* @param p_ptt
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* @param vf
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* @param enable
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* qed_iov_config_perm_table() - Configure the permission zone table.
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*
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* @p_hwfn: HW device data.
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* @p_ptt: PTT window for writing the registers.
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* @vf: VF info data.
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* @enable: The actual permision for this VF.
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*
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* In E4, queue zone permission table size is 320x9. There
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* are 320 VF queues for single engine device (256 for dual
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* engine device), and each entry has the following format:
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* {Valid, VF[7:0]}
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*/
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static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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