sound fixes for 3.15-rc4

A few collections of small eggs that have been gathered during
 the Easter holidays.  Mostly small ASoC fixes, with a HD-audio
 quirk and a workaround for Nvidia controller.
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Merge tag 'sound-3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "A few collections of small eggs that have been gathered during the
  Easter holidays.  Mostly small ASoC fixes, with a HD-audio quirk and a
  workaround for Nvidia controller"

* tag 'sound-3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: hda - Suppress CORBRP clear on Nvidia controller chips
  ALSA: hda - add headset mic detect quirk for a Dell laptop
  ASoC: jz4740: Remove Makefile entry for removed file
  ASoC: Intel: Fix audio crash due to negative address offset
  ASoC: dapm: Fix widget double free with auto-disable DAPM kcontrol
  ASoC: Intel: Fix incorrect sizeof() in sst_hsw_stream_get_volume()
  ASoC: Intel: some incorrect sizeof() usages
  ASoC: cs42l73: Convert to use devm_gpio_request_one
  ASoC: cs42l52: Convert to use devm_gpio_request_one
  ASoC: tlv320aic31xx: document that the regulators are mandatory
  ASoC: fsl_spdif: Fix wrong OFFSET of STC_SYSCLK_DIV
  ASoC: alc5623: Fix regmap endianness
  ASoC: tlv320aic3x: fix shared reset pin for DT
  ASoC: rsnd: fix clock prepare/unprepare
This commit is contained in:
Linus Torvalds 2014-04-30 08:15:59 -07:00
commit 71dc96e39d
16 changed files with 52 additions and 40 deletions

View File

@ -13,6 +13,9 @@ Required properties:
"ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP) "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
- reg - <int> - I2C slave address - reg - <int> - I2C slave address
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
Optional properties: Optional properties:
@ -24,9 +27,6 @@ Optional properties:
3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD 3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
If this node is not mentioned or if the value is unknown, then If this node is not mentioned or if the value is unknown, then
micbias is set to 2.0V. micbias is set to 2.0V.
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
CODEC output pins: CODEC output pins:
* HPL * HPL

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@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip)
/* reset the corb hw read pointer */ /* reset the corb hw read pointer */
azx_writew(chip, CORBRP, ICH6_CORBRP_RST); azx_writew(chip, CORBRP, ICH6_CORBRP_RST);
for (timeout = 1000; timeout > 0; timeout--) { if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) {
if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) for (timeout = 1000; timeout > 0; timeout--) {
break; if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
udelay(1); break;
} udelay(1);
if (timeout <= 0) }
dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", if (timeout <= 0)
azx_readw(chip, CORBRP)); dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
azx_readw(chip, CORBRP));
azx_writew(chip, CORBRP, 0); azx_writew(chip, CORBRP, 0);
for (timeout = 1000; timeout > 0; timeout--) { for (timeout = 1000; timeout > 0; timeout--) {
if (azx_readw(chip, CORBRP) == 0) if (azx_readw(chip, CORBRP) == 0)
break; break;
udelay(1); udelay(1);
}
if (timeout <= 0)
dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
azx_readw(chip, CORBRP));
} }
if (timeout <= 0)
dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
azx_readw(chip, CORBRP));
/* enable corb dma */ /* enable corb dma */
azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);

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@ -249,7 +249,8 @@ enum {
/* quirks for Nvidia */ /* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \ #define AZX_DCAPS_PRESET_NVIDIA \
(AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
AZX_DCAPS_CORBRP_SELF_CLEAR)
#define AZX_DCAPS_PRESET_CTHDA \ #define AZX_DCAPS_PRESET_CTHDA \
(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)

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@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
/* position fix mode */ /* position fix mode */
enum { enum {

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@ -4621,6 +4621,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x0674, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x067f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x067f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),

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@ -1018,13 +1018,13 @@ static int alc5623_i2c_probe(struct i2c_client *client,
dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret); dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret);
return ret; return ret;
} }
vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8);
ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2); ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2);
if (ret < 0) { if (ret < 0) {
dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret); dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret);
return ret; return ret;
} }
vid2 >>= 8;
if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) { if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) {
dev_err(&client->dev, "unknown or wrong codec\n"); dev_err(&client->dev, "unknown or wrong codec\n");

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@ -1229,8 +1229,10 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
} }
if (cs42l52->pdata.reset_gpio) { if (cs42l52->pdata.reset_gpio) {
ret = gpio_request_one(cs42l52->pdata.reset_gpio, ret = devm_gpio_request_one(&i2c_client->dev,
GPIOF_OUT_INIT_HIGH, "CS42L52 /RST"); cs42l52->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH,
"CS42L52 /RST");
if (ret < 0) { if (ret < 0) {
dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
cs42l52->pdata.reset_gpio, ret); cs42l52->pdata.reset_gpio, ret);

View File

@ -1443,8 +1443,10 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
i2c_set_clientdata(i2c_client, cs42l73); i2c_set_clientdata(i2c_client, cs42l73);
if (cs42l73->pdata.reset_gpio) { if (cs42l73->pdata.reset_gpio) {
ret = gpio_request_one(cs42l73->pdata.reset_gpio, ret = devm_gpio_request_one(&i2c_client->dev,
GPIOF_OUT_INIT_HIGH, "CS42L73 /RST"); cs42l73->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH,
"CS42L73 /RST");
if (ret < 0) { if (ret < 0) {
dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
cs42l73->pdata.reset_gpio, ret); cs42l73->pdata.reset_gpio, ret);

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@ -1399,7 +1399,6 @@ static int aic3x_probe(struct snd_soc_codec *codec)
} }
aic3x_add_widgets(codec); aic3x_add_widgets(codec);
list_add(&aic3x->list, &reset_list);
return 0; return 0;
@ -1569,7 +1568,13 @@ static int aic3x_i2c_probe(struct i2c_client *i2c,
ret = snd_soc_register_codec(&i2c->dev, ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_aic3x, &aic3x_dai, 1); &soc_codec_dev_aic3x, &aic3x_dai, 1);
return ret;
if (ret != 0)
goto err_gpio;
list_add(&aic3x->list, &reset_list);
return 0;
err_gpio: err_gpio:
if (gpio_is_valid(aic3x->gpio_reset) && if (gpio_is_valid(aic3x->gpio_reset) &&

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@ -144,8 +144,8 @@ enum spdif_gainsel {
/* SPDIF Clock register */ /* SPDIF Clock register */
#define STC_SYSCLK_DIV_OFFSET 11 #define STC_SYSCLK_DIV_OFFSET 11
#define STC_SYSCLK_DIV_MASK (0x1ff << STC_TXCLK_SRC_OFFSET) #define STC_SYSCLK_DIV_MASK (0x1ff << STC_SYSCLK_DIV_OFFSET)
#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK) #define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
#define STC_TXCLK_SRC_OFFSET 8 #define STC_TXCLK_SRC_OFFSET 8
#define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET) #define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET)
#define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK) #define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)

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@ -136,7 +136,7 @@ struct sst_module_data {
enum sst_data_type data_type; /* type of module data */ enum sst_data_type data_type; /* type of module data */
u32 size; /* size in bytes */ u32 size; /* size in bytes */
u32 offset; /* offset in FW file */ int32_t offset; /* offset in FW file */
u32 data_offset; /* offset in ADSP memory space */ u32 data_offset; /* offset in ADSP memory space */
void *data; /* module data */ void *data; /* module data */
}; };

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@ -617,7 +617,7 @@ static void hsw_notification_work(struct work_struct *work)
case IPC_POSITION_CHANGED: case IPC_POSITION_CHANGED:
trace_ipc_notification("DSP stream position changed for", trace_ipc_notification("DSP stream position changed for",
stream->reply.stream_hw_id); stream->reply.stream_hw_id);
sst_dsp_inbox_read(hsw->dsp, pos, sizeof(pos)); sst_dsp_inbox_read(hsw->dsp, pos, sizeof(*pos));
if (stream->notify_position) if (stream->notify_position)
stream->notify_position(stream, stream->pdata); stream->notify_position(stream, stream->pdata);
@ -991,7 +991,8 @@ int sst_hsw_stream_get_volume(struct sst_hsw *hsw, struct sst_hsw_stream *stream
return -EINVAL; return -EINVAL;
sst_dsp_read(hsw->dsp, volume, sst_dsp_read(hsw->dsp, volume,
stream->reply.volume_register_address[channel], sizeof(volume)); stream->reply.volume_register_address[channel],
sizeof(*volume));
return 0; return 0;
} }
@ -1609,7 +1610,7 @@ int sst_hsw_dx_set_state(struct sst_hsw *hsw,
trace_ipc_request("PM enter Dx state", state); trace_ipc_request("PM enter Dx state", state);
ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_), ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_),
dx, sizeof(dx)); dx, sizeof(*dx));
if (ret < 0) { if (ret < 0) {
dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state); dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state);
return ret; return ret;

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@ -1,10 +1,8 @@
# #
# Jz4740 Platform Support # Jz4740 Platform Support
# #
snd-soc-jz4740-objs := jz4740-pcm.o
snd-soc-jz4740-i2s-objs := jz4740-i2s.o snd-soc-jz4740-i2s-objs := jz4740-i2s.o
obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o
obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o
# Jz4740 Machine Support # Jz4740 Machine Support

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@ -258,7 +258,7 @@ static int rsnd_src_init(struct rsnd_mod *mod,
{ {
struct rsnd_src *src = rsnd_mod_to_src(mod); struct rsnd_src *src = rsnd_mod_to_src(mod);
clk_enable(src->clk); clk_prepare_enable(src->clk);
return 0; return 0;
} }
@ -269,7 +269,7 @@ static int rsnd_src_quit(struct rsnd_mod *mod,
{ {
struct rsnd_src *src = rsnd_mod_to_src(mod); struct rsnd_src *src = rsnd_mod_to_src(mod);
clk_disable(src->clk); clk_disable_unprepare(src->clk);
return 0; return 0;
} }

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@ -171,7 +171,7 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
u32 cr; u32 cr;
if (0 == ssi->usrcnt) { if (0 == ssi->usrcnt) {
clk_enable(ssi->clk); clk_prepare_enable(ssi->clk);
if (rsnd_dai_is_clk_master(rdai)) { if (rsnd_dai_is_clk_master(rdai)) {
if (rsnd_ssi_clk_from_parent(ssi)) if (rsnd_ssi_clk_from_parent(ssi))
@ -230,7 +230,7 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
rsnd_ssi_master_clk_stop(ssi); rsnd_ssi_master_clk_stop(ssi);
} }
clk_disable(ssi->clk); clk_disable_unprepare(ssi->clk);
} }
dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod)); dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));

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@ -254,7 +254,6 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
static void dapm_kcontrol_free(struct snd_kcontrol *kctl) static void dapm_kcontrol_free(struct snd_kcontrol *kctl)
{ {
struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl); struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl);
kfree(data->widget);
kfree(data->wlist); kfree(data->wlist);
kfree(data); kfree(data);
} }