drm/radeon/dpm: save some display parameters for DPM
Required for SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2267,6 +2267,10 @@ static void evergreen_program_watermarks(struct radeon_device *rdev,
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WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);
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WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);
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/* save values for DPM */
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radeon_crtc->line_time = line_time;
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radeon_crtc->wm_high = latency_watermark_a;
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radeon_crtc->wm_low = latency_watermark_b;
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}
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/**
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@ -331,6 +331,10 @@ struct radeon_crtc {
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u32 pll_flags;
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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/* for dpm */
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u32 line_time;
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u32 wm_low;
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u32 wm_high;
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};
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struct radeon_encoder_primary_dac {
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@ -2166,6 +2166,10 @@ static void dce6_program_watermarks(struct radeon_device *rdev,
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WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);
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WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);
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/* save values for DPM */
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radeon_crtc->line_time = line_time;
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radeon_crtc->wm_high = latency_watermark_a;
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radeon_crtc->wm_low = latency_watermark_b;
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}
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void dce6_bandwidth_update(struct radeon_device *rdev)
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