i2c: mlxcpld: Allow flexible polling time setting for I2C transactions
Allow polling time setting according to I2C frequency supported across the system. For base frequency 400 KHz and 1 MHz set polling time is set four times less than for system with base frequency 100KHz. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -73,6 +73,7 @@ struct mlxcpld_i2c_priv {
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struct mlxcpld_i2c_curr_xfer xfer;
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struct device *dev;
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bool smbus_block;
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int polling_time;
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};
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static void mlxcpld_i2c_lpc_write_buf(u8 *data, u8 len, u32 addr)
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@ -267,8 +268,8 @@ static int mlxcpld_i2c_wait_for_free(struct mlxcpld_i2c_priv *priv)
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do {
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if (!mlxcpld_i2c_check_busy(priv))
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break;
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usleep_range(MLXCPLD_I2C_POLL_TIME / 2, MLXCPLD_I2C_POLL_TIME);
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timeout += MLXCPLD_I2C_POLL_TIME;
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usleep_range(priv->polling_time / 2, priv->polling_time);
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timeout += priv->polling_time;
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} while (timeout <= MLXCPLD_I2C_XFER_TO);
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if (timeout > MLXCPLD_I2C_XFER_TO)
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@ -288,10 +289,10 @@ static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv *priv)
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u8 datalen, val;
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do {
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usleep_range(MLXCPLD_I2C_POLL_TIME / 2, MLXCPLD_I2C_POLL_TIME);
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usleep_range(priv->polling_time / 2, priv->polling_time);
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if (!mlxcpld_i2c_check_status(priv, &status))
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break;
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timeout += MLXCPLD_I2C_POLL_TIME;
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timeout += priv->polling_time;
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} while (status == 0 && timeout < MLXCPLD_I2C_XFER_TO);
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switch (status) {
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@ -498,9 +499,11 @@ mlxcpld_i2c_set_frequency(struct mlxcpld_i2c_priv *priv,
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switch ((regval & data->mask) >> data->bit) {
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case MLXCPLD_I2C_FREQ_1000KHZ:
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freq = MLXCPLD_I2C_FREQ_1000KHZ_SET;
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priv->polling_time /= 4;
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break;
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case MLXCPLD_I2C_FREQ_400KHZ:
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freq = MLXCPLD_I2C_FREQ_400KHZ_SET;
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priv->polling_time /= 4;
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break;
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default:
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return 0;
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@ -527,6 +530,7 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev)
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priv->dev = &pdev->dev;
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priv->base_addr = MLXPLAT_CPLD_LPC_I2C_BASE_ADDR;
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priv->polling_time = MLXCPLD_I2C_POLL_TIME;
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/* Set I2C bus frequency if platform data provides this info. */
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pdata = dev_get_platdata(&pdev->dev);
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