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A Single RISC-V Fix for 5.19-rc4 

* A fix to the T-Head memory type errata workaround that avoids behavior
   that is unsupported in the LLVM assembler.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEAM520YNJYN/OiG3470yhUCzLq0EFAmK13k8THHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRDvTKFQLMurQU3jD/4xAGPcF9cA6NA62BqAP+/eHa9eXdWe
 WQsYDI2r+hrchmauP/LRz96kjDfFUGrCCLbqfKvwdTGErvDxOROHwreu9o8l784H
 y8zLA1zKFPMeAz3XLc/uOFogZppX96xGg1orTSFHiDzz5kvnLgPaYyPaWu9hY5F+
 R3snh0h5cZ4U6Hn84q7olF62KOqxMGawOwWcosYLZ2N/aN9igKr9B14FgSq94Rz/
 XNf7B5pe3yvueew4ShX4z+wW6owIEaLaPSw2wVEju5Y58/n8pJUeOIMuHdJJG14M
 PIHn4Orx21ZCoWHgIlD1w/KmsnIgf5NEp5rBvw3GXLvGMK4kqqh3qwu1Fd2rL+4o
 lvNlag1K9NTm/jNVYE89+ua2/zeV6ZzNy4j3IC6SXSBEg0Ms6PaAlFdkZOYyivyG
 CWAFZf9XOxkhjyrj+5TMcpgcHypqXPA2COipylWxyAI/dBjhHlMfb92dyUmEjj7g
 H+3tUWTUOivS1oFpHzS6//iUENFMBvLuG4tXgdm1uGFYjxPtR2KAz9WjftOB9VGM
 kbRo4PnxsA5ykr7ELYV3OaLowqkFAGU9l7HTreS4Az8obp+Yh/JgKxG+yAaA74u2
 pcK5aFloRuCfCicRFP00++ypNOjWQwOzdlBMvkyDEt95fUkaT+MEA3sgHgSiT3MG
 9CRfixTwnHWfwg==
 =QEm2
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fix from Palmer Dabbelt:

 - fix the T-Head memory type errata workaround to avoid behavior
   that is unsupported in the LLVM assembler

* tag 'riscv-for-linus-5.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Fix ALT_THEAD_PMA's asm parameters
This commit is contained in:
Linus Torvalds 2022-06-24 12:34:13 -07:00
parent f6e9d01468 e830315641
commit 70d605cbee
1 changed files with 7 additions and 7 deletions
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14
arch/riscv/include/asm/errata_list.h
View File

@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
"nop\n\t" \
"nop\n\t" \
"nop", \
"li t3, %2\n\t" \
"slli t3, t3, %4\n\t" \
"li t3, %1\n\t" \
"slli t3, t3, %3\n\t" \
"and t3, %0, t3\n\t" \
"bne t3, zero, 2f\n\t" \
"li t3, %3\n\t" \
"slli t3, t3, %4\n\t" \
"li t3, %2\n\t" \
"slli t3, t3, %3\n\t" \
"or %0, %0, t3\n\t" \
"2:", THEAD_VENDOR_ID, \
ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
: "+r"(_val) \
: "0"(_val), \
"I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
: "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
"I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
"I"(ALT_THEAD_PBMT_SHIFT))
"I"(ALT_THEAD_PBMT_SHIFT) \
: "t3")
#else
#define ALT_THEAD_PMA(_val)
#endif