[ARM] 5573/1: ep93xx: ensure typesafe io
ARM: ep93xx: ensure typesafe io
For the ep93xx platform, all EP93XX_*_BASE defines are based
on virtual addresses. Ensure that all these defines are
properly typesafe for the __raw_{read/write}* macros.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Hartley Sweeten
Russell King
parent
28d0325ce6
commit
702b59e623
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@ -52,40 +52,43 @@
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#define EP93XX_AHB_VIRT_BASE 0xfef00000
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#define EP93XX_AHB_SIZE 0x00100000
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#define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x))
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#define EP93XX_APB_PHYS_BASE 0x80800000
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#define EP93XX_APB_VIRT_BASE 0xfed00000
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#define EP93XX_APB_SIZE 0x00200000
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#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
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/* AHB peripherals */
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#define EP93XX_DMA_BASE ((void __iomem *) \
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(EP93XX_AHB_VIRT_BASE + 0x00000000))
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#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
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#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
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#define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000)
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#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
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#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
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#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
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#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
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#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000)
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#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
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#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000)
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#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
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#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000)
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#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000)
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#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000)
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#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000)
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#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000)
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#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000)
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#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000)
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#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000)
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#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000)
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#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000)
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#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000)
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#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000)
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/* APB peripherals */
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#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000)
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#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
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#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
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#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
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#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
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@ -102,11 +105,11 @@
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#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
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#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
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#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
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#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
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#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
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#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
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#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
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#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
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#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
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#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c)
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#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50)
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@ -124,32 +127,32 @@
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#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8)
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#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
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#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
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#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
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#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000)
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#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
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#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000)
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#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
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#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000)
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#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
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#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
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#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000)
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#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
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#define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000)
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#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000)
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#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
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#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
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#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000)
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#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
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#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
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#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
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#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
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#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
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#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000)
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#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
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#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000)
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#define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000)
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#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
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#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000)
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#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
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#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
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#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
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#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
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@ -179,7 +182,7 @@
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#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18)
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#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
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#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
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#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
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#endif
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@ -1,8 +1,21 @@
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/*
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* arch/arm/mach-ep93xx/include/mach/io.h
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*/
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#ifndef __ASM_MACH_IO_H
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#define __ASM_MACH_IO_H
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(p) __typesafe_io(p)
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#define __mem_pci(p) (p)
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#define __io(p) __typesafe_io(p)
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#define __mem_pci(p) (p)
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/*
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* A typesafe __io() variation for variable initialisers
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*/
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#ifdef __ASSEMBLER__
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#define IOMEM(p) p
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#else
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#define IOMEM(p) ((void __iomem __force *)(p))
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#endif
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#endif /* __ASM_MACH_IO_H */
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