net: dsa: mv88e6xxx: 88e6390 10G serdes support
Add support for reading and reporting the 10G link status on the 88e6390 in addition to the 1000BASE-X/2500BASE-X/SGMII status. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -748,8 +748,8 @@ int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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MV88E6390_SGMII_BMCR, bmcr);
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}
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int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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u8 lane, struct phylink_link_state *state)
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static int mv88e6390_serdes_pcs_get_state_sgmii(struct mv88e6xxx_chip *chip,
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int port, u8 lane, struct phylink_link_state *state)
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{
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u16 lpa, status;
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int err;
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@ -771,6 +771,45 @@ int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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return mv88e6xxx_serdes_pcs_get_state(chip, status, lpa, state);
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}
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static int mv88e6390_serdes_pcs_get_state_10g(struct mv88e6xxx_chip *chip,
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int port, u8 lane, struct phylink_link_state *state)
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{
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u16 status;
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int err;
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err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_10G_STAT1, &status);
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if (err)
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return err;
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state->link = !!(status & MDIO_STAT1_LSTATUS);
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if (state->link) {
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state->speed = SPEED_10000;
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state->duplex = DUPLEX_FULL;
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}
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return 0;
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}
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int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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u8 lane, struct phylink_link_state *state)
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{
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switch (state->interface) {
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane,
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state);
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case PHY_INTERFACE_MODE_XAUI:
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case PHY_INTERFACE_MODE_RXAUI:
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return mv88e6390_serdes_pcs_get_state_10g(chip, port, lane,
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state);
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default:
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return -EOPNOTSUPP;
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}
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}
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int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
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u8 lane)
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{
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@ -41,6 +41,7 @@
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/* 10GBASE-R and 10GBASE-X4/X2 */
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#define MV88E6390_10G_CTRL1 (0x1000 + MDIO_CTRL1)
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#define MV88E6390_10G_STAT1 (0x1000 + MDIO_STAT1)
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/* 1000BASE-X and SGMII */
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#define MV88E6390_SGMII_BMCR (0x2000 + MII_BMCR)
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