PCI: artpec6: Configure FTS with dwc helper function
Use DesignWare helper functions to configure Fast Training Sequence. Drop the respective code in the driver. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
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@ -51,9 +51,6 @@ static const struct of_device_id artpec6_pcie_of_match[];
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#define ACK_N_FTS_MASK GENMASK(15, 8)
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#define ACK_N_FTS_MASK GENMASK(15, 8)
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#define ACK_N_FTS(x) (((x) << 8) & ACK_N_FTS_MASK)
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#define ACK_N_FTS(x) (((x) << 8) & ACK_N_FTS_MASK)
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#define FAST_TRAINING_SEQ_MASK GENMASK(7, 0)
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#define FAST_TRAINING_SEQ(x) (((x) << 0) & FAST_TRAINING_SEQ_MASK)
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/* ARTPEC-6 specific registers */
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/* ARTPEC-6 specific registers */
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#define PCIECFG 0x18
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#define PCIECFG 0x18
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#define PCIECFG_DBG_OEN BIT(24)
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#define PCIECFG_DBG_OEN BIT(24)
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@ -313,10 +310,7 @@ static void artpec6_pcie_set_nfts(struct artpec6_pcie *artpec6_pcie)
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* Set the Number of Fast Training Sequences that the core
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* Set the Number of Fast Training Sequences that the core
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* advertises as its N_FTS during Gen2 or Gen3 link training.
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* advertises as its N_FTS during Gen2 or Gen3 link training.
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*/
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*/
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val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
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dw_pcie_link_set_n_fts(pci, 180);
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val &= ~FAST_TRAINING_SEQ_MASK;
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val |= FAST_TRAINING_SEQ(180);
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dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
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}
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}
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static void artpec6_pcie_assert_core_reset(struct artpec6_pcie *artpec6_pcie)
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static void artpec6_pcie_assert_core_reset(struct artpec6_pcie *artpec6_pcie)
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