net: pch_gbe: use readx_poll_timeout_atomic() variant
Use readx_poll_timeout_atomic() instead of open coded variants. While at it, add __iomem attribute to the parameter of pch_gbe_wait_clr_bit(). This in particular will fix a lot of warnings detected by Sparse, e.g. .../pch_gbe_main.c:308:26: warning: incorrect type in argument 1 (different address spaces) .../pch_gbe_main.c:308:26: expected void const [noderef] __iomem * .../pch_gbe_main.c:308:26: got void *reg Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Flavio Suligoi <f.suligoi@asem.it> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -11,6 +11,7 @@
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/machine.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/net_tstamp.h>
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#include <linux/ptp_classify.h>
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@ -299,15 +300,12 @@ static s32 pch_gbe_mac_read_mac_addr(struct pch_gbe_hw *hw)
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* @reg: Pointer of register
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* @bit: Busy bit
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*/
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static void pch_gbe_wait_clr_bit(void *reg, u32 bit)
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static void pch_gbe_wait_clr_bit(void __iomem *reg, u32 bit)
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{
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u32 tmp;
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/* wait busy */
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tmp = 1000;
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while ((ioread32(reg) & bit) && --tmp)
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cpu_relax();
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if (!tmp)
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if (readx_poll_timeout_atomic(ioread32, reg, tmp, !(tmp & bit), 0, 10))
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pr_err("Error: busy bit is not cleared\n");
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}
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@ -491,18 +489,13 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg,
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u16 data)
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{
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struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
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u32 data_out = 0;
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unsigned int i;
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unsigned long flags;
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u32 data_out;
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spin_lock_irqsave(&hw->miim_lock, flags);
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for (i = 100; i; --i) {
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if ((ioread32(&hw->reg->MIIM) & PCH_GBE_MIIM_OPER_READY))
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break;
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udelay(20);
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}
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if (i == 0) {
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if (readx_poll_timeout_atomic(ioread32, &hw->reg->MIIM, data_out,
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data_out & PCH_GBE_MIIM_OPER_READY, 20, 2000)) {
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netdev_err(adapter->netdev, "pch-gbe.miim won't go Ready\n");
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spin_unlock_irqrestore(&hw->miim_lock, flags);
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return 0; /* No way to indicate timeout error */
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@ -510,12 +503,8 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg,
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iowrite32(((reg << PCH_GBE_MIIM_REG_ADDR_SHIFT) |
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(addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) |
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dir | data), &hw->reg->MIIM);
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for (i = 0; i < 100; i++) {
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udelay(20);
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data_out = ioread32(&hw->reg->MIIM);
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if ((data_out & PCH_GBE_MIIM_OPER_READY))
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break;
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}
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readx_poll_timeout_atomic(ioread32, &hw->reg->MIIM, data_out,
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data_out & PCH_GBE_MIIM_OPER_READY, 20, 2000);
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spin_unlock_irqrestore(&hw->miim_lock, flags);
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netdev_dbg(adapter->netdev, "PHY %s: reg=%d, data=0x%04X\n",
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