scsi: mpt3sas: clarify mmio pointer types
The newly added code mixes up phys_addr_t/resource_size_t with dma_addr_t
and void pointers, as seen from these compiler warning:
drivers/scsi/mpt3sas/mpt3sas_base.c: In function '_base_get_chain_phys':
drivers/scsi/mpt3sas/mpt3sas_base.c:235:21: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
base_chain_phys = (void *)ioc->chip_phys + MPI_FRAME_START_OFFSET +
^
drivers/scsi/mpt3sas/mpt3sas_base.c: In function '_clone_sg_entries':
drivers/scsi/mpt3sas/mpt3sas_base.c:427:20: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
sgel->Address = (dma_addr_t)dst_addr_phys;
^
drivers/scsi/mpt3sas/mpt3sas_base.c:438:7: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
(dma_addr_t)buff_ptr_phys;
^
drivers/scsi/mpt3sas/mpt3sas_base.c:444:10: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
(dma_addr_t)buff_ptr_phys;
Both dma_addr_t and phys_addr_t may be wider than a pointer, so we must
avoid the conversion to pointer types. This also helps readability.
A second problem is treating MMIO addresses from a 'struct resource'
as addresses that can be used for DMA on that device. In almost all
cases, those are the same, but on some of the more obscure architectures,
PCI memory address 0 is mapped into the CPU address space at a nonzero
offset. I don't have a good fix for that, so I'm adding a comment here,
plus a WARN_ON() that triggers whenever the phys_addr_t number is
outside of the low 32-bit address space and causes a straight overflow
when assigned to the 32-bit sgel->Address.
Fixes: 182ac784b4
("scsi: mpt3sas: Introduce Base function for cloning.")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sreekanth Reddy <Sreekanth.Reddy@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
18d595bf9d
commit
6f9e09fd64
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@ -225,14 +225,14 @@ _base_get_chain(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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*
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* @Return - Physical chain address.
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*/
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static inline void *
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static inline phys_addr_t
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_base_get_chain_phys(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u8 sge_chain_count)
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{
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void *base_chain_phys, *chain_phys;
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phys_addr_t base_chain_phys, chain_phys;
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u16 cmd_credit = ioc->facts.RequestCredit + 1;
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base_chain_phys = (void *)ioc->chip_phys + MPI_FRAME_START_OFFSET +
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base_chain_phys = ioc->chip_phys + MPI_FRAME_START_OFFSET +
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(cmd_credit * ioc->request_sz) +
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REPLY_FREE_POOL_SIZE;
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chain_phys = base_chain_phys + (smid * ioc->facts.MaxChainDepth *
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@ -272,11 +272,11 @@ _base_get_buffer_bar0(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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*
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* @Returns - Pointer to buffer location in BAR0.
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*/
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static void *
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static phys_addr_t
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_base_get_buffer_phys_bar0(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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{
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u16 cmd_credit = ioc->facts.RequestCredit + 1;
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void *chain_end_phys = _base_get_chain_phys(ioc,
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phys_addr_t chain_end_phys = _base_get_chain_phys(ioc,
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cmd_credit + 1,
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ioc->facts.MaxChainDepth);
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return chain_end_phys + (smid * 64 * 1024);
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@ -330,11 +330,12 @@ static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc,
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bool is_write = 0;
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u16 i = 0;
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void __iomem *buffer_iomem;
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void *buffer_iomem_phys;
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phys_addr_t buffer_iomem_phys;
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void __iomem *buff_ptr;
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void *buff_ptr_phys;
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phys_addr_t buff_ptr_phys;
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void __iomem *dst_chain_addr[MCPU_MAX_CHAINS_PER_IO];
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void *src_chain_addr[MCPU_MAX_CHAINS_PER_IO], *dst_addr_phys;
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void *src_chain_addr[MCPU_MAX_CHAINS_PER_IO];
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phys_addr_t dst_addr_phys;
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MPI2RequestHeader_t *request_hdr;
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struct scsi_cmnd *scmd;
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struct scatterlist *sg_scmd = NULL;
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@ -391,6 +392,7 @@ static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc,
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buff_ptr = buffer_iomem;
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buff_ptr_phys = buffer_iomem_phys;
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WARN_ON(buff_ptr_phys > U32_MAX);
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if (sgel->FlagsLength &
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(MPI2_SGE_FLAGS_HOST_TO_IOC << MPI2_SGE_FLAGS_SHIFT))
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@ -421,10 +423,10 @@ static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc,
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smid, sge_chain_count);
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src_chain_addr[sge_chain_count] =
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(void *) sgel_next;
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dst_addr_phys =
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_base_get_chain_phys(ioc,
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dst_addr_phys = _base_get_chain_phys(ioc,
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smid, sge_chain_count);
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sgel->Address = (dma_addr_t)dst_addr_phys;
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WARN_ON(dst_addr_phys > U32_MAX);
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sgel->Address = (u32)dst_addr_phys;
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sgel = sgel_next;
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sge_chain_count++;
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break;
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@ -434,14 +436,16 @@ static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc,
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_base_clone_to_sys_mem(buff_ptr,
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sg_virt(sg_scmd),
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(sgel->FlagsLength & 0x00ffffff));
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sgel->Address =
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(dma_addr_t)buff_ptr_phys;
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/*
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* FIXME: this relies on a a zero
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* PCI mem_offset.
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*/
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sgel->Address = (u32)buff_ptr_phys;
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} else {
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_base_clone_to_sys_mem(buff_ptr,
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ioc->config_vaddr,
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(sgel->FlagsLength & 0x00ffffff));
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sgel->Address =
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(dma_addr_t)buff_ptr_phys;
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sgel->Address = (u32)buff_ptr_phys;
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}
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}
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buff_ptr += (sgel->FlagsLength & 0x00ffffff);
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@ -2938,7 +2942,7 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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u32 pio_sz;
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int i, r = 0;
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u64 pio_chip = 0;
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u64 chip_phys = 0;
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phys_addr_t chip_phys = 0;
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struct adapter_reply_queue *reply_q;
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dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
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@ -2986,7 +2990,7 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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if (memap_sz)
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continue;
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ioc->chip_phys = pci_resource_start(pdev, i);
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chip_phys = (u64)ioc->chip_phys;
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chip_phys = ioc->chip_phys;
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memap_sz = pci_resource_len(pdev, i);
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ioc->chip = ioremap(ioc->chip_phys, memap_sz);
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}
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@ -3061,8 +3065,8 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
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"IO-APIC enabled"),
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pci_irq_vector(ioc->pdev, reply_q->msix_index));
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pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
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ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
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pr_info(MPT3SAS_FMT "iomem(%pap), mapped(0x%p), size(%d)\n",
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ioc->name, &chip_phys, ioc->chip, memap_sz);
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pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
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ioc->name, (unsigned long long)pio_chip, pio_sz);
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@ -1103,7 +1103,7 @@ struct MPT3SAS_ADAPTER {
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char tmp_string[MPT_STRING_LENGTH];
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struct pci_dev *pdev;
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Mpi2SystemInterfaceRegs_t __iomem *chip;
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resource_size_t chip_phys;
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phys_addr_t chip_phys;
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int logging_level;
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int fwfault_debug;
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u8 ir_firmware;
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