Merge branch 'add-ast2400-2500-phy-handle-support'

Ivan Mikhaylov says:

====================
add ast2400/2500 phy-handle support

This patch introduces ast2400/2500 phy-handle support with an embedded
MDIO controller. At the current moment it is not possible to set options
with this format on ast2400/2500:

mac {
	phy-handle = <&phy>;
	phy-mode = "rgmii";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@0 {
			compatible = "ethernet-phy-idxxxx.yyyy";
			reg = <0>;
		};
	};
};

The patch fixes it and gets possible PHYs and register them with
of_mdiobus_register.

Changes from v3:
   1. add dt-bindings description of MDIO node and phy-handle option
      with example.

Changes from v2:
   1. change manual phy interface type check on phy_interface_mode_is_rgmii
      function.
   2. add err_phy_connect label.
   3. split ftgmac100_destroy_mdio into ftgmac100_phy_disconnect and
      ftgmac100_destroy_mdio.
   4. remove unneeded mdio_np checks.

Changes from v1:
   1. split one patch into two.
====================

Link: https://lore.kernel.org/r/20201030133707.12099-1-i.mikhaylov@yadro.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2020-11-02 15:10:55 -08:00
commit 6f8ef834bd
2 changed files with 96 additions and 51 deletions

View File

@ -15,6 +15,7 @@ Required properties:
- interrupts: Should contain ethernet controller interrupt
Optional properties:
- phy-handle: See ethernet.txt file in the same directory.
- phy-mode: See ethernet.txt file in the same directory. If the property is
absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
aspeed parts. Other (unknown) parts will accept any value.
@ -32,6 +33,9 @@ Optional properties:
- "MACCLK": The MAC IP clock
- "RCLK": Clock gate for the RMII RCLK
Optional subnodes:
- mdio: See mdio.txt file in the same directory.
Example:
mac0: ethernet@1e660000 {
@ -40,3 +44,24 @@ Example:
interrupts = <2>;
use-ncsi;
};
Example with phy-handle:
mac1: ethernet@1e680000 {
compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
reg = <0x1e680000 0x180>;
interrupts = <2>;
phy-handle = <&phy>;
phy-mode = "rgmii";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};

View File

@ -1044,10 +1044,39 @@ static void ftgmac100_adjust_link(struct net_device *netdev)
schedule_work(&priv->reset_task);
}
static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
static int ftgmac100_mii_probe(struct net_device *netdev)
{
struct net_device *netdev = priv->netdev;
struct ftgmac100 *priv = netdev_priv(netdev);
struct platform_device *pdev = to_platform_device(priv->dev);
struct device_node *np = pdev->dev.of_node;
struct phy_device *phydev;
phy_interface_t phy_intf;
int err;
/* Default to RGMII. It's a gigabit part after all */
err = of_get_phy_mode(np, &phy_intf);
if (err)
phy_intf = PHY_INTERFACE_MODE_RGMII;
/* Aspeed only supports these. I don't know about other IP
* block vendors so I'm going to just let them through for
* now. Note that this is only a warning if for some obscure
* reason the DT really means to lie about it or it's a newer
* part we don't know about.
*
* On the Aspeed SoC there are additionally straps and SCU
* control bits that could tell us what the interface is
* (or allow us to configure it while the IP block is held
* in reset). For now I chose to keep this driver away from
* those SoC specific bits and assume the device-tree is
* right and the SCU has been configured properly by pinmux
* or the firmware.
*/
if (priv->is_aspeed && !(phy_interface_mode_is_rgmii(phy_intf))) {
netdev_warn(netdev,
"Unsupported PHY mode %s !\n",
phy_modes(phy_intf));
}
phydev = phy_find_first(priv->mii_bus);
if (!phydev) {
@ -1056,7 +1085,7 @@ static int ftgmac100_mii_probe(struct ftgmac100 *priv, phy_interface_t intf)
}
phydev = phy_connect(netdev, phydev_name(phydev),
&ftgmac100_adjust_link, intf);
&ftgmac100_adjust_link, phy_intf);
if (IS_ERR(phydev)) {
netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
@ -1601,8 +1630,8 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
{
struct ftgmac100 *priv = netdev_priv(netdev);
struct platform_device *pdev = to_platform_device(priv->dev);
phy_interface_t phy_intf = PHY_INTERFACE_MODE_RGMII;
struct device_node *np = pdev->dev.of_node;
struct device_node *mdio_np;
int i, err = 0;
u32 reg;
@ -1623,39 +1652,6 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
}
/* Get PHY mode from device-tree */
if (np) {
/* Default to RGMII. It's a gigabit part after all */
err = of_get_phy_mode(np, &phy_intf);
if (err)
phy_intf = PHY_INTERFACE_MODE_RGMII;
/* Aspeed only supports these. I don't know about other IP
* block vendors so I'm going to just let them through for
* now. Note that this is only a warning if for some obscure
* reason the DT really means to lie about it or it's a newer
* part we don't know about.
*
* On the Aspeed SoC there are additionally straps and SCU
* control bits that could tell us what the interface is
* (or allow us to configure it while the IP block is held
* in reset). For now I chose to keep this driver away from
* those SoC specific bits and assume the device-tree is
* right and the SCU has been configured properly by pinmux
* or the firmware.
*/
if (priv->is_aspeed &&
phy_intf != PHY_INTERFACE_MODE_RMII &&
phy_intf != PHY_INTERFACE_MODE_RGMII &&
phy_intf != PHY_INTERFACE_MODE_RGMII_ID &&
phy_intf != PHY_INTERFACE_MODE_RGMII_RXID &&
phy_intf != PHY_INTERFACE_MODE_RGMII_TXID) {
netdev_warn(netdev,
"Unsupported PHY mode %s !\n",
phy_modes(phy_intf));
}
}
priv->mii_bus->name = "ftgmac100_mdio";
snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
pdev->name, pdev->id);
@ -1667,35 +1663,38 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
for (i = 0; i < PHY_MAX_ADDR; i++)
priv->mii_bus->irq[i] = PHY_POLL;
err = mdiobus_register(priv->mii_bus);
mdio_np = of_get_child_by_name(np, "mdio");
err = of_mdiobus_register(priv->mii_bus, mdio_np);
if (err) {
dev_err(priv->dev, "Cannot register MDIO bus!\n");
goto err_register_mdiobus;
}
err = ftgmac100_mii_probe(priv, phy_intf);
if (err) {
dev_err(priv->dev, "MII Probe failed!\n");
goto err_mii_probe;
}
of_node_put(mdio_np);
return 0;
err_mii_probe:
mdiobus_unregister(priv->mii_bus);
err_register_mdiobus:
mdiobus_free(priv->mii_bus);
return err;
}
static void ftgmac100_phy_disconnect(struct net_device *netdev)
{
if (!netdev->phydev)
return;
phy_disconnect(netdev->phydev);
}
static void ftgmac100_destroy_mdio(struct net_device *netdev)
{
struct ftgmac100 *priv = netdev_priv(netdev);
if (!netdev->phydev)
if (!priv->mii_bus)
return;
phy_disconnect(netdev->phydev);
mdiobus_unregister(priv->mii_bus);
mdiobus_free(priv->mii_bus);
}
@ -1830,22 +1829,33 @@ static int ftgmac100_probe(struct platform_device *pdev)
if (np && of_get_property(np, "use-ncsi", NULL)) {
if (!IS_ENABLED(CONFIG_NET_NCSI)) {
dev_err(&pdev->dev, "NCSI stack not enabled\n");
goto err_ncsi_dev;
goto err_phy_connect;
}
dev_info(&pdev->dev, "Using NCSI interface\n");
priv->use_ncsi = true;
priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler);
if (!priv->ndev)
goto err_ncsi_dev;
goto err_phy_connect;
} else if (np && of_get_property(np, "phy-handle", NULL)) {
struct phy_device *phy;
/* Support "mdio"/"phy" child nodes for ast2400/2500 with
* an embedded MDIO controller. Automatically scan the DTS for
* available PHYs and register them.
*/
if (of_device_is_compatible(np, "aspeed,ast2400-mac") ||
of_device_is_compatible(np, "aspeed,ast2500-mac")) {
err = ftgmac100_setup_mdio(netdev);
if (err)
goto err_setup_mdio;
}
phy = of_phy_get_and_connect(priv->netdev, np,
&ftgmac100_adjust_link);
if (!phy) {
dev_err(&pdev->dev, "Failed to connect to phy\n");
goto err_setup_mdio;
goto err_phy_connect;
}
/* Indicate that we support PAUSE frames (see comment in
@ -1865,12 +1875,19 @@ static int ftgmac100_probe(struct platform_device *pdev)
err = ftgmac100_setup_mdio(netdev);
if (err)
goto err_setup_mdio;
err = ftgmac100_mii_probe(netdev);
if (err) {
dev_err(priv->dev, "MII probe failed!\n");
goto err_ncsi_dev;
}
}
if (priv->is_aspeed) {
err = ftgmac100_setup_clk(priv);
if (err)
goto err_ncsi_dev;
goto err_phy_connect;
}
/* Default ring sizes */
@ -1906,6 +1923,8 @@ static int ftgmac100_probe(struct platform_device *pdev)
err_register_netdev:
clk_disable_unprepare(priv->rclk);
clk_disable_unprepare(priv->clk);
err_phy_connect:
ftgmac100_phy_disconnect(netdev);
err_ncsi_dev:
ftgmac100_destroy_mdio(netdev);
err_setup_mdio:
@ -1936,6 +1955,7 @@ static int ftgmac100_remove(struct platform_device *pdev)
*/
cancel_work_sync(&priv->reset_task);
ftgmac100_phy_disconnect(netdev);
ftgmac100_destroy_mdio(netdev);
iounmap(priv->base);