drm/i915/dsc: Add missing _MMIO() from PPS registers
This patch fixes the commit -
<2efbb2f099fb> ("i915/dp/dsc: Add DSC PPS register definitions"),
which did not have _MMIO() for DSCA and DSCC.
v2: Fix typos. (manasi)
v3: Change the commit message (Rodrigo)
Cc: Rodrigi Vivi <rodrigo.vivi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532122962-9068-1-git-send-email-anusha.srivatsa@intel.com
This commit is contained in:
Anusha Srivatsa
Rodrigo Vivi
parent
7a72c78bdd
commit
6f15a7de86
|
|
@ -10349,8 +10349,8 @@ enum skl_power_gate {
|
|||
#define ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN (1 << 23)
|
||||
|
||||
/* Icelake Display Stream Compression Registers */
|
||||
#define DSCA_PICTURE_PARAMETER_SET_0 0x6B200
|
||||
#define DSCC_PICTURE_PARAMETER_SET_0 0x6BA00
|
||||
#define DSCA_PICTURE_PARAMETER_SET_0 _MMIO(0x6B200)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_0 _MMIO(0x6BA00)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_0_PB 0x78270
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_0_PB 0x78370
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_0_PC 0x78470
|
||||
|
|
@ -10370,8 +10370,8 @@ enum skl_power_gate {
|
|||
#define DSC_VER_MIN_SHIFT 4
|
||||
#define DSC_VER_MAJ (0x1 << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_1 0x6B204
|
||||
#define DSCC_PICTURE_PARAMETER_SET_1 0x6BA04
|
||||
#define DSCA_PICTURE_PARAMETER_SET_1 _MMIO(0x6B204)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_1 _MMIO(0x6BA04)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_1_PB 0x78274
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_1_PB 0x78374
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_1_PC 0x78474
|
||||
|
|
@ -10384,8 +10384,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_1_PC)
|
||||
#define DSC_BPP(bpp) ((bpp) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_2 0x6B208
|
||||
#define DSCC_PICTURE_PARAMETER_SET_2 0x6BA08
|
||||
#define DSCA_PICTURE_PARAMETER_SET_2 _MMIO(0x6B208)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_2 _MMIO(0x6BA08)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_2_PB 0x78278
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_2_PB 0x78378
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_2_PC 0x78478
|
||||
|
|
@ -10399,8 +10399,8 @@ enum skl_power_gate {
|
|||
#define DSC_PIC_WIDTH(pic_width) ((pic_width) << 16)
|
||||
#define DSC_PIC_HEIGHT(pic_height) ((pic_height) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_3 0x6B20C
|
||||
#define DSCC_PICTURE_PARAMETER_SET_3 0x6BA0C
|
||||
#define DSCA_PICTURE_PARAMETER_SET_3 _MMIO(0x6B20C)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_3 _MMIO(0x6BA0C)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_3_PB 0x7827C
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_3_PB 0x7837C
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_3_PC 0x7847C
|
||||
|
|
@ -10414,8 +10414,8 @@ enum skl_power_gate {
|
|||
#define DSC_SLICE_WIDTH(slice_width) ((slice_width) << 16)
|
||||
#define DSC_SLICE_HEIGHT(slice_height) ((slice_height) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_4 0x6B210
|
||||
#define DSCC_PICTURE_PARAMETER_SET_4 0x6BA10
|
||||
#define DSCA_PICTURE_PARAMETER_SET_4 _MMIO(0x6B210)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_4 _MMIO(0x6BA10)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_4_PB 0x78280
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_4_PB 0x78380
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_4_PC 0x78480
|
||||
|
|
@ -10429,8 +10429,8 @@ enum skl_power_gate {
|
|||
#define DSC_INITIAL_DEC_DELAY(dec_delay) ((dec_delay) << 16)
|
||||
#define DSC_INITIAL_XMIT_DELAY(xmit_delay) ((xmit_delay) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_5 0x6B214
|
||||
#define DSCC_PICTURE_PARAMETER_SET_5 0x6BA14
|
||||
#define DSCA_PICTURE_PARAMETER_SET_5 _MMIO(0x6B214)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_5 _MMIO(0x6BA14)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_5_PB 0x78284
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_5_PB 0x78384
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_5_PC 0x78484
|
||||
|
|
@ -10441,11 +10441,11 @@ enum skl_power_gate {
|
|||
#define ICL_DSC1_PICTURE_PARAMETER_SET_5(pipe) _MMIO_PIPE((pipe) - PIPE_B, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_5_PC, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_5_PC)
|
||||
#define DSC_SCALE_DEC_INTINT(scale_dec) ((scale_dec) << 16)
|
||||
#define DSC_SCALE_DEC_INT(scale_dec) ((scale_dec) << 16)
|
||||
#define DSC_SCALE_INC_INT(scale_inc) ((scale_inc) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_6 0x6B218
|
||||
#define DSCC_PICTURE_PARAMETER_SET_6 0x6BA18
|
||||
#define DSCA_PICTURE_PARAMETER_SET_6 _MMIO(0x6B218)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_6 _MMIO(0x6BA18)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_6_PB 0x78288
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_6_PB 0x78388
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_6_PC 0x78488
|
||||
|
|
@ -10456,13 +10456,13 @@ enum skl_power_gate {
|
|||
#define ICL_DSC1_PICTURE_PARAMETER_SET_6(pipe) _MMIO_PIPE((pipe) - PIPE_B, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_6_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_6_PC)
|
||||
#define DSC_FLATNESS_MAX_QP(max_qp) (qp << 24)
|
||||
#define DSC_FLATNESS_MIN_QP(min_qp) (qp << 16)
|
||||
#define DSC_FLATNESS_MAX_QP(max_qp) ((max_qp) << 24)
|
||||
#define DSC_FLATNESS_MIN_QP(min_qp) ((min_qp) << 16)
|
||||
#define DSC_FIRST_LINE_BPG_OFFSET(offset) ((offset) << 8)
|
||||
#define DSC_INITIAL_SCALE_VALUE(value) ((value) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_7 0x6B21C
|
||||
#define DSCC_PICTURE_PARAMETER_SET_7 0x6BA1C
|
||||
#define DSCA_PICTURE_PARAMETER_SET_7 _MMIO(0x6B21C)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_7 _MMIO(0x6BA1C)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_7_PB 0x7828C
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_7_PB 0x7838C
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_7_PC 0x7848C
|
||||
|
|
@ -10476,8 +10476,8 @@ enum skl_power_gate {
|
|||
#define DSC_NFL_BPG_OFFSET(bpg_offset) ((bpg_offset) << 16)
|
||||
#define DSC_SLICE_BPG_OFFSET(bpg_offset) ((bpg_offset) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_8 0x6B220
|
||||
#define DSCC_PICTURE_PARAMETER_SET_8 0x6BA20
|
||||
#define DSCA_PICTURE_PARAMETER_SET_8 _MMIO(0x6B220)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_8 _MMIO(0x6BA20)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_8_PB 0x78290
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_8_PB 0x78390
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_8_PC 0x78490
|
||||
|
|
@ -10491,8 +10491,8 @@ enum skl_power_gate {
|
|||
#define DSC_INITIAL_OFFSET(initial_offset) ((initial_offset) << 16)
|
||||
#define DSC_FINAL_OFFSET(final_offset) ((final_offset) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_9 0x6B224
|
||||
#define DSCC_PICTURE_PARAMETER_SET_9 0x6BA24
|
||||
#define DSCA_PICTURE_PARAMETER_SET_9 _MMIO(0x6B224)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_9 _MMIO(0x6BA24)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_9_PB 0x78294
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_9_PB 0x78394
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_9_PC 0x78494
|
||||
|
|
@ -10506,8 +10506,8 @@ enum skl_power_gate {
|
|||
#define DSC_RC_EDGE_FACTOR(rc_edge_fact) ((rc_edge_fact) << 16)
|
||||
#define DSC_RC_MODEL_SIZE(rc_model_size) ((rc_model_size) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_10 0x6B228
|
||||
#define DSCC_PICTURE_PARAMETER_SET_10 0x6BA28
|
||||
#define DSCA_PICTURE_PARAMETER_SET_10 _MMIO(0x6B228)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_10 _MMIO(0x6BA28)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_10_PB 0x78298
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_10_PB 0x78398
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_10_PC 0x78498
|
||||
|
|
@ -10523,8 +10523,8 @@ enum skl_power_gate {
|
|||
#define DSC_RC_QUANT_INC_LIMIT1(lim) ((lim) << 8)
|
||||
#define DSC_RC_QUANT_INC_LIMIT0(lim) ((lim) << 0)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_11 0x6B22C
|
||||
#define DSCC_PICTURE_PARAMETER_SET_11 0x6BA2C
|
||||
#define DSCA_PICTURE_PARAMETER_SET_11 _MMIO(0x6B22C)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_11 _MMIO(0x6BA2C)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_11_PB 0x7829C
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_11_PB 0x7839C
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_11_PC 0x7849C
|
||||
|
|
@ -10536,8 +10536,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_11_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_11_PC)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_12 0x6B260
|
||||
#define DSCC_PICTURE_PARAMETER_SET_12 0x6BA60
|
||||
#define DSCA_PICTURE_PARAMETER_SET_12 _MMIO(0x6B260)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_12 _MMIO(0x6BA60)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_12_PB 0x782A0
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_12_PB 0x783A0
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_12_PC 0x784A0
|
||||
|
|
@ -10549,8 +10549,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_12_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_12_PC)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_13 0x6B264
|
||||
#define DSCC_PICTURE_PARAMETER_SET_13 0x6BA64
|
||||
#define DSCA_PICTURE_PARAMETER_SET_13 _MMIO(0x6B264)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_13 _MMIO(0x6BA64)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_13_PB 0x782A4
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_13_PB 0x783A4
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_13_PC 0x784A4
|
||||
|
|
@ -10562,8 +10562,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_13_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_13_PC)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_14 0x6B268
|
||||
#define DSCC_PICTURE_PARAMETER_SET_14 0x6BA68
|
||||
#define DSCA_PICTURE_PARAMETER_SET_14 _MMIO(0x6B268)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_14 _MMIO(0x6BA68)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_14_PB 0x782A8
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_14_PB 0x783A8
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_14_PC 0x784A8
|
||||
|
|
@ -10575,8 +10575,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_14_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_14_PC)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_15 0x6B26C
|
||||
#define DSCC_PICTURE_PARAMETER_SET_15 0x6BA6C
|
||||
#define DSCA_PICTURE_PARAMETER_SET_15 _MMIO(0x6B26C)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_15 _MMIO(0x6BA6C)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_15_PB 0x782AC
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_15_PB 0x783AC
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_15_PC 0x784AC
|
||||
|
|
@ -10588,8 +10588,8 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_15_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_15_PC)
|
||||
|
||||
#define DSCA_PICTURE_PARAMETER_SET_16 0x6B270
|
||||
#define DSCC_PICTURE_PARAMETER_SET_16 0x6BA70
|
||||
#define DSCA_PICTURE_PARAMETER_SET_16 _MMIO(0x6B270)
|
||||
#define DSCC_PICTURE_PARAMETER_SET_16 _MMIO(0x6BA70)
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_16_PB 0x782B0
|
||||
#define _ICL_DSC1_PICTURE_PARAMETER_SET_16_PB 0x783B0
|
||||
#define _ICL_DSC0_PICTURE_PARAMETER_SET_16_PC 0x784B0
|
||||
|
|
@ -10601,7 +10601,7 @@ enum skl_power_gate {
|
|||
_ICL_DSC1_PICTURE_PARAMETER_SET_16_PB, \
|
||||
_ICL_DSC1_PICTURE_PARAMETER_SET_16_PC)
|
||||
#define DSC_SLICE_PER_LINE(slice_per_line) ((slice_per_line) << 16)
|
||||
#define DSC_SLICE_CHUNK_SIZE(slice_chunk_aize) (slice_chunk_size << 0)
|
||||
#define DSC_SLICE_CHUNK_SIZE(slice_chunk_size) ((slice_chunk_size) << 0)
|
||||
|
||||
/* Icelake Rate Control Buffer Threshold Registers */
|
||||
#define DSCA_RC_BUF_THRESH_0 _MMIO(0x6B230)
|
||||
|
|
|
|||
Loading…
Reference in New Issue