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xen: support 52 bit physical addresses in pv guests 

Physical addresses on processors supporting 5 level paging can be up to
52 bits wide. For a Xen pv guest running on such a machine those
physical addresses have to be supported in order to be able to use any
memory on the machine even if the guest itself does not support 5 level
paging.

So when reading/writing a MFN from/to a pte don't use the kernel's
PTE_PFN_MASK but a new XEN_PTE_MFN_MASK allowing full 40 bit wide MFNs.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This commit is contained in:
Juergen Gross 2017-10-27 19:49:37 +02:00 committed by Boris Ostrovsky
parent 5eee149ab9
commit 6f0e8bf167
2 changed files with 12 additions and 3 deletions
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11
arch/x86/include/asm/xen/page.h
View File

@ -26,6 +26,15 @@ typedef struct xpaddr {
phys_addr_t paddr; phys_addr_t paddr;
} xpaddr_t; } xpaddr_t;
#ifdef CONFIG_X86_64
#define XEN_PHYSICAL_MASK __sme_clr((1UL << 52) - 1)
#else
#define XEN_PHYSICAL_MASK __PHYSICAL_MASK
#endif
#define XEN_PTE_MFN_MASK ((pteval_t)(((signed long)PAGE_MASK) & \
XEN_PHYSICAL_MASK))
#define XMADDR(x) ((xmaddr_t) { .maddr = (x) }) #define XMADDR(x) ((xmaddr_t) { .maddr = (x) })
#define XPADDR(x) ((xpaddr_t) { .paddr = (x) }) #define XPADDR(x) ((xpaddr_t) { .paddr = (x) })
@ -277,7 +286,7 @@ static inline unsigned long bfn_to_local_pfn(unsigned long mfn)
static inline unsigned long pte_mfn(pte_t pte) static inline unsigned long pte_mfn(pte_t pte)
{ {
return (pte.pte & PTE_PFN_MASK) >> PAGE_SHIFT; return (pte.pte & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
} }
static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot) static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)

4
arch/x86/xen/mmu_pv.c
View File

@ -315,7 +315,7 @@ void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
static pteval_t pte_mfn_to_pfn(pteval_t val) static pteval_t pte_mfn_to_pfn(pteval_t val)
{ {
if (val & _PAGE_PRESENT) { if (val & _PAGE_PRESENT) {
unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
unsigned long pfn = mfn_to_pfn(mfn); unsigned long pfn = mfn_to_pfn(mfn);
pteval_t flags = val & PTE_FLAGS_MASK; pteval_t flags = val & PTE_FLAGS_MASK;
@ -1735,7 +1735,7 @@ static unsigned long __init m2p(phys_addr_t maddr)
{ {
phys_addr_t paddr; phys_addr_t paddr;
maddr &= PTE_PFN_MASK; maddr &= XEN_PTE_MFN_MASK;
paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
return paddr; return paddr;