[POWERPC] 4xx: Fix PCI mem in rainier DTS

This fixes the PCI node in the Rainier to match the spec from AMCC.  A
similar fix was done for 440EPx, which shares the same values as 440GRx.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This commit is contained in:
Josh Boyer 2008-05-16 00:41:23 +10:00
parent 71f349799b
commit 6f031101f5
1 changed files with 3 additions and 2 deletions

View File

@ -330,8 +330,9 @@
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x10000000
0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00100000>;
ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;