fpga dt: bindings for Altera Partial Reconfiguration IP.
Device Tree bindings for Altera Partial Reconfiguration IP. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
d201cc17a8
commit
6e761cd77b
|
@ -0,0 +1,12 @@
|
|||
Altera Arria10 Partial Reconfiguration IP
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "altr,a10-pr-ip"
|
||||
- reg : base address and size for memory mapped io.
|
||||
|
||||
Example:
|
||||
|
||||
fpga_mgr: fpga-mgr@ff20c000 {
|
||||
compatible = "altr,a10-pr-ip";
|
||||
reg = <0xff20c000 0x10>;
|
||||
};
|
Loading…
Reference in New Issue