drm/amdgpu: add independent DMA-buf export v8
Add an DMA-buf export implementation independent of the DRM helpers. This not only avoids the caching of DMA-buf mappings, but also allows us to use the new dynamic locking approach. This is also a prerequisite of unpinned DMA-buf handling. v2: fix unintended recursion, remove debugging leftovers v3: split out from unpinned DMA-buf work v4: rebase on top of new no_sgt_cache flag v5: fix some warnings by including amdgpu_dma_buf.h v6: fix locking for non amdgpu exports v7: rebased on new DMA-buf locking patch v8: drop extra include Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/337949/
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955a72cea5
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6e6db2722c
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@ -34,26 +34,11 @@
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#include "amdgpu.h"
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#include "amdgpu.h"
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#include "amdgpu_display.h"
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#include "amdgpu_display.h"
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#include "amdgpu_gem.h"
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#include "amdgpu_gem.h"
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#include "amdgpu_dma_buf.h"
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#include <drm/amdgpu_drm.h>
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#include <drm/amdgpu_drm.h>
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#include <linux/dma-buf.h>
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#include <linux/dma-buf.h>
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#include <linux/dma-fence-array.h>
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#include <linux/dma-fence-array.h>
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/**
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* amdgpu_gem_prime_get_sg_table - &drm_driver.gem_prime_get_sg_table
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* implementation
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* @obj: GEM buffer object (BO)
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*
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* Returns:
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* A scatter/gather table for the pinned pages of the BO's memory.
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*/
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struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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int npages = bo->tbo.num_pages;
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return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
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}
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/**
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/**
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* amdgpu_gem_prime_vmap - &dma_buf_ops.vmap implementation
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* amdgpu_gem_prime_vmap - &dma_buf_ops.vmap implementation
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* @obj: GEM BO
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* @obj: GEM BO
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@ -179,92 +164,126 @@ err_fences_put:
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}
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}
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/**
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/**
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* amdgpu_dma_buf_map_attach - &dma_buf_ops.attach implementation
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* amdgpu_dma_buf_attach - &dma_buf_ops.attach implementation
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* @dma_buf: Shared DMA buffer
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*
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* @dmabuf: DMA-buf where we attach to
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* @attach: attachment to add
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*
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* Add the attachment as user to the exported DMA-buf.
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*/
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static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
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struct dma_buf_attachment *attach)
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{
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struct drm_gem_object *obj = dmabuf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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int r;
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if (attach->dev->driver == adev->dev->driver)
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return 0;
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r = amdgpu_bo_reserve(bo, false);
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if (unlikely(r != 0))
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return r;
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/*
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* We only create shared fences for internal use, but importers
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* of the dmabuf rely on exclusive fences for implicitly
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* tracking write hazards. As any of the current fences may
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* correspond to a write, we need to convert all existing
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* fences on the reservation object into a single exclusive
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* fence.
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*/
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r = __dma_resv_make_exclusive(bo->tbo.base.resv);
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if (r)
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return r;
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bo->prime_shared_count++;
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amdgpu_bo_unreserve(bo);
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return 0;
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}
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/**
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* amdgpu_dma_buf_detach - &dma_buf_ops.detach implementation
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*
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* @dmabuf: DMA-buf where we remove the attachment from
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* @attach: the attachment to remove
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*
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* Called when an attachment is removed from the DMA-buf.
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*/
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static void amdgpu_dma_buf_detach(struct dma_buf *dmabuf,
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struct dma_buf_attachment *attach)
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{
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struct drm_gem_object *obj = dmabuf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
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bo->prime_shared_count--;
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}
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/**
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* amdgpu_dma_buf_map - &dma_buf_ops.map_dma_buf implementation
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* @attach: DMA-buf attachment
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* @attach: DMA-buf attachment
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* @dir: DMA direction
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*
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*
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* Makes sure that the shared DMA buffer can be accessed by the target device.
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* Makes sure that the shared DMA buffer can be accessed by the target device.
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* For now, simply pins it to the GTT domain, where it should be accessible by
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* For now, simply pins it to the GTT domain, where it should be accessible by
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* all DMA devices.
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* all DMA devices.
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*
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*
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* Returns:
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* Returns:
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* 0 on success or a negative error code on failure.
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* sg_table filled with the DMA addresses to use or ERR_PRT with negative error
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* code.
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*/
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*/
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static int amdgpu_dma_buf_map_attach(struct dma_buf *dma_buf,
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static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
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struct dma_buf_attachment *attach)
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enum dma_data_direction dir)
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{
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{
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struct dma_buf *dma_buf = attach->dmabuf;
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struct drm_gem_object *obj = dma_buf->priv;
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struct drm_gem_object *obj = dma_buf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct sg_table *sgt;
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long r;
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long r;
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r = drm_gem_map_attach(dma_buf, attach);
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if (r)
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return r;
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r = amdgpu_bo_reserve(bo, false);
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if (unlikely(r != 0))
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goto error_detach;
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if (attach->dev->driver != adev->dev->driver) {
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/*
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* We only create shared fences for internal use, but importers
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* of the dmabuf rely on exclusive fences for implicitly
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* tracking write hazards. As any of the current fences may
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* correspond to a write, we need to convert all existing
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* fences on the reservation object into a single exclusive
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* fence.
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*/
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r = __dma_resv_make_exclusive(bo->tbo.base.resv);
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if (r)
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goto error_unreserve;
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}
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/* pin buffer into GTT */
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r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
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r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
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if (r)
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if (r)
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goto error_unreserve;
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return ERR_PTR(r);
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if (attach->dev->driver != adev->dev->driver)
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sgt = drm_prime_pages_to_sg(bo->tbo.ttm->pages, bo->tbo.num_pages);
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bo->prime_shared_count++;
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if (IS_ERR(sgt))
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return sgt;
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error_unreserve:
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if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir,
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amdgpu_bo_unreserve(bo);
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DMA_ATTR_SKIP_CPU_SYNC))
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goto error_free;
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error_detach:
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return sgt;
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if (r)
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drm_gem_map_detach(dma_buf, attach);
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error_free:
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return r;
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sg_free_table(sgt);
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kfree(sgt);
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return ERR_PTR(-ENOMEM);
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}
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}
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/**
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/**
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* amdgpu_dma_buf_map_detach - &dma_buf_ops.detach implementation
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* amdgpu_dma_buf_unmap - &dma_buf_ops.unmap_dma_buf implementation
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* @dma_buf: Shared DMA buffer
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* @attach: DMA-buf attachment
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* @attach: DMA-buf attachment
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* @sgt: sg_table to unmap
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* @dir: DMA direction
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*
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*
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* This is called when a shared DMA buffer no longer needs to be accessible by
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* This is called when a shared DMA buffer no longer needs to be accessible by
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* another device. For now, simply unpins the buffer from GTT.
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* another device. For now, simply unpins the buffer from GTT.
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*/
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*/
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static void amdgpu_dma_buf_map_detach(struct dma_buf *dma_buf,
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static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
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struct dma_buf_attachment *attach)
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struct sg_table *sgt,
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enum dma_data_direction dir)
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{
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{
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struct drm_gem_object *obj = dma_buf->priv;
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struct drm_gem_object *obj = attach->dmabuf->priv;
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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int ret = 0;
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ret = amdgpu_bo_reserve(bo, true);
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if (unlikely(ret != 0))
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goto error;
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dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir);
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sg_free_table(sgt);
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kfree(sgt);
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amdgpu_bo_unpin(bo);
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amdgpu_bo_unpin(bo);
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if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
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bo->prime_shared_count--;
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amdgpu_bo_unreserve(bo);
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error:
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drm_gem_map_detach(dma_buf, attach);
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}
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}
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/**
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/**
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@ -308,10 +327,11 @@ static int amdgpu_dma_buf_begin_cpu_access(struct dma_buf *dma_buf,
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}
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}
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const struct dma_buf_ops amdgpu_dmabuf_ops = {
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const struct dma_buf_ops amdgpu_dmabuf_ops = {
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.attach = amdgpu_dma_buf_map_attach,
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.dynamic_mapping = true,
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.detach = amdgpu_dma_buf_map_detach,
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.attach = amdgpu_dma_buf_attach,
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.map_dma_buf = drm_gem_map_dma_buf,
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.detach = amdgpu_dma_buf_detach,
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.unmap_dma_buf = drm_gem_unmap_dma_buf,
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.map_dma_buf = amdgpu_dma_buf_map,
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.unmap_dma_buf = amdgpu_dma_buf_unmap,
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.release = drm_gem_dmabuf_release,
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.release = drm_gem_dmabuf_release,
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.begin_cpu_access = amdgpu_dma_buf_begin_cpu_access,
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.begin_cpu_access = amdgpu_dma_buf_begin_cpu_access,
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.mmap = drm_gem_dmabuf_mmap,
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.mmap = drm_gem_dmabuf_mmap,
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@ -25,7 +25,6 @@
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#include <drm/drm_gem.h>
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#include <drm/drm_gem.h>
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struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
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struct drm_gem_object *
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struct drm_gem_object *
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amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
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amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach,
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struct dma_buf_attachment *attach,
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@ -1445,7 +1445,6 @@ static struct drm_driver kms_driver = {
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = amdgpu_gem_prime_export,
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.gem_prime_export = amdgpu_gem_prime_export,
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.gem_prime_import = amdgpu_gem_prime_import,
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.gem_prime_import = amdgpu_gem_prime_import,
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.gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
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.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
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.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
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.gem_prime_vmap = amdgpu_gem_prime_vmap,
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.gem_prime_vmap = amdgpu_gem_prime_vmap,
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.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
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.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
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