arm64: dts: marvell: Add a device tree for the IEI Puzzle-M801 board
Add initial support for the IEI Puzzle-M801 1U Rackmount Network Appliance board. The board is based on the quad-core Marvell Armada 8040 SoC and supports up to 16 GB of DDR4 2400 MHz ECC RAM. It has a PCIe x16 slot (x2 lanes only) and an M.2 type B slot. Main system hardware: 2x USB 3.0 4x Gigabit Ethernet 2x SFP+ 1x SATA 3.0 1x M.2 type B 1x RJ45 UART 1x SPI flash 1x IEI WT61P803 PUZZLE Microcontroller 1x EPSON RX8010 RTC (used instead of the integrated Marvell RTC controller) 6x SFP+ LED 1x HDD LED All of the hardware listed above is supported and tested in this port. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Luka Kovacic
Gregory CLEMENT
parent
f9559f029e
commit
6d96e11b77
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@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-clearfog-gt-8k.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin-singleshot.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-puzzle-m801.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += cn9131-db.dtb
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@ -0,0 +1,523 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2016 Marvell Technology Group Ltd.
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* Copyright (C) 2020 Sartura Ltd.
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*
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* Device Tree file for IEI Puzzle-M801
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*/
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#include "armada-8040.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "IEI-Puzzle-M801";
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compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";
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aliases {
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp1_eth0;
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ethernet2 = &cp0_eth1;
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ethernet3 = &cp0_eth2;
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ethernet4 = &cp1_eth1;
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ethernet5 = &cp1_eth2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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/* Regulator labels correspond with schematics */
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v_3_3: regulator-3-3v {
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compatible = "regulator-fixed";
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regulator-name = "v_3_3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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status = "okay";
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};
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v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_xhci_vbus_pins>;
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regulator-name = "v_5v0_usb3_hst_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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status = "okay";
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};
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v_vddo_h: regulator-1-8v {
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compatible = "regulator-fixed";
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regulator-name = "v_vddo_h";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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status = "okay";
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};
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sfp_cp0_eth0: sfp-cp0-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&sfpplus0_i2c>;
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los-gpio = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <3000>;
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};
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sfp_cp1_eth0: sfp-cp1-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&sfpplus1_i2c>;
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los-gpio = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <3000>;
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};
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leds {
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compatible = "gpio-leds";
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status = "okay";
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pinctrl-0 = <&cp0_sfpplus_led_pins &cp1_sfpplus_led_pins>;
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pinctrl-names = "default";
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led-0 {
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/* SFP+ port 2: Activity */
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function = LED_FUNCTION_LAN;
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function-enumerator = <0>;
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gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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/* SFP+ port 1: Activity */
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
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};
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led-2 {
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/* SFP+ port 2: 10 Gbps indicator */
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
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};
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led-3 {
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/* SFP+ port 2: 1 Gbps indicator */
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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gpios = <&cp1_gpio1 8 GPIO_ACTIVE_LOW>;
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};
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led-4 {
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/* SFP+ port 1: 10 Gbps indicator */
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>;
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};
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led-5 {
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/* SFP+ port 1: 1 Gbps indicator */
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function = LED_FUNCTION_LAN;
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function-enumerator = <5>;
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gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
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};
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led-6 {
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function = LED_FUNCTION_DISK;
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linux,default-trigger = "disk-activity";
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gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&ap_sdhci0 {
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bus-width = <8>;
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/*
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* Not stable in HS modes - phy needs "more calibration", so add
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* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
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*/
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marvell,xenon-phy-slow-mode;
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no-1-8-v;
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no-sd;
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no-sdio;
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non-removable;
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status = "okay";
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vqmmc-supply = <&v_vddo_h>;
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};
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&ap_thermal_cpu1 {
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trips {
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cpu_active: cpu-active {
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temperature = <44000>;
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hysteresis = <2000>;
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type = "active";
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};
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};
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cooling-maps {
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fan-map {
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trip = <&cpu_active>;
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cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>,
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<&chassis_fan_group1 64 THERMAL_NO_LIMIT>;
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};
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};
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};
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&i2c0 {
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clock-frequency = <100000>;
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status = "okay";
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rtc@32 {
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compatible = "epson,rx8010";
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reg = <0x32>;
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};
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-max-frequency = <20000000>;
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partition@u-boot {
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label = "u-boot";
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reg = <0x00000000 0x001f0000>;
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};
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partition@u-boot-env {
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label = "u-boot-env";
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reg = <0x001f0000 0x00010000>;
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};
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partition@ubi1 {
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label = "ubi1";
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reg = <0x00200000 0x03f00000>;
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};
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partition@ubi2 {
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label = "ubi2";
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reg = <0x04100000 0x03f00000>;
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};
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};
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};
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&uart0 {
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status = "okay";
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&uart1 {
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status = "okay";
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/* IEI WT61P803 PUZZLE MCU Controller */
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mcu {
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compatible = "iei,wt61p803-puzzle";
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current-speed = <115200>;
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enable-beep;
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leds {
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compatible = "iei,wt61p803-puzzle-leds";
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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hwmon {
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compatible = "iei,wt61p803-puzzle-hwmon";
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#address-cells = <1>;
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#size-cells = <0>;
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chassis_fan_group0:fan-group@0 {
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#cooling-cells = <2>;
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reg = <0x00>;
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cooling-levels = <64 102 170 230 250>;
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};
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chassis_fan_group1:fan-group@1 {
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#cooling-cells = <2>;
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reg = <0x01>;
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cooling-levels = <64 102 170 230 250>;
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};
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};
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};
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};
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&cp0_rtc {
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status = "disabled";
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};
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&cp0_i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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sfpplus_gpio: gpio@21 {
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compatible = "nxp,pca9555";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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eeprom@54 {
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compatible = "atmel,24c04";
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reg = <0x54>;
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};
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};
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&cp0_i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c1_pins>;
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status = "okay";
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i2c-switch@70 {
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compatible = "nxp,pca9544";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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sfpplus0_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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sfpplus1_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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};
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};
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&cp0_uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_uart1_pins>;
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status = "okay";
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};
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&cp0_mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ge_phy2: ethernet-phy@0 {
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reg = <0>;
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};
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ge_phy3: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cp0_pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_pcie_pins>;
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num-lanes = <1>;
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num-viewport = <8>;
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reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
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ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
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phys = <&cp0_comphy0 0>;
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phy-names = "cp0-pcie0-x1-phy";
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status = "okay";
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};
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&cp0_pinctrl {
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cp0_ge_mdio_pins: ge-mdio-pins {
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marvell,pins = "mpp32", "mpp34";
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marvell,function = "ge";
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};
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cp0_i2c1_pins: i2c1-pins {
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marvell,pins = "mpp35", "mpp36";
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marvell,function = "i2c1";
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};
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cp0_i2c0_pins: i2c0-pins {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cp0_uart1_pins: uart1-pins {
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marvell,pins = "mpp40", "mpp41";
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marvell,function = "uart1";
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};
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cp0_xhci_vbus_pins: xhci0-vbus-pins {
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marvell,pins = "mpp47";
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marvell,function = "gpio";
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};
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cp0_pcie_pins: pcie-pins {
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marvell,pins = "mpp52";
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marvell,function = "gpio";
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};
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cp0_sdhci_pins: sdhci-pins {
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marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
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"mpp60", "mpp61";
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marvell,function = "sdio";
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};
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cp0_sfpplus_led_pins: sfpplus-led-pins {
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marvell,pins = "mpp54";
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marvell,function = "gpio";
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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&cp0_eth0 {
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status = "okay";
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phy-mode = "10gbase-r";
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phys = <&cp0_comphy4 0>;
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local-mac-address = [ae 00 00 00 ff 00];
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sfp = <&sfp_cp0_eth0>;
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managed = "in-band-status";
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};
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&cp0_eth1 {
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status = "okay";
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phy = <&ge_phy2>;
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phy-mode = "sgmii";
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local-mac-address = [ae 00 00 00 ff 01];
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phys = <&cp0_comphy3 1>;
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};
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&cp0_eth2 {
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status = "okay";
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phy-mode = "sgmii";
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phys = <&cp0_comphy1 2>;
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local-mac-address = [ae 00 00 00 ff 02];
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phy = <&ge_phy3>;
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};
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&cp0_sata0 {
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status = "okay";
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sata-port@0 {
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phys = <&cp0_comphy2 0>;
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phy-names = "cp0-sata0-0-phy";
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};
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sata-port@1 {
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phys = <&cp0_comphy5 1>;
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phy-names = "cp0-sata0-1-phy";
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};
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};
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&cp0_sdhci0 {
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broken-cd;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sdhci_pins>;
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status = "okay";
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vqmmc-supply = <&v_3_3>;
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};
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&cp0_usb3_0 {
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status = "okay";
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};
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&cp0_usb3_1 {
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status = "okay";
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};
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&cp1_i2c0 {
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clock-frequency = <100000>;
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status = "disabled";
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};
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&cp1_i2c1 {
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clock-frequency = <100000>;
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status = "disabled";
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};
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&cp1_rtc {
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status = "disabled";
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};
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&cp1_ethernet {
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status = "okay";
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};
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&cp1_eth0 {
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status = "okay";
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phy-mode = "10gbase-r";
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phys = <&cp1_comphy4 0>;
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local-mac-address = [ae 00 00 00 ff 03];
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sfp = <&sfp_cp1_eth0>;
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managed = "in-band-status";
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};
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&cp1_eth1 {
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status = "okay";
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phy = <&ge_phy4>;
|
||||
phy-mode = "sgmii";
|
||||
local-mac-address = [ae 00 00 00 ff 04];
|
||||
phys = <&cp1_comphy3 1>;
|
||||
};
|
||||
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
local-mac-address = [ae 00 00 00 ff 05];
|
||||
phys = <&cp1_comphy5 2>;
|
||||
phy = <&ge_phy5>;
|
||||
};
|
||||
|
||||
&cp1_pinctrl {
|
||||
cp1_sfpplus_led_pins: sfpplus-led-pins {
|
||||
marvell,pins = "mpp6", "mpp7", "mpp8", "mpp10", "mpp14", "mpp31";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_uart0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp1_comphy2 {
|
||||
cp1_usbh0_con: connector {
|
||||
compatible = "usb-a-connector";
|
||||
phy-supply = <&v_5v0_usb3_hst_vbus>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_usb3_0 {
|
||||
phys = <&cp1_comphy2 0>;
|
||||
phy-names = "cp1-usb3h0-comphy";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
ge_phy4: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
ge_phy5: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_pcie0 {
|
||||
num-lanes = <2>;
|
||||
phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
|
||||
phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue