kselftest/arm64: Add manual encodings for SME instructions
As for the kernel so that we don't have ambitious toolchain requirements to build the tests manually encode some of the SVE instructions. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Shuah Khan <skhan@linuxfoundation.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419112247.711548-29-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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// SPDX-License-Identifier: GPL-2.0-only
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// Copyright (C) 2021-2 ARM Limited.
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// Original author: Mark Brown <broonie@kernel.org>
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#ifndef SME_INST_H
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#define SME_INST_H
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/*
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* RDSVL X\nx, #\imm
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*/
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.macro rdsvl nx, imm
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.inst 0x4bf5800 \
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| (\imm << 5) \
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| (\nx)
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.endm
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.macro smstop
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msr S0_3_C4_C6_3, xzr
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.endm
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.macro smstart_za
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msr S0_3_C4_C5_3, xzr
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.endm
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.macro smstart_sm
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msr S0_3_C4_C3_3, xzr
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.endm
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/*
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* LDR (vector to ZA array):
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* LDR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
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*/
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.macro _ldr_za nw, nxbase, offset=0
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.inst 0xe1000000 \
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| (((\nw) & 3) << 13) \
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| ((\nxbase) << 5) \
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| ((\offset) & 7)
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.endm
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/*
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* STR (vector from ZA array):
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* STR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
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*/
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.macro _str_za nw, nxbase, offset=0
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.inst 0xe1200000 \
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| (((\nw) & 3) << 13) \
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| ((\nxbase) << 5) \
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| ((\offset) & 7)
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.endm
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#endif
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