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perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch 

commit ce711ea3ca upstream.

We have skipped changes for pmu lbr, because it will cause much commits for
intel_pmu_arch_lbr_init() to merge. We skipped here and will check perf function
for lbr to aviod crash while perfing lbr.

Signed-off-by: Chen Zhuo <sagazchen@tencent.com>
Signed-off-by: Xinghui Li <korantli@tencent.com>
This commit is contained in:
Chen Zhuo 2021-10-26 20:49:25 +08:00 committed by Jianping Liu
parent afeae5ea12
commit 6d010665f8
2 changed files with 4 additions and 1 deletions
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3
arch/x86/include/asm/fpu/xstate.h
View File

@ -21,6 +21,8 @@
#define XSAVE_YMM_SIZE 256
#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
#define XSAVE_ALIGNMENT 64
/* All currently supported user features */
#define XFEATURE_MASK_USER_SUPPORTED (XFEATURE_MASK_FP | \
XFEATURE_MASK_SSE | \
@ -101,6 +103,7 @@ extern void __init update_regset_xstate_info(unsigned int size,
void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
const void *get_xsave_field_ptr(int xfeature_nr);
int using_compacted_format(void);
int xfeature_size(int xfeature_nr);
int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset, unsigned int size);
int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset, unsigned int size);
int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);

2
arch/x86/kernel/fpu/xstate.c
View File

@ -520,7 +520,7 @@ static int xfeature_uncompacted_offset(int xfeature_nr)
return ebx;
}
static int xfeature_size(int xfeature_nr)
int xfeature_size(int xfeature_nr)
{
u32 eax, ebx, ecx, edx;