mtd: rawnand: Get rid of chip->chipsize
The target size can now be returned by nanddev_get_targetsize(). Get rid of the chip->chipsize field and use this helper instead. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
parent
298151689b
commit
6c836d515f
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@ -428,7 +428,7 @@ int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n)
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}
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/* Configure FLASH */
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chipsize = b47n->nand_chip.chipsize >> 20;
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chipsize = nanddev_target_size(&b47n->nand_chip.base) >> 20;
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tbits = ffs(chipsize); /* find first bit set */
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if (!tbits || tbits != fls(chipsize)) {
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pr_err("Invalid flash size: 0x%lX\n", chipsize);
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@ -1134,7 +1134,6 @@ static int denali_multidev_fixup(struct denali_nand_info *denali)
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mtd->erasesize <<= 1;
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mtd->writesize <<= 1;
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mtd->oobsize <<= 1;
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chip->chipsize <<= 1;
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chip->page_shift += 1;
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chip->phys_erase_shift += 1;
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chip->bbt_erase_shift += 1;
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@ -655,7 +655,7 @@ static int fsl_elbc_attach_chip(struct nand_chip *chip)
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dev_dbg(priv->dev, "fsl_elbc_init: nand->numchips = %d\n",
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chip->numchips);
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dev_dbg(priv->dev, "fsl_elbc_init: nand->chipsize = %lld\n",
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chip->chipsize);
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nanddev_target_size(&chip->base));
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dev_dbg(priv->dev, "fsl_elbc_init: nand->pagemask = %8x\n",
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chip->pagemask);
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dev_dbg(priv->dev, "fsl_elbc_init: nand->legacy.chip_delay = %d\n",
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@ -724,7 +724,7 @@ static int fsl_ifc_attach_chip(struct nand_chip *chip)
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dev_dbg(priv->dev, "%s: nand->numchips = %d\n", __func__,
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chip->numchips);
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dev_dbg(priv->dev, "%s: nand->chipsize = %lld\n", __func__,
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chip->chipsize);
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nanddev_target_size(&chip->base));
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dev_dbg(priv->dev, "%s: nand->pagemask = %8x\n", __func__,
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chip->pagemask);
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dev_dbg(priv->dev, "%s: nand->legacy.chip_delay = %d\n", __func__,
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@ -1753,7 +1753,7 @@ static int mx23_boot_init(struct gpmi_nand_data *this)
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dev_dbg(dev, "Transcribing bad block marks...\n");
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/* Compute the number of blocks in the entire medium. */
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block_count = chip->chipsize >> chip->phys_erase_shift;
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block_count = nanddev_eraseblocks_per_target(&chip->base);
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/*
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* Loop over all the blocks in the medium, transcribing block marks as
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@ -356,7 +356,7 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
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/* Update size of the MTD. */
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chip->numchips++;
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memorg->ntargets++;
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mtd->size += chip->chipsize;
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mtd->size += nanddev_target_size(&chip->base);
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}
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dev_info(&pdev->dev, "Found chip %zu on bank %i\n", chipnr, bank);
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@ -4542,7 +4542,6 @@ static bool find_full_id_nand(struct nand_chip *chip,
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mtd->oobsize = memorg->oobsize;
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memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
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chip->chipsize = (uint64_t)type->chipsize << 20;
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memorg->eraseblocks_per_lun =
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DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20,
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memorg->pagesize *
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@ -4633,6 +4632,7 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
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int busw, ret;
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u8 *id_data = chip->id.data;
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u8 maf_id, dev_id;
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u64 targetsize;
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/*
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* Let's start by initializing memorg fields that might be left
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@ -4737,8 +4737,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
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if (!chip->parameters.model)
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return -ENOMEM;
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chip->chipsize = (uint64_t)type->chipsize << 20;
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if (!type->pagesize)
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nand_manufacturer_detect(chip);
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else
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@ -4780,14 +4778,15 @@ ident_done:
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/* Calculate the address shift from the page size */
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chip->page_shift = ffs(mtd->writesize) - 1;
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/* Convert chipsize to number of pages per chip -1 */
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chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
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targetsize = nanddev_target_size(&chip->base);
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chip->pagemask = (targetsize >> chip->page_shift) - 1;
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chip->bbt_erase_shift = chip->phys_erase_shift =
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ffs(mtd->erasesize) - 1;
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if (chip->chipsize & 0xffffffff)
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chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
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if (targetsize & 0xffffffff)
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chip->chip_shift = ffs((unsigned)targetsize) - 1;
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else {
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chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
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chip->chip_shift = ffs((unsigned)(targetsize >> 32));
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chip->chip_shift += 32 - 1;
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}
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@ -4803,7 +4802,7 @@ ident_done:
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pr_info("%s %s\n", nand_manufacturer_name(manufacturer),
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chip->parameters.model);
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pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
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(int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
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(int)(targetsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
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mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);
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return 0;
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@ -5054,7 +5053,7 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
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/* Store the number of chips and calc total size for mtd */
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memorg->ntargets = i;
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chip->numchips = i;
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mtd->size = i * chip->chipsize;
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mtd->size = i * nanddev_target_size(&chip->base);
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return 0;
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}
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@ -264,6 +264,7 @@ static int read_abs_bbt(struct nand_chip *this, uint8_t *buf,
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struct nand_bbt_descr *td, int chip)
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{
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struct mtd_info *mtd = nand_to_mtd(this);
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u64 targetsize = nanddev_target_size(&this->base);
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int res = 0, i;
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if (td->options & NAND_BBT_PERCHIP) {
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@ -271,11 +272,11 @@ static int read_abs_bbt(struct nand_chip *this, uint8_t *buf,
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for (i = 0; i < this->numchips; i++) {
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if (chip == -1 || chip == i)
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res = read_bbt(this, buf, td->pages[i],
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this->chipsize >> this->bbt_erase_shift,
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targetsize >> this->bbt_erase_shift,
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td, offs);
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if (res)
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return res;
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offs += this->chipsize >> this->bbt_erase_shift;
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offs += targetsize >> this->bbt_erase_shift;
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}
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} else {
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res = read_bbt(this, buf, td->pages[0],
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@ -459,6 +460,7 @@ static int scan_block_fast(struct nand_chip *this, struct nand_bbt_descr *bd,
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static int create_bbt(struct nand_chip *this, uint8_t *buf,
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struct nand_bbt_descr *bd, int chip)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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struct mtd_info *mtd = nand_to_mtd(this);
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int i, numblocks, numpages;
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int startblock;
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@ -481,7 +483,7 @@ static int create_bbt(struct nand_chip *this, uint8_t *buf,
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chip + 1, this->numchips);
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return -EINVAL;
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}
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numblocks = this->chipsize >> this->bbt_erase_shift;
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numblocks = targetsize >> this->bbt_erase_shift;
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startblock = chip * numblocks;
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numblocks += startblock;
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from = (loff_t)startblock << this->bbt_erase_shift;
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@ -529,6 +531,7 @@ static int create_bbt(struct nand_chip *this, uint8_t *buf,
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static int search_bbt(struct nand_chip *this, uint8_t *buf,
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struct nand_bbt_descr *td)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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struct mtd_info *mtd = nand_to_mtd(this);
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int i, chips;
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int startblock, block, dir;
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@ -548,7 +551,7 @@ static int search_bbt(struct nand_chip *this, uint8_t *buf,
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/* Do we have a bbt per chip? */
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if (td->options & NAND_BBT_PERCHIP) {
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chips = this->numchips;
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bbtblocks = this->chipsize >> this->bbt_erase_shift;
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bbtblocks = targetsize >> this->bbt_erase_shift;
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startblock &= bbtblocks - 1;
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} else {
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chips = 1;
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@ -576,7 +579,7 @@ static int search_bbt(struct nand_chip *this, uint8_t *buf,
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break;
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}
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}
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startblock += this->chipsize >> this->bbt_erase_shift;
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startblock += targetsize >> this->bbt_erase_shift;
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}
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/* Check, if we found a bbt for each requested chip */
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for (i = 0; i < chips; i++) {
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@ -626,6 +629,7 @@ static void search_read_bbts(struct nand_chip *this, uint8_t *buf,
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static int get_bbt_block(struct nand_chip *this, struct nand_bbt_descr *td,
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struct nand_bbt_descr *md, int chip)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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int startblock, dir, page, numblocks, i;
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/*
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@ -637,7 +641,7 @@ static int get_bbt_block(struct nand_chip *this, struct nand_bbt_descr *td,
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return td->pages[chip] >>
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(this->bbt_erase_shift - this->page_shift);
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numblocks = (int)(this->chipsize >> this->bbt_erase_shift);
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numblocks = (int)(targetsize >> this->bbt_erase_shift);
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if (!(td->options & NAND_BBT_PERCHIP))
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numblocks *= this->numchips;
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@ -717,6 +721,7 @@ static int write_bbt(struct nand_chip *this, uint8_t *buf,
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struct nand_bbt_descr *td, struct nand_bbt_descr *md,
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int chipsel)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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struct mtd_info *mtd = nand_to_mtd(this);
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struct erase_info einfo;
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int i, res, chip = 0;
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@ -737,7 +742,7 @@ static int write_bbt(struct nand_chip *this, uint8_t *buf,
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rcode = 0xff;
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/* Write bad block table per chip rather than per device? */
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if (td->options & NAND_BBT_PERCHIP) {
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numblocks = (int)(this->chipsize >> this->bbt_erase_shift);
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numblocks = (int)(targetsize >> this->bbt_erase_shift);
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/* Full device write or specific chip? */
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if (chipsel == -1) {
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nrchips = this->numchips;
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@ -1099,6 +1104,7 @@ static int nand_update_bbt(struct nand_chip *this, loff_t offs)
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*/
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static void mark_bbt_region(struct nand_chip *this, struct nand_bbt_descr *td)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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struct mtd_info *mtd = nand_to_mtd(this);
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int i, j, chips, block, nrblocks, update;
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uint8_t oldval;
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@ -1106,7 +1112,7 @@ static void mark_bbt_region(struct nand_chip *this, struct nand_bbt_descr *td)
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/* Do we have a bbt per chip? */
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if (td->options & NAND_BBT_PERCHIP) {
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chips = this->numchips;
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nrblocks = (int)(this->chipsize >> this->bbt_erase_shift);
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nrblocks = (int)(targetsize >> this->bbt_erase_shift);
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} else {
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chips = 1;
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nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
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@ -1159,6 +1165,7 @@ static void mark_bbt_region(struct nand_chip *this, struct nand_bbt_descr *td)
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*/
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static void verify_bbt_descr(struct nand_chip *this, struct nand_bbt_descr *bd)
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{
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u64 targetsize = nanddev_target_size(&this->base);
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struct mtd_info *mtd = nand_to_mtd(this);
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u32 pattern_len;
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u32 bits;
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@ -1187,7 +1194,7 @@ static void verify_bbt_descr(struct nand_chip *this, struct nand_bbt_descr *bd)
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}
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if (bd->options & NAND_BBT_PERCHIP)
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table_size = this->chipsize >> this->bbt_erase_shift;
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table_size = targetsize >> this->bbt_erase_shift;
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else
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table_size = mtd->size >> this->bbt_erase_shift;
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table_size >>= 3;
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@ -101,8 +101,6 @@ int nand_jedec_detect(struct nand_chip *chip)
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/* Please reference to the comment for nand_flash_detect_onfi. */
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memorg->eraseblocks_per_lun =
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1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
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chip->chipsize = memorg->eraseblocks_per_lun;
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chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
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memorg->bits_per_cell = p->bits_per_cell;
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if (le16_to_cpu(p->features) & JEDEC_FEATURE_16_BIT_BUS)
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@ -246,8 +246,6 @@ int nand_onfi_detect(struct nand_chip *chip)
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memorg->eraseblocks_per_lun =
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1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
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memorg->max_bad_eraseblocks_per_lun = le32_to_cpu(p->blocks_per_lun);
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chip->chipsize = memorg->eraseblocks_per_lun;
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chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
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memorg->bits_per_cell = p->bits_per_cell;
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if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS)
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@ -2305,6 +2305,7 @@ static int __init ns_init_module(void)
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if (overridesize) {
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uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
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struct nand_memory_organization *memorg;
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u64 targetsize;
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memorg = nanddev_get_memorg(&chip->base);
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@ -2313,12 +2314,13 @@ static int __init ns_init_module(void)
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retval = -EINVAL;
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goto err_exit;
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}
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/* N.B. This relies on nand_scan not doing anything with the size before we change it */
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nsmtd->size = new_size;
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memorg->eraseblocks_per_lun = 1 << overridesize;
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chip->chipsize = new_size;
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targetsize = nanddev_target_size(&chip->base);
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chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
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chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
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chip->pagemask = (targetsize >> chip->page_shift) - 1;
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}
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if ((retval = setup_wear_reporting(nsmtd)) != 0)
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@ -986,6 +986,7 @@ static void flctl_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
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static int flctl_chip_attach_chip(struct nand_chip *chip)
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{
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u64 targetsize = nanddev_target_size(&chip->base);
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct sh_flctl *flctl = mtd_to_flctl(mtd);
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@ -998,11 +999,11 @@ static int flctl_chip_attach_chip(struct nand_chip *chip)
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if (mtd->writesize == 512) {
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flctl->page_size = 0;
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if (chip->chipsize > (32 << 20)) {
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if (targetsize > (32 << 20)) {
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/* big than 32MB */
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flctl->rw_ADRCNT = ADRCNT_4;
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flctl->erase_ADRCNT = ADRCNT_3;
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} else if (chip->chipsize > (2 << 16)) {
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} else if (targetsize > (2 << 16)) {
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/* big than 128KB */
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flctl->rw_ADRCNT = ADRCNT_3;
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flctl->erase_ADRCNT = ADRCNT_2;
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@ -1012,11 +1013,11 @@ static int flctl_chip_attach_chip(struct nand_chip *chip)
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}
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} else {
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flctl->page_size = 1;
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if (chip->chipsize > (128 << 20)) {
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if (targetsize > (128 << 20)) {
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/* big than 128MB */
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flctl->rw_ADRCNT = ADRCNT2_E;
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flctl->erase_ADRCNT = ADRCNT_3;
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} else if (chip->chipsize > (8 << 16)) {
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} else if (targetsize > (8 << 16)) {
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/* big than 512KB */
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flctl->rw_ADRCNT = ADRCNT_4;
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flctl->erase_ADRCNT = ADRCNT_2;
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@ -1003,7 +1003,6 @@ struct nand_legacy {
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* ONFI compliant or deduced from the datasheet if
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* the NAND chip is not ONFI compliant.
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* @numchips: [INTERN] number of physical chips
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
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* @data_buf: [INTERN] buffer for data, size is (page size + oobsize).
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* @pagecache: Structure containing page cache related fields
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@ -1053,7 +1052,6 @@ struct nand_chip {
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int bbt_erase_shift;
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int chip_shift;
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int numchips;
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uint64_t chipsize;
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int pagemask;
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u8 *data_buf;
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