drm/i915/perf: add KBL support
Add OA support for Kabylake (pretty much identical to Skylake), and also add the associated OA configurations. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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@ -135,7 +135,9 @@ i915-y += i915_perf.o \
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i915_oa_sklgt2.o \
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i915_oa_sklgt3.o \
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i915_oa_sklgt4.o \
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i915_oa_bxt.o
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i915_oa_bxt.o \
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i915_oa_kblgt2.o \
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i915_oa_kblgt3.o
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ifeq ($(CONFIG_DRM_I915_GVT),y)
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i915-y += intel_gvt.o
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@ -0,0 +1,40 @@
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/*
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* Autogenerated file by GPU Top : https://github.com/rib/gputop
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* DO NOT EDIT manually!
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*
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*
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* Copyright (c) 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef __I915_OA_KBLGT2_H__
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#define __I915_OA_KBLGT2_H__
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extern int i915_oa_n_builtin_metric_sets_kblgt2;
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extern int i915_oa_select_metric_set_kblgt2(struct drm_i915_private *dev_priv);
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extern int i915_perf_register_sysfs_kblgt2(struct drm_i915_private *dev_priv);
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extern void i915_perf_unregister_sysfs_kblgt2(struct drm_i915_private *dev_priv);
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#endif
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/*
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* Autogenerated file by GPU Top : https://github.com/rib/gputop
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* DO NOT EDIT manually!
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*
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*
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* Copyright (c) 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef __I915_OA_KBLGT3_H__
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#define __I915_OA_KBLGT3_H__
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extern int i915_oa_n_builtin_metric_sets_kblgt3;
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extern int i915_oa_select_metric_set_kblgt3(struct drm_i915_private *dev_priv);
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extern int i915_perf_register_sysfs_kblgt3(struct drm_i915_private *dev_priv);
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extern void i915_perf_unregister_sysfs_kblgt3(struct drm_i915_private *dev_priv);
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#endif
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@ -202,6 +202,8 @@
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#include "i915_oa_sklgt3.h"
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#include "i915_oa_sklgt4.h"
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#include "i915_oa_bxt.h"
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#include "i915_oa_kblgt2.h"
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#include "i915_oa_kblgt3.h"
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/* HW requires this to be a power of two, between 128k and 16M, though driver
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* is currently generally designed assuming the largest 16M size is used such
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@ -1802,7 +1804,8 @@ static int gen8_enable_metric_set(struct drm_i915_private *dev_priv)
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* be read back from automatically triggered reports, as part of the
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* RPT_ID field.
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*/
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if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv)) {
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if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
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IS_KABYLAKE(dev_priv)) {
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I915_WRITE(GEN8_OA_DEBUG,
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_MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
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GEN9_OA_DEBUG_INCLUDE_CLK_RATIO));
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@ -2887,6 +2890,15 @@ void i915_perf_register(struct drm_i915_private *dev_priv)
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} else if (IS_BROXTON(dev_priv)) {
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if (i915_perf_register_sysfs_bxt(dev_priv))
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goto sysfs_error;
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} else if (IS_KABYLAKE(dev_priv)) {
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if (IS_KBL_GT2(dev_priv)) {
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if (i915_perf_register_sysfs_kblgt2(dev_priv))
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goto sysfs_error;
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} else if (IS_KBL_GT3(dev_priv)) {
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if (i915_perf_register_sysfs_kblgt3(dev_priv))
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goto sysfs_error;
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} else
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goto sysfs_error;
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}
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goto exit;
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@ -2928,6 +2940,12 @@ void i915_perf_unregister(struct drm_i915_private *dev_priv)
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i915_perf_unregister_sysfs_sklgt4(dev_priv);
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} else if (IS_BROXTON(dev_priv))
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i915_perf_unregister_sysfs_bxt(dev_priv);
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else if (IS_KABYLAKE(dev_priv)) {
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if (IS_KBL_GT2(dev_priv))
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i915_perf_unregister_sysfs_kblgt2(dev_priv);
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else if (IS_KBL_GT3(dev_priv))
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i915_perf_unregister_sysfs_kblgt3(dev_priv);
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}
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kobject_put(dev_priv->perf.metrics_kobj);
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dev_priv->perf.metrics_kobj = NULL;
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@ -3061,6 +3079,16 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
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i915_oa_n_builtin_metric_sets_bxt;
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dev_priv->perf.oa.ops.select_metric_set =
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i915_oa_select_metric_set_bxt;
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} else if (IS_KBL_GT2(dev_priv)) {
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dev_priv->perf.oa.n_builtin_sets =
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i915_oa_n_builtin_metric_sets_kblgt2;
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dev_priv->perf.oa.ops.select_metric_set =
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i915_oa_select_metric_set_kblgt2;
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} else if (IS_KBL_GT3(dev_priv)) {
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dev_priv->perf.oa.n_builtin_sets =
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i915_oa_n_builtin_metric_sets_kblgt3;
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dev_priv->perf.oa.ops.select_metric_set =
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i915_oa_select_metric_set_kblgt3;
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}
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}
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