b43: Add LP-PHY baseband init for >=rev2
This adds code for the baseband init of LP-PHY >=2. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -6,6 +6,7 @@ b43-y += phy_g.o
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b43-y += phy_a.o
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b43-$(CONFIG_B43_NPHY) += phy_n.o
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b43-$(CONFIG_B43_PHY_LP) += phy_lp.o
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b43-$(CONFIG_B43_PHY_LP) += tables_lpphy.o
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b43-y += sysfs.o
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b43-y += xmit.o
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b43-y += lo.o
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@ -3,7 +3,7 @@
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Broadcom B43 wireless driver
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IEEE 802.11g LP-PHY driver
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Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
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Copyright (c) 2008-2009 Michael Buesch <mb@bu3sch.de>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -25,6 +25,7 @@
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#include "b43.h"
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#include "phy_lp.h"
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#include "phy_common.h"
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#include "tables_lpphy.h"
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static int b43_lpphy_op_allocate(struct b43_wldev *dev)
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@ -69,7 +70,80 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
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static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
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{
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//TODO
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struct b43_phy_lp *lpphy = dev->phy.lp;
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b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
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b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0x8800);
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b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0);
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b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0);
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b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0);
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b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0);
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b43_phy_write(dev, B43_PHY_OFDM(0xF9), 0);
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b43_phy_write(dev, B43_LPPHY_TR_LOOKUP_1, 0);
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b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10);
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b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0x78);
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b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xF8FF, 0x200);
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b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xFF00, 0x7F);
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b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFF0F, 0x40);
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b43_phy_maskset(dev, B43_LPPHY_PREAMBLECONFIRMTO, 0xFF00, 0x2);
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b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000);
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b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000);
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b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
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b43_phy_maskset(dev, B43_LPPHY_CCKLMSSTEPSIZE, 0xFF01, 0x10);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100);//FIXME specs are different
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b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48);
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b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0xFF00, 0x46);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xE4), 0xFF00, 0x10);
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b43_phy_maskset(dev, B43_LPPHY_PWR_THRESH1, 0xFFF0, 0x9);
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b43_phy_mask(dev, B43_LPPHY_GAINDIRECTMISMATCH, ~0xF);
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b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5500);
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b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0);
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b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300);
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b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00);
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b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00);
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b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
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b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0x03FF, 0x3C00);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFC1F, 0x3E0);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
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b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0x00FF, 0x1900);
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b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800);
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b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12);
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b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000);
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if (dev->phy.rev < 2) {
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//FIXME this will never execute.
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//FIXME 32bit?
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b43_lptab_write(dev, B43_LPTAB32(0x11, 0x14), 0);
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b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
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} else {
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//FIXME 32bit?
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b43_lptab_write(dev, B43_LPTAB32(0x08, 0x14), 0);
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b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
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}
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0xB00);
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b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x6);
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b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0x9D00);
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b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0xFF00, 0xA1);
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} else /* 5GHz */
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b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x40);
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b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0xB3);
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b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00);
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b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, 0xFF00, lpphy->rx_pwr_offset);
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b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44);
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b43_phy_write(dev, B43_LPPHY_RESET_CTL, 0x80);
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b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, 0xA954);
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b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_1,
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0x2000 | ((u16)lpphy->rssi_gs << 10) |
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((u16)lpphy->rssi_vc << 4) | lpphy->rssi_vf);
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}
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static void lpphy_baseband_init(struct b43_wldev *dev)
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@ -803,7 +803,47 @@
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struct b43_phy_lp {
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//TODO
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/* Transmit isolation medium band */
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u8 tx_isolation_med_band; /* FIXME initial value? */
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/* Transmit isolation low band */
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u8 tx_isolation_low_band; /* FIXME initial value? */
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/* Transmit isolation high band */
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u8 tx_isolation_hi_band; /* FIXME initial value? */
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/* Receive power offset */
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u8 rx_pwr_offset; /* FIXME initial value? */
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/* TSSI transmit count */
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u16 tssi_tx_count; /* FIXME initial value? */
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/* TSSI index */
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u16 tssi_idx; /* FIXME initial value? */
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/* TSSI npt */
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u16 tssi_npt; /* FIXME initial value? */
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/* Target TX frequency */
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u16 tgt_tx_freq; /* FIXME initial value? */
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/* Transmit power index override */
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s8 tx_pwr_idx_over; /* FIXME initial value? */
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/* RSSI vf */
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u8 rssi_vf; /* FIXME initial value? */
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/* RSSI vc */
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u8 rssi_vc; /* FIXME initial value? */
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/* RSSI gs */
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u8 rssi_gs; /* FIXME initial value? */
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/* RC cap */
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u8 rc_cap; /* FIXME initial value? */
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/* BX arch */
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u8 bx_arch; /* FIXME initial value? */
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/* Full calibration channel */
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u8 full_calib_chan; /* FIXME initial value? */
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/* Transmit iqlocal best coeffs */
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bool tx_iqloc_best_coeffs_valid;
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u8 tx_iqloc_best_coeffs[11];
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};
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@ -0,0 +1,89 @@
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/*
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Broadcom B43 wireless driver
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IEEE 802.11g LP-PHY and radio device data tables
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Copyright (c) 2009 Michael Buesch <mb@bu3sch.de>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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#include "b43.h"
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#include "tables_lpphy.h"
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#include "phy_common.h"
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#include "phy_lp.h"
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u32 b43_lptab_read(struct b43_wldev *dev, u32 offset)
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{
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u32 type, value;
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type = offset & B43_LPTAB_TYPEMASK;
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offset &= ~B43_LPTAB_TYPEMASK;
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B43_WARN_ON(offset > 0xFFFF);
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switch (type) {
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case B43_LPTAB_8BIT:
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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value = b43_phy_read(dev, B43_LPPHY_TABLEDATALO) & 0xFF;
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break;
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case B43_LPTAB_16BIT:
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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value = b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
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break;
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case B43_LPTAB_32BIT:
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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value = b43_phy_read(dev, B43_LPPHY_TABLEDATAHI);
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value <<= 16;
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value |= b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
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break;
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default:
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B43_WARN_ON(1);
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value = 0;
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}
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return value;
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}
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void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value)
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{
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u32 type;
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type = offset & B43_LPTAB_TYPEMASK;
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offset &= ~B43_LPTAB_TYPEMASK;
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B43_WARN_ON(offset > 0xFFFF);
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switch (type) {
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case B43_LPTAB_8BIT:
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B43_WARN_ON(value & ~0xFF);
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
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break;
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case B43_LPTAB_16BIT:
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B43_WARN_ON(value & ~0xFFFF);
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
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break;
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case B43_LPTAB_32BIT:
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b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
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b43_phy_write(dev, B43_LPPHY_TABLEDATAHI, value >> 16);
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b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
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break;
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default:
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B43_WARN_ON(1);
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}
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}
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@ -0,0 +1,21 @@
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#ifndef B43_TABLES_LPPHY_H_
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#define B43_TABLES_LPPHY_H_
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#define B43_LPTAB_TYPEMASK 0xF0000000
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#define B43_LPTAB_8BIT 0x10000000
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#define B43_LPTAB_16BIT 0x20000000
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#define B43_LPTAB_32BIT 0x30000000
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#define B43_LPTAB8(table, offset) (((table) << 10) | (offset) | B43_LPTAB_8BIT)
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#define B43_LPTAB16(table, offset) (((table) << 10) | (offset) | B43_LPTAB_16BIT)
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#define B43_LPTAB32(table, offset) (((table) << 10) | (offset) | B43_LPTAB_32BIT)
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/* Table definitions */
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#define B43_LPTAB_TXPWR_R2PLUS B43_LPTAB32(0x07, 0) /* TX power lookup table (rev >= 2) */
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#define B43_LPTAB_TXPWR_R0_1 B43_LPTAB32(0xA0, 0) /* TX power lookup table (rev < 2) */
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u32 b43_lptab_read(struct b43_wldev *dev, u32 offset);
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void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value);
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#endif /* B43_TABLES_LPPHY_H_ */
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