UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

ASoC: dt-bindings: fsl-sai: Add two PLL clock source 

Add two PLL clock source, they are the parent clocks of root clock
one is for 8kHz series rates, another one is for 11kHz series rates.
They are optional clocks, if there are such clocks, then driver
can switch between them for supporting more accurate rates.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1656667961-1799-7-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Shengjiu Wang 2022-07-01 17:32:41 +08:00 committed by Mark Brown
parent df0835a810
commit 6c06ad34ed
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/sound/fsl-sai.txt
View File

@ -21,6 +21,9 @@ Required properties:
- clock-names : Must include the "bus" for register access and - clock-names : Must include the "bus" for register access and
"mclk1", "mclk2", "mclk3" for bit clock and frame "mclk1", "mclk2", "mclk3" for bit clock and frame
clock providing. clock providing.
"pll8k", "pll11k" are optional, they are the clock
source for root clock, one is for 8kHz series rates
another one is for 11kHz series rates.
- dmas : Generic dma devicetree binding as described in - dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt. Documentation/devicetree/bindings/dma/dma.txt.