drm/amdgpu/gfx10: add support for sienna_cichlid firmware
Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -89,6 +89,13 @@ MODULE_FIRMWARE("amdgpu/navi12_mec.bin");
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MODULE_FIRMWARE("amdgpu/navi12_mec2.bin");
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MODULE_FIRMWARE("amdgpu/navi12_rlc.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_ce.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_pfp.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_me.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_mec.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_mec2.bin");
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MODULE_FIRMWARE("amdgpu/sienna_cichlid_rlc.bin");
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static const struct soc15_reg_golden golden_settings_gc_10_1[] =
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{
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SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x00400014),
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@ -3463,6 +3470,9 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
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case CHIP_NAVI12:
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chip_name = "navi12";
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break;
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case CHIP_SIENNA_CICHLID:
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chip_name = "sienna_cichlid";
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break;
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default:
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BUG();
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}
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