dt-bindings: Add bindings for USB3 phy on Allwinner H6

The new Allwinner H6 SoC contains a USB3 PHY that is wired to the
external USB3 pins of the SoC.

Add a device tree binding for the PHY.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Ondrej Jirman 2019-10-29 21:17:38 +01:00 committed by Kishon Vijay Abraham I
parent a88c85ee2e
commit 6bd03e7113
1 changed files with 47 additions and 0 deletions

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Ondrej Jirman <megous@megous.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Allwinner H6 USB3 PHY
maintainers:
- Ondrej Jirman <megous@megous.com>
properties:
compatible:
enum:
- allwinner,sun50i-h6-usb3-phy
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
"#phy-cells":
const: 0
required:
- compatible
- reg
- clocks
- resets
- "#phy-cells"
examples:
- |
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
phy@5210000 {
compatible = "allwinner,sun50i-h6-usb3-phy";
reg = <0x5210000 0x10000>;
clocks = <&ccu CLK_USB_PHY1>;
resets = <&ccu RST_USB_PHY1>;
#phy-cells = <0>;
};