MIPS: generic: Add support for Microsemi Ocelot
Introduce support for the MIPS based Microsemi Ocelot SoCs. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18858/ [jhogan@kernel.org: update ocelot_defconfig specification] Signed-off-by: James Hogan <jhogan@kernel.org>
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6b36d31a8a
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arch/mips
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@ -565,6 +565,9 @@ generic_defconfig:
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# now that the boards have been converted to use the generic kernel they are
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# now that the boards have been converted to use the generic kernel they are
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# wrappers around the generic rules above.
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# wrappers around the generic rules above.
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#
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#
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legacy_defconfigs += ocelot_defconfig
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ocelot_defconfig-y := 32r2el_defconfig BOARDS=ocelot
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legacy_defconfigs += sead3_defconfig
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legacy_defconfigs += sead3_defconfig
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sead3_defconfig-y := 32r2el_defconfig BOARDS=sead-3
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sead3_defconfig-y := 32r2el_defconfig BOARDS=sead-3
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@ -0,0 +1,35 @@
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# require CONFIG_CPU_MIPS32_R2=y
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CONFIG_LEGACY_BOARD_OCELOT=y
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_M25P80=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_MUX=y
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CONFIG_SPI=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_DESIGNWARE=y
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CONFIG_SPI_SPIDEV=y
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CONFIG_POWER_RESET=y
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CONFIG_POWER_RESET_OCELOT_RESET=y
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CONFIG_MAGIC_SYSRQ=y
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@ -27,6 +27,22 @@ config LEGACY_BOARD_SEAD3
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Enable this to include support for booting on MIPS SEAD-3 FPGA-based
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Enable this to include support for booting on MIPS SEAD-3 FPGA-based
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development boards, which boot using a legacy boot protocol.
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development boards, which boot using a legacy boot protocol.
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comment "MSCC Ocelot doesn't work with SEAD3 enabled"
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depends on LEGACY_BOARD_SEAD3
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config LEGACY_BOARD_OCELOT
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bool "Support MSCC Ocelot boards"
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depends on LEGACY_BOARD_SEAD3=n
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select LEGACY_BOARDS
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select MSCC_OCELOT
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config MSCC_OCELOT
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bool
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select GPIOLIB
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select MSCC_OCELOT_IRQ
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select SYS_HAS_EARLY_PRINTK
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select USE_GENERIC_EARLY_PRINTK_8250
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comment "FIT/UHI Boards"
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comment "FIT/UHI Boards"
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config FIT_IMAGE_FDT_BOSTON
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config FIT_IMAGE_FDT_BOSTON
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@ -14,5 +14,6 @@ obj-y += proc.o
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obj-$(CONFIG_YAMON_DT_SHIM) += yamon-dt.o
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obj-$(CONFIG_YAMON_DT_SHIM) += yamon-dt.o
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obj-$(CONFIG_LEGACY_BOARD_SEAD3) += board-sead3.o
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obj-$(CONFIG_LEGACY_BOARD_SEAD3) += board-sead3.o
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obj-$(CONFIG_LEGACY_BOARD_OCELOT) += board-ocelot.o
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obj-$(CONFIG_KEXEC) += kexec.o
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obj-$(CONFIG_KEXEC) += kexec.o
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obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o
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obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o
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@ -0,0 +1,78 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Microsemi MIPS SoC support
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*
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#include <asm/machine.h>
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#include <asm/prom.h>
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#define DEVCPU_GCB_CHIP_REGS_CHIP_ID 0x71070000
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#define CHIP_ID_PART_ID GENMASK(27, 12)
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#define OCELOT_PART_ID (0x7514 << 12)
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#define UART_UART 0x70100000
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static __init bool ocelot_detect(void)
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{
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u32 rev;
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int idx;
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/* Look for the TLB entry set up by redboot before trying to use it */
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write_c0_entryhi(DEVCPU_GCB_CHIP_REGS_CHIP_ID);
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mtc0_tlbw_hazard();
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tlb_probe();
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tlb_probe_hazard();
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idx = read_c0_index();
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if (idx < 0)
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return 0;
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/* A TLB entry exists, lets assume its usable and check the CHIP ID */
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rev = __raw_readl((void __iomem *)DEVCPU_GCB_CHIP_REGS_CHIP_ID);
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if ((rev & CHIP_ID_PART_ID) != OCELOT_PART_ID)
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return 0;
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/* Copy command line from bootloader early for Initrd detection */
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if (fw_arg0 < 10 && (fw_arg1 & 0xFFF00000) == 0x80000000) {
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unsigned int prom_argc = fw_arg0;
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const char **prom_argv = (const char **)fw_arg1;
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if (prom_argc > 1 && strlen(prom_argv[1]) > 0)
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/* ignore all built-in args if any f/w args given */
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strcpy(arcs_cmdline, prom_argv[1]);
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}
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return 1;
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}
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static void __init ocelot_earlyprintk_init(void)
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{
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void __iomem *uart_base;
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uart_base = ioremap_nocache(UART_UART, 0x20);
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setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000);
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}
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static void __init ocelot_late_init(void)
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{
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ocelot_earlyprintk_init();
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}
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static __init const void *ocelot_fixup_fdt(const void *fdt,
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const void *match_data)
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{
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/* This has to be done so late because ioremap needs to work */
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late_time_init = ocelot_late_init;
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return fdt;
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}
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extern char __dtb_ocelot_pcb123_begin[];
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MIPS_MACHINE(ocelot) = {
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.fdt = __dtb_ocelot_pcb123_begin,
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.fixup_fdt = ocelot_fixup_fdt,
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.detect = ocelot_detect,
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};
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