drm/nouveau/kms/nv50: separate out base/ovly channel usage bounds commit
This commit separates the calculation of EVO state from the commit, in order to make the same code useful for atomic modesetting. The legacy interfaces have been wrapped on top of them. We're no longer touching the overlay channel usage bounds as of this commit. The code to do so is in place for when overlay planes are added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -128,6 +128,10 @@ struct nv50_head_atom {
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u16 h;
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} base;
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struct {
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u8 cpp;
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} ovly;
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union {
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struct {
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bool core:1;
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@ -142,6 +146,8 @@ struct nv50_head_atom {
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bool curs:1;
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bool view:1;
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bool mode:1;
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bool base:1;
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bool ovly:1;
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};
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u16 mask;
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} set;
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@ -785,6 +791,65 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
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/******************************************************************************
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* Head
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*****************************************************************************/
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static void
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nv50_head_ovly(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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u32 bounds = 0;
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u32 *push;
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if (asyh->base.cpp) {
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switch (asyh->base.cpp) {
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case 8: bounds |= 0x00000500; break;
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case 4: bounds |= 0x00000300; break;
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case 2: bounds |= 0x00000100; break;
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default:
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WARN_ON(1);
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break;
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}
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bounds |= 0x00000001;
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}
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if ((push = evo_wait(core, 2))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA)
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evo_mthd(push, 0x0904 + head->base.index * 0x400, 1);
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else
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evo_mthd(push, 0x04d4 + head->base.index * 0x300, 1);
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evo_data(push, bounds);
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evo_kick(push, core);
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}
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}
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static void
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nv50_head_base(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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u32 bounds = 0;
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u32 *push;
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if (asyh->base.cpp) {
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switch (asyh->base.cpp) {
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case 8: bounds |= 0x00000500; break;
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case 4: bounds |= 0x00000300; break;
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case 2: bounds |= 0x00000100; break;
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case 1: bounds |= 0x00000000; break;
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default:
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WARN_ON(1);
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break;
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}
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bounds |= 0x00000001;
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}
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if ((push = evo_wait(core, 2))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA)
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evo_mthd(push, 0x0900 + head->base.index * 0x400, 1);
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else
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evo_mthd(push, 0x04d0 + head->base.index * 0x300, 1);
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evo_data(push, bounds);
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evo_kick(push, core);
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}
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}
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static void
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nv50_head_curs_clr(struct nv50_head *head)
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{
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@ -1018,6 +1083,8 @@ nv50_head_flush_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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if (asyh->set.core ) nv50_head_lut_set (head, asyh);
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if (asyh->set.core ) nv50_head_core_set(head, asyh);
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if (asyh->set.curs ) nv50_head_curs_set(head, asyh);
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if (asyh->set.base ) nv50_head_base (head, asyh);
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if (asyh->set.ovly ) nv50_head_ovly (head, asyh);
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}
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static void
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@ -1106,9 +1173,13 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
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asyh->core.pitch = ALIGN(asyh->core.w, 64) * 4;
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asyh->lut.handle = disp->mast.base.vram.handle;
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asyh->lut.offset = head->base.lut.nvbo->bo.offset;
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asyh->set.base = armh->base.cpp != asyh->base.cpp;
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asyh->set.ovly = armh->ovly.cpp != asyh->ovly.cpp;
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} else {
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asyh->core.visible = false;
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asyh->curs.visible = false;
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asyh->base.cpp = 0;
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asyh->ovly.cpp = 0;
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}
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if (!drm_atomic_crtc_needs_modeset(&asyh->state)) {
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@ -1491,7 +1562,6 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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struct nv50_mast *mast = nv50_mast(crtc->dev);
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct nouveau_connector *nv_connector;
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u32 *push;
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int ret;
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struct nv50_head *head = nv50_head(crtc);
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struct nv50_head_atom *asyh = &head->asy;
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@ -1508,20 +1578,6 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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nv50_head_flush_set(head, asyh);
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push = evo_wait(mast, 64);
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if (push) {
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0900 + (nv_crtc->index * 0x400), 2);
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evo_data(push, 0x00000311);
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evo_data(push, 0x00000100);
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} else {
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evo_mthd(push, 0x04d0 + (nv_crtc->index * 0x300), 2);
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evo_data(push, 0x00000311);
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evo_data(push, 0x00000100);
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}
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evo_kick(push, mast);
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}
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nv_connector = nouveau_crtc_connector_get(nv_crtc);
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nv50_crtc_set_dither(nv_crtc, false);
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nv50_crtc_set_scale(nv_crtc, false);
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