enic: provision for multiple Rx/Tx queues; prepare for RSS support
Provision for multiple Rx/Tx queues. Max of 8 WQs and 8 RQs. Max for completion queue is 8+8=16 and max for interrupt resources is 8+8+2. Add driver/firmware interface for setting up RSS secret key and indirection table. Signed-off-by: Scott Feldman <scofeldm@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -29,6 +29,7 @@
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#include "vnic_cq.h"
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#include "vnic_intr.h"
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#include "vnic_stats.h"
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#include "vnic_nic.h"
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#include "vnic_rss.h"
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#define DRV_NAME "enic"
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@ -42,17 +43,20 @@
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#define ENIC_BARS_MAX 6
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#define ENIC_WQ_MAX 8
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#define ENIC_RQ_MAX 8
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#define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX)
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#define ENIC_INTR_MAX (ENIC_CQ_MAX + 2)
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enum enic_cq_index {
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ENIC_CQ_RQ,
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ENIC_CQ_WQ,
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ENIC_CQ_MAX,
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};
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enum enic_intx_intr_index {
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ENIC_INTX_WQ_RQ,
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ENIC_INTX_ERR,
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ENIC_INTX_NOTIFY,
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ENIC_INTX_MAX,
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};
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enum enic_msix_intr_index {
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@ -90,13 +94,13 @@ struct enic {
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u32 port_mtu;
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/* work queue cache line section */
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____cacheline_aligned struct vnic_wq wq[1];
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spinlock_t wq_lock[1];
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____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
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spinlock_t wq_lock[ENIC_WQ_MAX];
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unsigned int wq_count;
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struct vlan_group *vlan_group;
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/* receive queue cache line section */
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____cacheline_aligned struct vnic_rq rq[1];
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____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
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unsigned int rq_count;
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int (*rq_alloc_buf)(struct vnic_rq *rq);
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u64 rq_truncated_pkts;
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@ -106,7 +110,7 @@ struct enic {
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struct net_lro_desc lro_desc[ENIC_LRO_MAX_DESC];
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/* interrupt resource cache line section */
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____cacheline_aligned struct vnic_intr intr[ENIC_MSIX_MAX];
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____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
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unsigned int intr_count;
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u32 __iomem *legacy_pba; /* memory-mapped */
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@ -1586,7 +1586,7 @@ static int enic_set_niccfg(struct enic *enic)
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const u8 ig_vlan_strip_en = 1;
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/* Enable VLAN tag stripping. RSS not enabled (yet).
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*/
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*/
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return enic_set_nic_cfg(enic,
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rss_default_cpu, rss_hash_type,
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@ -1621,8 +1621,8 @@ static void enic_reset(struct work_struct *work)
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static int enic_set_intr_mode(struct enic *enic)
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{
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unsigned int n = ARRAY_SIZE(enic->rq);
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unsigned int m = ARRAY_SIZE(enic->wq);
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unsigned int n = 1;
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unsigned int m = 1;
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unsigned int i;
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/* Set interrupt mode (INTx, MSI, MSI-X) depending
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@ -156,6 +156,22 @@ int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
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return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
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}
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int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
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{
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u64 a0 = (u64)key_pa, a1 = len;
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int wait = 1000;
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return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
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}
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int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
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{
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u64 a0 = (u64)cpu_pa, a1 = len;
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int wait = 1000;
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return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
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}
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void enic_free_vnic_resources(struct enic *enic)
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{
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unsigned int i;
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@ -172,11 +188,18 @@ void enic_free_vnic_resources(struct enic *enic)
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void enic_get_res_counts(struct enic *enic)
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{
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enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
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enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
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enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
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enic->intr_count = vnic_dev_get_res_count(enic->vdev,
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RES_TYPE_INTR_CTRL);
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enic->wq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
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ENIC_WQ_MAX);
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enic->rq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
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ENIC_RQ_MAX);
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enic->cq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
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ENIC_CQ_MAX);
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enic->intr_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
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ENIC_INTR_MAX);
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printk(KERN_INFO PFX "vNIC resources avail: "
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"wq %d rq %d cq %d intr %d\n",
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@ -139,6 +139,8 @@ void enic_del_vlan(struct enic *enic, u16 vlanid);
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int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en);
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int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len);
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int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len);
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void enic_get_res_counts(struct enic *enic);
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void enic_init_vnic_resources(struct enic *enic);
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int enic_alloc_vnic_resources(struct enic *);
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@ -41,6 +41,13 @@
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#define NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD 1UL
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#define NIC_CFG_IG_VLAN_STRIP_EN_SHIFT 24
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#define NIC_CFG_RSS_HASH_TYPE_IPV4 (1 << 0)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 (1 << 1)
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#define NIC_CFG_RSS_HASH_TYPE_IPV6 (1 << 2)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 (1 << 3)
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#define NIC_CFG_RSS_HASH_TYPE_IPV6_EX (1 << 4)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX (1 << 5)
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static inline void vnic_set_nic_cfg(u32 *nic_cfg,
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u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu,
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