iommu/exynos: Support for device tree
This commit adds device tree support for System MMU. Also, system mmu handling is improved. Previously, an IOMMU domain is bound to a System MMU which is not correct. This patch binds an IOMMU domain with the master device of a System MMU. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Cho KyongHo
Joerg Roedel
parent
93e268dca8
commit
6b21a5db36
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@ -114,6 +114,8 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
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#define REG_PB1_SADDR 0x054
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#define REG_PB1_EADDR 0x058
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#define has_sysmmu(dev) (dev->archdata.iommu != NULL)
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static struct kmem_cache *lv2table_kmem_cache;
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static sysmmu_pte_t *section_entry(sysmmu_pte_t *pgtable, sysmmu_iova_t iova)
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@ -163,6 +165,16 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
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"UNKNOWN FAULT"
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};
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/* attached to dev.archdata.iommu of the master device */
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struct exynos_iommu_owner {
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struct list_head client; /* entry of exynos_iommu_domain.clients */
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struct device *dev;
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struct device *sysmmu;
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struct iommu_domain *domain;
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void *vmm_data; /* IO virtual memory manager's data */
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spinlock_t lock; /* Lock to preserve consistency of System MMU */
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};
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struct exynos_iommu_domain {
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struct list_head clients; /* list of sysmmu_drvdata.node */
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sysmmu_pte_t *pgtable; /* lv1 page table, 16KB */
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@ -172,9 +184,8 @@ struct exynos_iommu_domain {
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};
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struct sysmmu_drvdata {
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struct list_head node; /* entry of exynos_iommu_domain.clients */
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struct device *sysmmu; /* System MMU's device descriptor */
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struct device *dev; /* Owner of system MMU */
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struct device *master; /* Owner of system MMU */
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void __iomem *sfrbase;
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struct clk *clk;
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struct clk *clk_master;
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@ -243,7 +254,6 @@ static void __sysmmu_tlb_invalidate_entry(void __iomem *sfrbase,
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static void __sysmmu_set_ptbase(void __iomem *sfrbase,
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phys_addr_t pgd)
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{
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__raw_writel(0x1, sfrbase + REG_MMU_CFG); /* 16KB LV1, LRU */
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__raw_writel(pgd, sfrbase + REG_PT_BASE_ADDR);
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__sysmmu_tlb_invalidate(sfrbase);
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@ -305,7 +315,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
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itype, base, addr);
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if (data->domain)
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ret = report_iommu_fault(data->domain,
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data->dev, addr, itype);
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data->master, addr, itype);
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}
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/* fault is not recovered by fault handler */
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@ -323,120 +333,152 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static bool __exynos_sysmmu_disable(struct sysmmu_drvdata *data)
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static void __sysmmu_disable_nocount(struct sysmmu_drvdata *data)
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{
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unsigned long flags;
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bool disabled = false;
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spin_lock_irqsave(&data->lock, flags);
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if (!set_sysmmu_inactive(data))
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goto finish;
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if (!IS_ERR(data->clk_master))
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clk_enable(data->clk_master);
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__raw_writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
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__raw_writel(0, data->sfrbase + REG_MMU_CFG);
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clk_disable(data->clk);
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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}
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static bool __sysmmu_disable(struct sysmmu_drvdata *data)
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{
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bool disabled;
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unsigned long flags;
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spin_lock_irqsave(&data->lock, flags);
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disabled = set_sysmmu_inactive(data);
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if (disabled) {
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data->pgtable = 0;
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data->domain = NULL;
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__sysmmu_disable_nocount(data);
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dev_dbg(data->sysmmu, "Disabled\n");
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} else {
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dev_dbg(data->sysmmu, "%d times left to disable\n",
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data->activations);
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}
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disabled = true;
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data->pgtable = 0;
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data->domain = NULL;
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finish:
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spin_unlock_irqrestore(&data->lock, flags);
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if (disabled)
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dev_dbg(data->sysmmu, "Disabled\n");
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else
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dev_dbg(data->sysmmu, "%d times left to be disabled\n",
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data->activations);
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return disabled;
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}
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static void __sysmmu_init_config(struct sysmmu_drvdata *data)
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{
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unsigned int cfg = 0;
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__raw_writel(cfg, data->sfrbase + REG_MMU_CFG);
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}
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static void __sysmmu_enable_nocount(struct sysmmu_drvdata *data)
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{
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if (!IS_ERR(data->clk_master))
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clk_enable(data->clk_master);
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clk_enable(data->clk);
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__raw_writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
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__sysmmu_init_config(data);
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__sysmmu_set_ptbase(data->sfrbase, data->pgtable);
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__raw_writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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}
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static int __sysmmu_enable(struct sysmmu_drvdata *data,
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phys_addr_t pgtable, struct iommu_domain *domain)
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{
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int ret = 0;
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unsigned long flags;
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spin_lock_irqsave(&data->lock, flags);
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if (set_sysmmu_active(data)) {
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data->pgtable = pgtable;
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data->domain = domain;
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__sysmmu_enable_nocount(data);
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dev_dbg(data->sysmmu, "Enabled\n");
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} else {
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ret = (pgtable == data->pgtable) ? 1 : -EBUSY;
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dev_dbg(data->sysmmu, "already enabled\n");
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}
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if (WARN_ON(ret < 0))
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set_sysmmu_inactive(data); /* decrement count */
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spin_unlock_irqrestore(&data->lock, flags);
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return ret;
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}
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/* __exynos_sysmmu_enable: Enables System MMU
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*
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* returns -error if an error occurred and System MMU is not enabled,
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* 0 if the System MMU has been just enabled and 1 if System MMU was already
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* enabled before.
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*/
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static int __exynos_sysmmu_enable(struct sysmmu_drvdata *data,
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phys_addr_t pgtable, struct iommu_domain *domain)
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static int __exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable,
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struct iommu_domain *domain)
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{
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int ret = 0;
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unsigned long flags;
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct sysmmu_drvdata *data;
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spin_lock_irqsave(&data->lock, flags);
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BUG_ON(!has_sysmmu(dev));
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if (!set_sysmmu_active(data)) {
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if (WARN_ON(pgtable != data->pgtable)) {
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ret = -EBUSY;
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set_sysmmu_inactive(data);
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} else {
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ret = 1;
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}
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spin_lock_irqsave(&owner->lock, flags);
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dev_dbg(data->sysmmu, "Already enabled\n");
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goto finish;
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}
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data = dev_get_drvdata(owner->sysmmu);
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data->pgtable = pgtable;
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ret = __sysmmu_enable(data, pgtable, domain);
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if (ret >= 0)
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data->master = dev;
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if (!IS_ERR(data->clk_master))
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clk_enable(data->clk_master);
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clk_enable(data->clk);
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__sysmmu_set_ptbase(data->sfrbase, pgtable);
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__raw_writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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data->domain = domain;
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dev_dbg(data->sysmmu, "Enabled\n");
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finish:
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spin_unlock_irqrestore(&data->lock, flags);
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spin_unlock_irqrestore(&owner->lock, flags);
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return ret;
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}
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int exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable)
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{
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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int ret;
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BUG_ON(!memblock_is_memory(pgtable));
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ret = pm_runtime_get_sync(data->sysmmu);
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if (ret < 0) {
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dev_dbg(data->sysmmu, "Failed to enable\n");
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return ret;
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}
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ret = __exynos_sysmmu_enable(data, pgtable, NULL);
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if (WARN_ON(ret < 0)) {
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pm_runtime_put(data->sysmmu);
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dev_err(data->sysmmu, "Already enabled with page table %#x\n",
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data->pgtable);
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} else {
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data->dev = dev;
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}
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return ret;
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return __exynos_sysmmu_enable(dev, pgtable, NULL);
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}
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static bool exynos_sysmmu_disable(struct device *dev)
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{
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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bool disabled;
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unsigned long flags;
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bool disabled = true;
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct sysmmu_drvdata *data;
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disabled = __exynos_sysmmu_disable(data);
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pm_runtime_put(data->sysmmu);
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BUG_ON(!has_sysmmu(dev));
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spin_lock_irqsave(&owner->lock, flags);
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data = dev_get_drvdata(owner->sysmmu);
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disabled = __sysmmu_disable(data);
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if (disabled)
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data->master = NULL;
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spin_unlock_irqrestore(&owner->lock, flags);
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return disabled;
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}
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@ -444,11 +486,13 @@ static bool exynos_sysmmu_disable(struct device *dev)
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static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
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size_t size)
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{
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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unsigned long flags;
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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struct sysmmu_drvdata *data;
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data = dev_get_drvdata(owner->sysmmu);
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spin_lock_irqsave(&data->lock, flags);
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if (is_sysmmu_active(data)) {
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unsigned int maj;
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unsigned int num_inv = 1;
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@ -478,19 +522,21 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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} else {
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dev_dbg(data->sysmmu, "Disabled. Skipping invalidating TLB.\n");
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dev_dbg(dev, "disabled. Skipping TLB invalidation @ %#x\n",
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iova);
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}
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spin_unlock_irqrestore(&data->lock, flags);
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}
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void exynos_sysmmu_tlb_invalidate(struct device *dev)
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{
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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unsigned long flags;
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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struct sysmmu_drvdata *data;
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data = dev_get_drvdata(owner->sysmmu);
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spin_lock_irqsave(&data->lock, flags);
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if (is_sysmmu_active(data)) {
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if (!IS_ERR(data->clk_master))
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clk_enable(data->clk_master);
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@ -501,13 +547,12 @@ void exynos_sysmmu_tlb_invalidate(struct device *dev)
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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} else {
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dev_dbg(data->sysmmu, "Disabled. Skipping invalidating TLB.\n");
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dev_dbg(dev, "disabled. Skipping TLB invalidation\n");
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}
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spin_unlock_irqrestore(&data->lock, flags);
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}
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static int exynos_sysmmu_probe(struct platform_device *pdev)
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static int __init exynos_sysmmu_probe(struct platform_device *pdev)
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{
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int irq, ret;
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struct device *dev = &pdev->dev;
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@ -560,7 +605,6 @@ static int exynos_sysmmu_probe(struct platform_device *pdev)
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data->sysmmu = dev;
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spin_lock_init(&data->lock);
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INIT_LIST_HEAD(&data->node);
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platform_set_drvdata(pdev, data);
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@ -569,11 +613,17 @@ static int exynos_sysmmu_probe(struct platform_device *pdev)
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return 0;
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}
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static struct platform_driver exynos_sysmmu_driver = {
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.probe = exynos_sysmmu_probe,
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.driver = {
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static const struct of_device_id sysmmu_of_match[] __initconst = {
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{ .compatible = "samsung,exynos-sysmmu", },
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{ },
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};
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static struct platform_driver exynos_sysmmu_driver __refdata = {
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.probe = exynos_sysmmu_probe,
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.driver = {
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.owner = THIS_MODULE,
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.name = "exynos-sysmmu",
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.of_match_table = sysmmu_of_match,
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}
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};
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@ -625,7 +675,7 @@ err_pgtable:
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static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
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{
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struct exynos_iommu_domain *priv = domain->priv;
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struct sysmmu_drvdata *data;
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struct exynos_iommu_owner *owner;
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unsigned long flags;
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int i;
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@ -633,11 +683,14 @@ static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
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spin_lock_irqsave(&priv->lock, flags);
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list_for_each_entry(data, &priv->clients, node) {
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while (!exynos_sysmmu_disable(data->dev))
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list_for_each_entry(owner, &priv->clients, client) {
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while (!exynos_sysmmu_disable(owner->dev))
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; /* until System MMU is actually disabled */
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}
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while (!list_empty(&priv->clients))
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list_del_init(priv->clients.next);
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spin_unlock_irqrestore(&priv->lock, flags);
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for (i = 0; i < NUM_LV1ENTRIES; i++)
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@ -654,27 +707,18 @@ static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
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static int exynos_iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct exynos_iommu_domain *priv = domain->priv;
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phys_addr_t pagetable = virt_to_phys(priv->pgtable);
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unsigned long flags;
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int ret;
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ret = pm_runtime_get_sync(data->sysmmu);
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if (ret < 0)
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return ret;
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ret = 0;
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spin_lock_irqsave(&priv->lock, flags);
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ret = __exynos_sysmmu_enable(data, pagetable, domain);
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ret = __exynos_sysmmu_enable(dev, pagetable, domain);
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if (ret == 0) {
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/* 'data->node' must not be appeared in priv->clients */
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BUG_ON(!list_empty(&data->node));
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data->dev = dev;
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list_add_tail(&data->node, &priv->clients);
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list_add_tail(&owner->client, &priv->clients);
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owner->domain = domain;
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}
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spin_unlock_irqrestore(&priv->lock, flags);
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@ -682,7 +726,6 @@ static int exynos_iommu_attach_device(struct iommu_domain *domain,
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if (ret < 0) {
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dev_err(dev, "%s: Failed to attach IOMMU with pgtable %pa\n",
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__func__, &pagetable);
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pm_runtime_put(data->sysmmu);
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return ret;
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}
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@ -695,40 +738,30 @@ static int exynos_iommu_attach_device(struct iommu_domain *domain,
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static void exynos_iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu);
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struct exynos_iommu_owner *owner;
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struct exynos_iommu_domain *priv = domain->priv;
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struct list_head *pos;
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phys_addr_t pagetable = virt_to_phys(priv->pgtable);
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unsigned long flags;
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bool found = false;
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spin_lock_irqsave(&priv->lock, flags);
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||||
list_for_each(pos, &priv->clients) {
|
||||
if (list_entry(pos, struct sysmmu_drvdata, node) == data) {
|
||||
found = true;
|
||||
list_for_each_entry(owner, &priv->clients, client) {
|
||||
if (owner == dev->archdata.iommu) {
|
||||
if (exynos_sysmmu_disable(dev)) {
|
||||
list_del_init(&owner->client);
|
||||
owner->domain = NULL;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!found)
|
||||
goto finish;
|
||||
|
||||
if (__exynos_sysmmu_disable(data)) {
|
||||
dev_dbg(dev, "%s: Detached IOMMU with pgtable %pa\n",
|
||||
__func__, &pagetable);
|
||||
list_del_init(&data->node);
|
||||
|
||||
} else {
|
||||
dev_dbg(dev, "%s: Detaching IOMMU with pgtable %pa delayed",
|
||||
__func__, &pagetable);
|
||||
}
|
||||
|
||||
finish:
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
if (found)
|
||||
pm_runtime_put(data->sysmmu);
|
||||
if (owner == dev->archdata.iommu)
|
||||
dev_dbg(dev, "%s: Detached IOMMU with pgtable %pa\n",
|
||||
__func__, &pagetable);
|
||||
else
|
||||
dev_err(dev, "%s: No IOMMU is attached\n", __func__);
|
||||
}
|
||||
|
||||
static sysmmu_pte_t *alloc_lv2entry(sysmmu_pte_t *sent, sysmmu_iova_t iova,
|
||||
|
|
@ -855,7 +888,7 @@ static size_t exynos_iommu_unmap(struct iommu_domain *domain,
|
|||
unsigned long l_iova, size_t size)
|
||||
{
|
||||
struct exynos_iommu_domain *priv = domain->priv;
|
||||
struct sysmmu_drvdata *data;
|
||||
struct exynos_iommu_owner *owner;
|
||||
sysmmu_iova_t iova = (sysmmu_iova_t)l_iova;
|
||||
sysmmu_pte_t *ent;
|
||||
size_t err_pgsize;
|
||||
|
|
@ -917,8 +950,8 @@ done:
|
|||
spin_unlock_irqrestore(&priv->pgtablelock, flags);
|
||||
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
list_for_each_entry(data, &priv->clients, node)
|
||||
sysmmu_tlb_invalidate_entry(data->dev, iova, size);
|
||||
list_for_each_entry(owner, &priv->clients, client)
|
||||
sysmmu_tlb_invalidate_entry(owner->dev, iova, size);
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
return size;
|
||||
|
|
|
|||
Loading…
Reference in New Issue