ARM: dts: qcom: add missing clock configuration for kpss-acc-v1
Add missing clock configuration by adding clocks, clock-names, clock-output-names and #clock-cells bindings for each kpss-acc-v1 clock-controller to reflect Documentation schema. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230116204751.23045-7-ansuelsmth@gmail.com
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@ -388,21 +388,37 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu0_aux";
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#clock-cells = <0>;
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};
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu1_aux";
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#clock-cells = <0>;
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};
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acc2: clock-controller@20a8000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu2_aux";
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#clock-cells = <0>;
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};
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acc3: clock-controller@20b8000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu3_aux";
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#clock-cells = <0>;
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};
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saw0: power-controller@2089000 {
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@ -579,6 +579,10 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu0_aux";
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#clock-cells = <0>;
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};
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saw0: regulator@2089000 {
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@ -590,6 +594,10 @@
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu1_aux";
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#clock-cells = <0>;
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};
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saw1: regulator@2099000 {
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@ -207,11 +207,19 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu0_aux";
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#clock-cells = <0>;
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};
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
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clock-names = "pll8_vote", "pxo";
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clock-output-names = "acpu1_aux";
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#clock-cells = <0>;
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};
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saw0: regulator@2089000 {
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