drm/i915/dsc: clean up rc parameter table access
Use a simple pointer to the relevant element instead of duplicating the array subscription. No functional changes. Cc: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191104141439.26312-2-jani.nikula@intel.com
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@ -53,7 +53,7 @@ struct rc_parameters {
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* Selected Rate Control Related Parameter Recommended Values
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* from DSC_v1.11 spec & C Model release: DSC_model_20161212
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*/
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static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
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static const struct rc_parameters rc_parameters[][MAX_COLUMN_INDEX] = {
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{
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/* 6BPP/8BPC */
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{ 768, 15, 6144, 3, 13, 11, 11, {
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@ -319,14 +319,29 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
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}
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}
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static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
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u8 bits_per_component)
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{
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int row_index, column_index;
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row_index = get_row_index_for_rc_params(compressed_bpp);
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if (row_index < 0)
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return NULL;
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column_index = get_column_index_for_rc_params(bits_per_component);
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if (column_index < 0)
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return NULL;
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return &rc_parameters[row_index][column_index];
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}
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int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
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struct intel_crtc_state *pipe_config)
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{
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struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
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u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
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const struct rc_parameters *rc_params;
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u8 i = 0;
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int row_index = 0;
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int column_index = 0;
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u8 line_buf_depth = 0;
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vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
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@ -399,39 +414,29 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
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vdsc_cfg->rc_buf_thresh[13] = 0x7D;
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}
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row_index = get_row_index_for_rc_params(compressed_bpp);
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column_index =
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get_column_index_for_rc_params(vdsc_cfg->bits_per_component);
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if (row_index < 0 || column_index < 0)
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rc_params = get_rc_params(compressed_bpp, vdsc_cfg->bits_per_component);
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if (!rc_params)
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return -EINVAL;
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vdsc_cfg->first_line_bpg_offset =
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rc_params[row_index][column_index].first_line_bpg_offset;
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vdsc_cfg->initial_xmit_delay =
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rc_params[row_index][column_index].initial_xmit_delay;
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vdsc_cfg->initial_offset =
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rc_params[row_index][column_index].initial_offset;
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vdsc_cfg->flatness_min_qp =
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rc_params[row_index][column_index].flatness_min_qp;
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vdsc_cfg->flatness_max_qp =
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rc_params[row_index][column_index].flatness_max_qp;
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vdsc_cfg->rc_quant_incr_limit0 =
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rc_params[row_index][column_index].rc_quant_incr_limit0;
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vdsc_cfg->rc_quant_incr_limit1 =
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rc_params[row_index][column_index].rc_quant_incr_limit1;
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vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset;
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vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay;
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vdsc_cfg->initial_offset = rc_params->initial_offset;
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vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp;
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vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp;
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vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0;
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vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1;
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for (i = 0; i < DSC_NUM_BUF_RANGES; i++) {
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vdsc_cfg->rc_range_params[i].range_min_qp =
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rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
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rc_params->rc_range_params[i].range_min_qp;
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vdsc_cfg->rc_range_params[i].range_max_qp =
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rc_params[row_index][column_index].rc_range_params[i].range_max_qp;
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rc_params->rc_range_params[i].range_max_qp;
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/*
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* Range BPG Offset uses 2's complement and is only a 6 bits. So
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* mask it to get only 6 bits.
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*/
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vdsc_cfg->rc_range_params[i].range_bpg_offset =
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rc_params[row_index][column_index].rc_range_params[i].range_bpg_offset &
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rc_params->rc_range_params[i].range_bpg_offset &
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DSC_RANGE_BPG_OFFSET_MASK;
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}
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