serial: mpc52xx_uart: re-enable mpc5121 PSC UART support
Currently the support for MPC5121 PSC UART in the mpc52xx_uart driver is broken (only console pre-initialized by the bootloader works). Re-enable it now by providing MPC5121 specific ops for PSCx clock activation, FIFO controller init/uninit and MPC5121 PSC FIFO shared interrupt handling functions. Signed-off-by: John Rigby <jcrigby@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Anatolij Gustschin
Grant Likely
parent
cf24dae146
commit
6acc683351
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@ -74,6 +74,7 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/clk.h>
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#include <asm/mpc52xx.h>
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#include <asm/mpc52xx_psc.h>
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@ -113,6 +114,7 @@ static void mpc52xx_uart_of_enumerate(void);
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/* Forward declaration of the interruption handling routine */
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static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
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static irqreturn_t mpc5xxx_uart_process_int(struct uart_port *port);
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/* Simple macro to test if a port is console or not. This one is taken
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@ -145,6 +147,11 @@ struct psc_ops {
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void (*cw_disable_ints)(struct uart_port *port);
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void (*cw_restore_ints)(struct uart_port *port);
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unsigned long (*getuartclk)(void *p);
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int (*clock)(struct uart_port *port, int enable);
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int (*fifoc_init)(void);
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void (*fifoc_uninit)(void);
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void (*get_irq)(struct uart_port *, struct device_node *);
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irqreturn_t (*handle_irq)(struct uart_port *port);
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};
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#ifdef CONFIG_PPC_MPC52xx
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@ -256,6 +263,18 @@ static unsigned long mpc52xx_getuartclk(void *p)
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return mpc5xxx_get_bus_frequency(p) / 2;
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}
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static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np)
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{
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port->irqflags = IRQF_DISABLED;
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port->irq = irq_of_parse_and_map(np, 0);
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}
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/* 52xx specific interrupt handler. The caller holds the port lock */
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static irqreturn_t mpc52xx_psc_handle_irq(struct uart_port *port)
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{
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return mpc5xxx_uart_process_int(port);
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}
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static struct psc_ops mpc52xx_psc_ops = {
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.fifo_init = mpc52xx_psc_fifo_init,
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.raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
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@ -273,14 +292,32 @@ static struct psc_ops mpc52xx_psc_ops = {
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.cw_disable_ints = mpc52xx_psc_cw_disable_ints,
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.cw_restore_ints = mpc52xx_psc_cw_restore_ints,
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.getuartclk = mpc52xx_getuartclk,
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.get_irq = mpc52xx_psc_get_irq,
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.handle_irq = mpc52xx_psc_handle_irq,
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};
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#endif /* CONFIG_MPC52xx */
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#ifdef CONFIG_PPC_MPC512x
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#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
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/* PSC FIFO Controller for mpc512x */
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struct psc_fifoc {
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u32 fifoc_cmd;
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u32 fifoc_int;
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u32 fifoc_dma;
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u32 fifoc_axe;
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u32 fifoc_debug;
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};
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static struct psc_fifoc __iomem *psc_fifoc;
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static unsigned int psc_fifoc_irq;
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static void mpc512x_psc_fifo_init(struct uart_port *port)
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{
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/* /32 prescaler */
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out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00);
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out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
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out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
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out_be32(&FIFO_512x(port)->txalarm, 1);
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@ -393,6 +430,160 @@ static unsigned long mpc512x_getuartclk(void *p)
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return mpc5xxx_get_bus_frequency(p);
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}
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#define DEFAULT_FIFO_SIZE 16
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static unsigned int __init get_fifo_size(struct device_node *np,
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char *fifo_name)
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{
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const unsigned int *fp;
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fp = of_get_property(np, fifo_name, NULL);
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if (fp)
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return *fp;
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pr_warning("no %s property in %s node, defaulting to %d\n",
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fifo_name, np->full_name, DEFAULT_FIFO_SIZE);
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return DEFAULT_FIFO_SIZE;
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}
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#define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \
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((u32)(_base) + sizeof(struct mpc52xx_psc)))
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/* Init PSC FIFO Controller */
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static int __init mpc512x_psc_fifoc_init(void)
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{
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struct device_node *np;
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void __iomem *psc;
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unsigned int tx_fifo_size;
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unsigned int rx_fifo_size;
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int fifobase = 0; /* current fifo address in 32 bit words */
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np = of_find_compatible_node(NULL, NULL,
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"fsl,mpc5121-psc-fifo");
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if (!np) {
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pr_err("%s: Can't find FIFOC node\n", __func__);
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return -ENODEV;
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}
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psc_fifoc = of_iomap(np, 0);
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if (!psc_fifoc) {
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pr_err("%s: Can't map FIFOC\n", __func__);
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return -ENODEV;
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}
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psc_fifoc_irq = irq_of_parse_and_map(np, 0);
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of_node_put(np);
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if (psc_fifoc_irq == NO_IRQ) {
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pr_err("%s: Can't get FIFOC irq\n", __func__);
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iounmap(psc_fifoc);
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return -ENODEV;
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}
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for_each_compatible_node(np, NULL, "fsl,mpc5121-psc-uart") {
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tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
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rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
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/* size in register is in 4 byte units */
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tx_fifo_size /= 4;
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rx_fifo_size /= 4;
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if (!tx_fifo_size)
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tx_fifo_size = 1;
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if (!rx_fifo_size)
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rx_fifo_size = 1;
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psc = of_iomap(np, 0);
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if (!psc) {
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pr_err("%s: Can't map %s device\n",
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__func__, np->full_name);
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continue;
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}
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/* FIFO space is 4KiB, check if requested size is available */
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if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) {
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pr_err("%s: no fifo space available for %s\n",
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__func__, np->full_name);
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iounmap(psc);
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/*
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* chances are that another device requests less
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* fifo space, so we continue.
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*/
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continue;
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}
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/* set tx and rx fifo size registers */
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out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size);
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fifobase += tx_fifo_size;
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out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size);
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fifobase += rx_fifo_size;
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/* reset and enable the slices */
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out_be32(&FIFOC(psc)->txcmd, 0x80);
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out_be32(&FIFOC(psc)->txcmd, 0x01);
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out_be32(&FIFOC(psc)->rxcmd, 0x80);
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out_be32(&FIFOC(psc)->rxcmd, 0x01);
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iounmap(psc);
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}
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return 0;
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}
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static void __exit mpc512x_psc_fifoc_uninit(void)
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{
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iounmap(psc_fifoc);
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}
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/* 512x specific interrupt handler. The caller holds the port lock */
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static irqreturn_t mpc512x_psc_handle_irq(struct uart_port *port)
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{
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unsigned long fifoc_int;
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int psc_num;
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/* Read pending PSC FIFOC interrupts */
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fifoc_int = in_be32(&psc_fifoc->fifoc_int);
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/* Check if it is an interrupt for this port */
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psc_num = (port->mapbase & 0xf00) >> 8;
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if (test_bit(psc_num, &fifoc_int) ||
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test_bit(psc_num + 16, &fifoc_int))
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return mpc5xxx_uart_process_int(port);
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return IRQ_NONE;
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}
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static int mpc512x_psc_clock(struct uart_port *port, int enable)
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{
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struct clk *psc_clk;
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int psc_num;
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char clk_name[10];
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if (uart_console(port))
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return 0;
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psc_num = (port->mapbase & 0xf00) >> 8;
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snprintf(clk_name, sizeof(clk_name), "psc%d_clk", psc_num);
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psc_clk = clk_get(port->dev, clk_name);
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if (IS_ERR(psc_clk)) {
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dev_err(port->dev, "Failed to get PSC clock entry!\n");
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return -ENODEV;
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}
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dev_dbg(port->dev, "%s %sable\n", clk_name, enable ? "en" : "dis");
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if (enable)
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clk_enable(psc_clk);
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else
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clk_disable(psc_clk);
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return 0;
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}
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static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np)
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{
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port->irqflags = IRQF_SHARED;
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port->irq = psc_fifoc_irq;
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}
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static struct psc_ops mpc512x_psc_ops = {
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.fifo_init = mpc512x_psc_fifo_init,
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.raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
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@ -410,6 +601,11 @@ static struct psc_ops mpc512x_psc_ops = {
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.cw_disable_ints = mpc512x_psc_cw_disable_ints,
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.cw_restore_ints = mpc512x_psc_cw_restore_ints,
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.getuartclk = mpc512x_getuartclk,
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.clock = mpc512x_psc_clock,
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.fifoc_init = mpc512x_psc_fifoc_init,
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.fifoc_uninit = mpc512x_psc_fifoc_uninit,
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.get_irq = mpc512x_psc_get_irq,
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.handle_irq = mpc512x_psc_handle_irq,
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};
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#endif
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@ -519,10 +715,15 @@ mpc52xx_uart_startup(struct uart_port *port)
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struct mpc52xx_psc __iomem *psc = PSC(port);
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int ret;
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if (psc_ops->clock) {
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ret = psc_ops->clock(port, 1);
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if (ret)
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return ret;
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}
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/* Request IRQ */
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ret = request_irq(port->irq, mpc52xx_uart_int,
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IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
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"mpc52xx_psc_uart", port);
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port->irqflags, "mpc52xx_psc_uart", port);
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if (ret)
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return ret;
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@ -553,6 +754,9 @@ mpc52xx_uart_shutdown(struct uart_port *port)
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port->read_status_mask = 0;
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out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
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if (psc_ops->clock)
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psc_ops->clock(port, 0);
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/* Release interrupt */
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free_irq(port->irq, port);
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}
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@ -851,15 +1055,12 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
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}
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static irqreturn_t
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mpc52xx_uart_int(int irq, void *dev_id)
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mpc5xxx_uart_process_int(struct uart_port *port)
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{
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struct uart_port *port = dev_id;
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unsigned long pass = ISR_PASS_LIMIT;
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unsigned int keepgoing;
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u8 status;
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spin_lock(&port->lock);
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/* While we have stuff to do, we continue */
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do {
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/* If we don't find anything to do, we stop */
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@ -886,11 +1087,23 @@ mpc52xx_uart_int(int irq, void *dev_id)
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} while (keepgoing);
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spin_unlock(&port->lock);
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return IRQ_HANDLED;
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}
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static irqreturn_t
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mpc52xx_uart_int(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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irqreturn_t ret;
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spin_lock(&port->lock);
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ret = psc_ops->handle_irq(port);
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spin_unlock(&port->lock);
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return ret;
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}
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/* ======================================================================== */
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/* Console ( if applicable ) */
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@ -1152,7 +1365,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
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return -EINVAL;
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}
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port->irq = irq_of_parse_and_map(op->node, 0);
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psc_ops->get_irq(port, op->node);
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if (port->irq == NO_IRQ) {
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dev_dbg(&op->dev, "Could not get irq\n");
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return -EINVAL;
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@ -1163,10 +1376,8 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
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/* Add the port to the uart sub-system */
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ret = uart_add_one_port(&mpc52xx_uart_driver, port);
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if (ret) {
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irq_dispose_mapping(port->irq);
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if (ret)
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return ret;
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}
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dev_set_drvdata(&op->dev, (void *)port);
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return 0;
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@ -1178,10 +1389,8 @@ mpc52xx_uart_of_remove(struct of_device *op)
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struct uart_port *port = dev_get_drvdata(&op->dev);
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dev_set_drvdata(&op->dev, NULL);
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if (port) {
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if (port)
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uart_remove_one_port(&mpc52xx_uart_driver, port);
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irq_dispose_mapping(port->irq);
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}
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return 0;
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}
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@ -1288,6 +1497,15 @@ mpc52xx_uart_init(void)
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mpc52xx_uart_of_enumerate();
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/*
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* Map the PSC FIFO Controller and init if on MPC512x.
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*/
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if (psc_ops->fifoc_init) {
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ret = psc_ops->fifoc_init();
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if (ret)
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return ret;
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}
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ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
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if (ret) {
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printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
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@ -1302,6 +1520,9 @@ mpc52xx_uart_init(void)
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static void __exit
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mpc52xx_uart_exit(void)
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{
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if (psc_ops->fifoc_uninit)
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psc_ops->fifoc_uninit();
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of_unregister_platform_driver(&mpc52xx_uart_of_driver);
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uart_unregister_driver(&mpc52xx_uart_driver);
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}
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