EDAC/amd64: Fix intlv_num_chan for Hygon family 18h model 4h

Make the modification in commit 0ac06d63 to intlv_num_chan only
for Hygon family 18h model 4h.

Fixes: 0ac06d63
 ("EDAC/amd64: Adjust address translation for Hygon family 18h model 4h")

Signed-off-by: fuhao <fuh@hygon.cn>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: Bin Lai <robinlai@tencent.com>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: caelli <caelli@tencent.com>
Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
This commit is contained in:
fuhao 2024-02-01 15:18:12 +08:00 committed by Jianping Liu
parent f687e8b76a
commit 6aaeaee473
1 changed files with 4 additions and 4 deletions

View File

@ -771,10 +771,6 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
switch (intlv_num_chan) {
case 0: intlv_num_chan = 0; break;
case 1: intlv_num_chan = 1; break;
case 2:
if (hygon_f18h_m4h())
intlv_num_chan = 2;
break;
case 3: intlv_num_chan = 2; break;
case 5: intlv_num_chan = 3; break;
case 7: intlv_num_chan = 4; break;
@ -783,6 +779,10 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
hash_enabled = true;
break;
default:
if (hygon_f18h_m4h() && boot_cpu_data.x86_model == 0x4 &&
intlv_num_chan == 2)
break;
pr_err("%s: Invalid number of interleaved channels %d.\n",
__func__, intlv_num_chan);
goto out_err;