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staging: rtl8723bs: hal: Fix codespell-reported spelling mistakes 

They are appear to be spelling mistakes,
Initially identified in a codespell report and never been addressed so far.

drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:656: regsiters ==> registers
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:1696: beacause ==> because
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:2092: Checl ==> Check
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:2513: checksume ==> checksum
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:2726: sequense ==> sequence
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:2780: vlaue ==> value
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c:3409: equall ==> equal, equally

Signed-off-by: Anup Sharma <anupnewsmail@gmail.com>
Link: https://lore.kernel.org/r/Y61y+flJp9/jEicc@local
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Anup Sharma 2022-12-29 16:29:05 +05:30 committed by Greg Kroah-Hartman
parent 77ca694b2c
commit 6aad66cdb0
1 changed files with 7 additions and 7 deletions
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14
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
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@ -653,7 +653,7 @@ static void Hal_EfusePowerSwitch(
if (PwrState) {
/* To avoid cannot access efuse regsiters after disable/enable several times during DTM test. */
/* To avoid cannot access efuse registers after disable/enable several times during DTM test. */
/* Suggested by SD1 IsaacHsu. 2013.07.08, added by tynli. */
tempval = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL);
if (tempval & BIT(0)) { /* SDIO local register is suspend */
@ -1693,7 +1693,7 @@ void rtl8723b_InitBeaconParameters(struct adapter *padapter)
rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8723B); /* 2ms */
/* Suggested by designer timchen. Change beacon AIFS to the largest number */
/* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
/* because test chip does not contension before sending beacon. by tynli. 2009.11.03 */
rtw_write16(padapter, REG_BCNTCFG, 0x660F);
pHalData->RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL);
@ -2089,7 +2089,7 @@ void Hal_EfuseParseIDCode(struct adapter *padapter, u8 *hwinfo)
u16 EEPROMId;
/* Checl 0x8129 again for making sure autoload status!! */
/* Check 0x8129 again for making sure autoload status!! */
EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
if (EEPROMId != RTL_EEPROM_ID) {
pEEPROM->bautoload_fail_flag = true;
@ -2510,7 +2510,7 @@ static void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc)
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
/* checksume is always calculated by first 32 bytes, */
/* checksum is always calculated by first 32 bytes, */
/* and it doesn't depend on TX DESC length. */
/* Thomas, Lucas@SD4, 20130515 */
count = 16;
@ -2723,7 +2723,7 @@ static void rtl8723b_fill_default_txdesc(
* multicast / mgnt frame should be controlled by Hw because Fw
* will also send null data which we cannot control when Fw LPS
* enable.
* --> default enable non-Qos data sequense number. 2010.06.23.
* --> default enable non-Qos data sequence number. 2010.06.23.
* by tynli.
* (2) Enable HW SEQ control for beacon packet, because we use
* Hw beacon.
@ -2777,7 +2777,7 @@ void rtl8723b_fill_fake_txdesc(
SET_TX_DESC_PKT_SIZE_8723B(pDesc, BufferLen); /* Buffer size + command header */
SET_TX_DESC_QUEUE_SEL_8723B(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error value by Hw. */
if (IsPsPoll) {
SET_TX_DESC_NAV_USE_HDR_8723B(pDesc, 1);
} else {
@ -3406,7 +3406,7 @@ void SetHwReg8723B(struct adapter *padapter, u8 variable, u8 *val)
/* polling bit, and No Write enable, and address */
ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE;
/* write content 0 is equall to mark invalid */
/* write content 0 is equal to mark as invalid */
rtw_write32(padapter, WCAMI, ulContent); /* mdelay(40); */
rtw_write32(padapter, RWCAM, ulCommand); /* mdelay(40); */
}