drm/i915/display/crt: Make WARN* drm specific where drm_priv ptr is available
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_i915_private struct pointer is readily available. The conversion was done automatically with below coccinelle semantic patch. @rule1@ identifier func, T; @@ func(...) { ... struct drm_i915_private *T = ...; <+... ( -WARN( +drm_WARN(&T->drm, ...) | -WARN_ON( +drm_WARN_ON(&T->drm, ...) | -WARN_ONCE( +drm_WARN_ONCE(&T->drm, ...) | -WARN_ON_ONCE( +drm_WARN_ON_ONCE(&T->drm, ...) ) ...+> } @rule2@ identifier func, T; @@ func(struct drm_i915_private *T,...) { <+... ( -WARN( +drm_WARN(&T->drm, ...) | -WARN_ON( +drm_WARN_ON(&T->drm, ...) | -WARN_ONCE( +drm_WARN_ONCE(&T->drm, ...) | -WARN_ON_ONCE( +drm_WARN_ON_ONCE(&T->drm, ...) ) ...+> } Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200128181603.27767-5-pankaj.laxminarayan.bharadiya@intel.com
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@ -230,7 +230,7 @@ static void hsw_disable_crt(struct intel_encoder *encoder,
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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WARN_ON(!old_crtc_state->has_pch_encoder);
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drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder);
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intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
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}
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@ -258,7 +258,7 @@ static void hsw_post_disable_crt(struct intel_encoder *encoder,
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intel_ddi_fdi_post_disable(encoder, old_crtc_state, old_conn_state);
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WARN_ON(!old_crtc_state->has_pch_encoder);
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drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder);
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intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
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}
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@ -269,7 +269,7 @@ static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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WARN_ON(!crtc_state->has_pch_encoder);
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drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder);
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intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
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}
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@ -282,7 +282,7 @@ static void hsw_pre_enable_crt(struct intel_encoder *encoder,
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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enum pipe pipe = crtc->pipe;
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WARN_ON(!crtc_state->has_pch_encoder);
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drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder);
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intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
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@ -299,7 +299,7 @@ static void hsw_enable_crt(struct intel_encoder *encoder,
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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enum pipe pipe = crtc->pipe;
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WARN_ON(!crtc_state->has_pch_encoder);
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drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder);
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intel_enable_pipe(crtc_state);
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