mlx5-fixes-2021-08-09
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmER+RIACgkQSD+KveBX +j76rwf/TxdKKUEkwHp6w/NL0lSJ2NwUHtxWWeXmfI1bgyYQvF2ItbamkN0PrPYF YUUs3v/pOwNlpVng+CITbOkHQZaJxWuTkhyujkMr5zulaIYRMqZRFvk5m7zlcEzO srue5CA8B6j533LHhwfqJfVnFjhA4zEUzQn7+b/9HaOSFvkacdXTHR1YGuYOrfTY jgptzJfqS26xVo3S6k3wndkvu6SpJy0cpvF7iaAa7zXckUUN8/knyrBv4c6UPmEF vBq1TngqEoxbO420NvCVBfKrqw52MG6qtQRqoVWaFaKHZL02yZbzjAJK+MulYKwU CNm1t7Y31Q+kp5kcnIhrBokQgx79Gw== =1R3z -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2021-08-09' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5 fixes 2021-08-09 This series introduces fixes to mlx5 driver. Please pull and let me know if there is any problem. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
6a279f61e2
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@ -945,7 +945,6 @@ int mlx5_ib_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
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u32 *cqb = NULL;
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void *cqc;
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int cqe_size;
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unsigned int irqn;
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int eqn;
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int err;
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@ -984,7 +983,7 @@ int mlx5_ib_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
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INIT_WORK(&cq->notify_work, notify_soft_wc_handler);
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}
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err = mlx5_vector2eqn(dev->mdev, vector, &eqn, &irqn);
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err = mlx5_vector2eqn(dev->mdev, vector, &eqn);
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if (err)
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goto err_cqb;
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@ -1007,7 +1006,6 @@ int mlx5_ib_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
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goto err_cqb;
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mlx5_ib_dbg(dev, "cqn 0x%x\n", cq->mcq.cqn);
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cq->mcq.irqn = irqn;
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if (udata)
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cq->mcq.tasklet_ctx.comp = mlx5_ib_cq_comp;
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else
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@ -975,7 +975,6 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
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struct mlx5_ib_dev *dev;
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int user_vector;
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int dev_eqn;
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unsigned int irqn;
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int err;
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if (uverbs_copy_from(&user_vector, attrs,
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@ -987,7 +986,7 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
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return PTR_ERR(c);
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dev = to_mdev(c->ibucontext.device);
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err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
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err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn);
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if (err < 0)
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return err;
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@ -134,6 +134,7 @@ int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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cq->cqn);
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cq->uar = dev->priv.uar;
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cq->irqn = eq->core.irqn;
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return 0;
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@ -1019,12 +1019,19 @@ int mlx5_fw_tracer_init(struct mlx5_fw_tracer *tracer)
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MLX5_NB_INIT(&tracer->nb, fw_tracer_event, DEVICE_TRACER);
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mlx5_eq_notifier_register(dev, &tracer->nb);
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mlx5_fw_tracer_start(tracer);
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err = mlx5_fw_tracer_start(tracer);
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if (err) {
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mlx5_core_warn(dev, "FWTracer: Failed to start tracer %d\n", err);
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goto err_notifier_unregister;
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}
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return 0;
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err_notifier_unregister:
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mlx5_eq_notifier_unregister(dev, &tracer->nb);
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mlx5_core_destroy_mkey(dev, &tracer->buff.mkey);
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err_dealloc_pd:
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mlx5_core_dealloc_pd(dev, tracer->buff.pdn);
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cancel_work_sync(&tracer->read_fw_strings_work);
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return err;
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}
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@ -124,6 +124,11 @@ static int mlx5e_route_lookup_ipv4_get(struct mlx5e_priv *priv,
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if (IS_ERR(rt))
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return PTR_ERR(rt);
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if (rt->rt_type != RTN_UNICAST) {
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ret = -ENETUNREACH;
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goto err_rt_release;
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}
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if (mlx5_lag_is_multipath(mdev) && rt->rt_gw_family != AF_INET) {
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ret = -ENETUNREACH;
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goto err_rt_release;
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@ -1535,15 +1535,9 @@ static int mlx5e_alloc_cq_common(struct mlx5e_priv *priv,
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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struct mlx5_core_cq *mcq = &cq->mcq;
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int eqn_not_used;
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unsigned int irqn;
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int err;
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u32 i;
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err = mlx5_vector2eqn(mdev, param->eq_ix, &eqn_not_used, &irqn);
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if (err)
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return err;
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err = mlx5_cqwq_create(mdev, ¶m->wq, param->cqc, &cq->wq,
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&cq->wq_ctrl);
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if (err)
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@ -1557,7 +1551,6 @@ static int mlx5e_alloc_cq_common(struct mlx5e_priv *priv,
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mcq->vector = param->eq_ix;
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mcq->comp = mlx5e_completion_event;
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mcq->event = mlx5e_cq_error_event;
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mcq->irqn = irqn;
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for (i = 0; i < mlx5_cqwq_get_size(&cq->wq); i++) {
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struct mlx5_cqe64 *cqe = mlx5_cqwq_get_wqe(&cq->wq, i);
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@ -1605,11 +1598,10 @@ static int mlx5e_create_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param)
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void *in;
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void *cqc;
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int inlen;
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unsigned int irqn_not_used;
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int eqn;
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int err;
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err = mlx5_vector2eqn(mdev, param->eq_ix, &eqn, &irqn_not_used);
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err = mlx5_vector2eqn(mdev, param->eq_ix, &eqn);
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if (err)
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return err;
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@ -1891,30 +1883,30 @@ static int mlx5e_open_queues(struct mlx5e_channel *c,
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if (err)
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goto err_close_icosq;
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err = mlx5e_open_rxq_rq(c, params, &cparam->rq);
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if (err)
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goto err_close_sqs;
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if (c->xdp) {
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err = mlx5e_open_xdpsq(c, params, &cparam->xdp_sq, NULL,
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&c->rq_xdpsq, false);
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if (err)
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goto err_close_sqs;
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goto err_close_rq;
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}
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err = mlx5e_open_rxq_rq(c, params, &cparam->rq);
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if (err)
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goto err_close_xdp_sq;
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err = mlx5e_open_xdpsq(c, params, &cparam->xdp_sq, NULL, &c->xdpsq, true);
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if (err)
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goto err_close_rq;
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goto err_close_xdp_sq;
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return 0;
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err_close_rq:
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mlx5e_close_rq(&c->rq);
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err_close_xdp_sq:
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if (c->xdp)
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mlx5e_close_xdpsq(&c->rq_xdpsq);
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err_close_rq:
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mlx5e_close_rq(&c->rq);
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err_close_sqs:
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mlx5e_close_sqs(c);
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@ -1949,9 +1941,9 @@ err_close_async_icosq_cq:
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static void mlx5e_close_queues(struct mlx5e_channel *c)
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{
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mlx5e_close_xdpsq(&c->xdpsq);
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mlx5e_close_rq(&c->rq);
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if (c->xdp)
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mlx5e_close_xdpsq(&c->rq_xdpsq);
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mlx5e_close_rq(&c->rq);
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mlx5e_close_sqs(c);
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mlx5e_close_icosq(&c->icosq);
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mlx5e_close_icosq(&c->async_icosq);
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@ -1983,9 +1975,8 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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struct mlx5e_channel *c;
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unsigned int irq;
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int err;
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int eqn;
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err = mlx5_vector2eqn(priv->mdev, ix, &eqn, &irq);
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err = mlx5_vector2irqn(priv->mdev, ix, &irq);
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if (err)
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return err;
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@ -855,8 +855,8 @@ clean:
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return err;
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}
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int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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unsigned int *irqn)
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static int vector2eqnirqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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unsigned int *irqn)
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{
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struct mlx5_eq_table *table = dev->priv.eq_table;
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struct mlx5_eq_comp *eq, *n;
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@ -865,8 +865,10 @@ int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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if (i++ == vector) {
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*eqn = eq->core.eqn;
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*irqn = eq->core.irqn;
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if (irqn)
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*irqn = eq->core.irqn;
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if (eqn)
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*eqn = eq->core.eqn;
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err = 0;
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break;
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}
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@ -874,8 +876,18 @@ int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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return err;
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}
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int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn)
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{
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return vector2eqnirqn(dev, vector, eqn, NULL);
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}
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EXPORT_SYMBOL(mlx5_vector2eqn);
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int mlx5_vector2irqn(struct mlx5_core_dev *dev, int vector, unsigned int *irqn)
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{
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return vector2eqnirqn(dev, vector, NULL, irqn);
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}
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unsigned int mlx5_comp_vectors_count(struct mlx5_core_dev *dev)
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{
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return dev->priv.eq_table->num_comp_eqs;
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@ -579,7 +579,7 @@ static struct mlx5_esw_bridge *mlx5_esw_bridge_create(int ifindex,
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xa_init(&bridge->vports);
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bridge->ifindex = ifindex;
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bridge->refcnt = 1;
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bridge->ageing_time = BR_DEFAULT_AGEING_TIME;
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bridge->ageing_time = clock_t_to_jiffies(BR_DEFAULT_AGEING_TIME);
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list_add(&bridge->list, &br_offloads->bridges);
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return bridge;
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@ -1006,7 +1006,7 @@ int mlx5_esw_bridge_ageing_time_set(unsigned long ageing_time, struct mlx5_eswit
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if (!vport->bridge)
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return -EINVAL;
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vport->bridge->ageing_time = ageing_time;
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vport->bridge->ageing_time = clock_t_to_jiffies(ageing_time);
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return 0;
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}
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@ -501,6 +501,7 @@ err_sampler:
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err_offload_rule:
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mlx5_esw_vporttbl_put(esw, &per_vport_tbl_attr);
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err_default_tbl:
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kfree(sample_flow);
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return ERR_PTR(err);
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}
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@ -48,6 +48,7 @@
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#include "lib/fs_chains.h"
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#include "en_tc.h"
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#include "en/mapping.h"
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#include "devlink.h"
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#define mlx5_esw_for_each_rep(esw, i, rep) \
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xa_for_each(&((esw)->offloads.vport_reps), i, rep)
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@ -3001,12 +3002,19 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
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if (cur_mlx5_mode == mlx5_mode)
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goto unlock;
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if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV)
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if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV) {
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if (mlx5_devlink_trap_get_num_active(esw->dev)) {
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NL_SET_ERR_MSG_MOD(extack,
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"Can't change mode while devlink traps are active");
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err = -EOPNOTSUPP;
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goto unlock;
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}
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err = esw_offloads_start(esw, extack);
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else if (mode == DEVLINK_ESWITCH_MODE_LEGACY)
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} else if (mode == DEVLINK_ESWITCH_MODE_LEGACY) {
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err = esw_offloads_stop(esw, extack);
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else
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} else {
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err = -EINVAL;
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}
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unlock:
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mlx5_esw_unlock(esw);
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|
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@ -417,7 +417,6 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size)
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struct mlx5_wq_param wqp;
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struct mlx5_cqe64 *cqe;
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int inlen, err, eqn;
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unsigned int irqn;
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void *cqc, *in;
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__be64 *pas;
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u32 i;
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@ -446,7 +445,7 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size)
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goto err_cqwq;
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}
|
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|
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err = mlx5_vector2eqn(mdev, smp_processor_id(), &eqn, &irqn);
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err = mlx5_vector2eqn(mdev, smp_processor_id(), &eqn);
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if (err) {
|
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kvfree(in);
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goto err_cqwq;
|
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|
@ -476,7 +475,6 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size)
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*conn->cq.mcq.arm_db = 0;
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conn->cq.mcq.vector = 0;
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conn->cq.mcq.comp = mlx5_fpga_conn_cq_complete;
|
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conn->cq.mcq.irqn = irqn;
|
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conn->cq.mcq.uar = fdev->conn_res.uar;
|
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tasklet_setup(&conn->cq.tasklet, mlx5_fpga_conn_cq_tasklet);
|
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|
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|
|
|
@ -104,4 +104,6 @@ void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
|
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struct cpu_rmap *mlx5_eq_table_get_rmap(struct mlx5_core_dev *dev);
|
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#endif
|
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|
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int mlx5_vector2irqn(struct mlx5_core_dev *dev, int vector, unsigned int *irqn);
|
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|
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#endif
|
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|
|
|
@ -1784,16 +1784,14 @@ static int __init init(void)
|
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if (err)
|
||||
goto err_sf;
|
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|
||||
#ifdef CONFIG_MLX5_CORE_EN
|
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err = mlx5e_init();
|
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if (err) {
|
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pci_unregister_driver(&mlx5_core_driver);
|
||||
goto err_debug;
|
||||
}
|
||||
#endif
|
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if (err)
|
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goto err_en;
|
||||
|
||||
return 0;
|
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|
||||
err_en:
|
||||
mlx5_sf_driver_unregister();
|
||||
err_sf:
|
||||
pci_unregister_driver(&mlx5_core_driver);
|
||||
err_debug:
|
||||
|
@ -1803,9 +1801,7 @@ err_debug:
|
|||
|
||||
static void __exit cleanup(void)
|
||||
{
|
||||
#ifdef CONFIG_MLX5_CORE_EN
|
||||
mlx5e_cleanup();
|
||||
#endif
|
||||
mlx5_sf_driver_unregister();
|
||||
pci_unregister_driver(&mlx5_core_driver);
|
||||
mlx5_unregister_debugfs();
|
||||
|
|
|
@ -206,8 +206,13 @@ int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw,
|
|||
int mlx5_fw_version_query(struct mlx5_core_dev *dev,
|
||||
u32 *running_ver, u32 *stored_ver);
|
||||
|
||||
#ifdef CONFIG_MLX5_CORE_EN
|
||||
int mlx5e_init(void);
|
||||
void mlx5e_cleanup(void);
|
||||
#else
|
||||
static inline int mlx5e_init(void){ return 0; }
|
||||
static inline void mlx5e_cleanup(void){}
|
||||
#endif
|
||||
|
||||
static inline bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev)
|
||||
{
|
||||
|
|
|
@ -214,6 +214,7 @@ static struct mlx5_irq *irq_request(struct mlx5_irq_pool *pool, int i)
|
|||
err = -ENOMEM;
|
||||
goto err_cpumask;
|
||||
}
|
||||
irq->pool = pool;
|
||||
kref_init(&irq->kref);
|
||||
irq->index = i;
|
||||
err = xa_err(xa_store(&pool->irqs, irq->index, irq, GFP_KERNEL));
|
||||
|
@ -222,7 +223,6 @@ static struct mlx5_irq *irq_request(struct mlx5_irq_pool *pool, int i)
|
|||
irq->index, err);
|
||||
goto err_xa;
|
||||
}
|
||||
irq->pool = pool;
|
||||
return irq;
|
||||
err_xa:
|
||||
free_cpumask_var(irq->mask);
|
||||
|
@ -251,8 +251,11 @@ int mlx5_irq_attach_nb(struct mlx5_irq *irq, struct notifier_block *nb)
|
|||
|
||||
int mlx5_irq_detach_nb(struct mlx5_irq *irq, struct notifier_block *nb)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
err = atomic_notifier_chain_unregister(&irq->nh, nb);
|
||||
irq_put(irq);
|
||||
return atomic_notifier_chain_unregister(&irq->nh, nb);
|
||||
return err;
|
||||
}
|
||||
|
||||
struct cpumask *mlx5_irq_get_affinity_mask(struct mlx5_irq *irq)
|
||||
|
@ -437,6 +440,7 @@ irq_pool_alloc(struct mlx5_core_dev *dev, int start, int size, char *name,
|
|||
if (!pool)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
pool->dev = dev;
|
||||
mutex_init(&pool->lock);
|
||||
xa_init_flags(&pool->irqs, XA_FLAGS_ALLOC);
|
||||
pool->xa_num_irqs.min = start;
|
||||
pool->xa_num_irqs.max = start + size - 1;
|
||||
|
@ -445,7 +449,6 @@ irq_pool_alloc(struct mlx5_core_dev *dev, int start, int size, char *name,
|
|||
name);
|
||||
pool->min_threshold = min_threshold * MLX5_EQ_REFS_PER_IRQ;
|
||||
pool->max_threshold = max_threshold * MLX5_EQ_REFS_PER_IRQ;
|
||||
mutex_init(&pool->lock);
|
||||
mlx5_core_dbg(dev, "pool->name = %s, pool->size = %d, pool->start = %d",
|
||||
name, size, start);
|
||||
return pool;
|
||||
|
@ -459,6 +462,7 @@ static void irq_pool_free(struct mlx5_irq_pool *pool)
|
|||
xa_for_each(&pool->irqs, index, irq)
|
||||
irq_release(&irq->kref);
|
||||
xa_destroy(&pool->irqs);
|
||||
mutex_destroy(&pool->lock);
|
||||
kvfree(pool);
|
||||
}
|
||||
|
||||
|
|
|
@ -749,7 +749,6 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,
|
|||
struct mlx5_cqe64 *cqe;
|
||||
struct mlx5dr_cq *cq;
|
||||
int inlen, err, eqn;
|
||||
unsigned int irqn;
|
||||
void *cqc, *in;
|
||||
__be64 *pas;
|
||||
int vector;
|
||||
|
@ -782,7 +781,7 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,
|
|||
goto err_cqwq;
|
||||
|
||||
vector = raw_smp_processor_id() % mlx5_comp_vectors_count(mdev);
|
||||
err = mlx5_vector2eqn(mdev, vector, &eqn, &irqn);
|
||||
err = mlx5_vector2eqn(mdev, vector, &eqn);
|
||||
if (err) {
|
||||
kvfree(in);
|
||||
goto err_cqwq;
|
||||
|
@ -818,7 +817,6 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,
|
|||
*cq->mcq.arm_db = cpu_to_be32(2 << 28);
|
||||
|
||||
cq->mcq.vector = 0;
|
||||
cq->mcq.irqn = irqn;
|
||||
cq->mcq.uar = uar;
|
||||
|
||||
return cq;
|
||||
|
|
|
@ -352,6 +352,7 @@ static void dr_ste_v0_set_rx_decap(u8 *hw_ste_p)
|
|||
{
|
||||
MLX5_SET(ste_rx_steering_mult, hw_ste_p, tunneling_action,
|
||||
DR_STE_TUNL_ACTION_DECAP);
|
||||
MLX5_SET(ste_rx_steering_mult, hw_ste_p, fail_on_error, 1);
|
||||
}
|
||||
|
||||
static void dr_ste_v0_set_rx_pop_vlan(u8 *hw_ste_p)
|
||||
|
@ -365,6 +366,7 @@ static void dr_ste_v0_set_rx_decap_l3(u8 *hw_ste_p, bool vlan)
|
|||
MLX5_SET(ste_rx_steering_mult, hw_ste_p, tunneling_action,
|
||||
DR_STE_TUNL_ACTION_L3_DECAP);
|
||||
MLX5_SET(ste_modify_packet, hw_ste_p, action_description, vlan ? 1 : 0);
|
||||
MLX5_SET(ste_rx_steering_mult, hw_ste_p, fail_on_error, 1);
|
||||
}
|
||||
|
||||
static void dr_ste_v0_set_rewrite_actions(u8 *hw_ste_p, u16 num_of_actions,
|
||||
|
|
|
@ -526,7 +526,6 @@ static int cq_create(struct mlx5_vdpa_net *ndev, u16 idx, u32 num_ent)
|
|||
void __iomem *uar_page = ndev->mvdev.res.uar->map;
|
||||
u32 out[MLX5_ST_SZ_DW(create_cq_out)];
|
||||
struct mlx5_vdpa_cq *vcq = &mvq->cq;
|
||||
unsigned int irqn;
|
||||
__be64 *pas;
|
||||
int inlen;
|
||||
void *cqc;
|
||||
|
@ -566,7 +565,7 @@ static int cq_create(struct mlx5_vdpa_net *ndev, u16 idx, u32 num_ent)
|
|||
/* Use vector 0 by default. Consider adding code to choose least used
|
||||
* vector.
|
||||
*/
|
||||
err = mlx5_vector2eqn(mdev, 0, &eqn, &irqn);
|
||||
err = mlx5_vector2eqn(mdev, 0, &eqn);
|
||||
if (err)
|
||||
goto err_vec;
|
||||
|
||||
|
|
|
@ -1044,8 +1044,7 @@ void mlx5_unregister_debugfs(void);
|
|||
void mlx5_fill_page_array(struct mlx5_frag_buf *buf, __be64 *pas);
|
||||
void mlx5_fill_page_frag_array_perm(struct mlx5_frag_buf *buf, __be64 *pas, u8 perm);
|
||||
void mlx5_fill_page_frag_array(struct mlx5_frag_buf *frag_buf, __be64 *pas);
|
||||
int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
|
||||
unsigned int *irqn);
|
||||
int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn);
|
||||
int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
|
||||
int mlx5_core_detach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
|
||||
|
||||
|
|
Loading…
Reference in New Issue