ASoC: wm8955: replace codec to component
Now we can replace Codec to Component. Let's do it. Note: xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 0 -> .idle_bias_on = 1 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
7928b2cbe5
commit
69b626e682
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@ -128,9 +128,9 @@ static bool wm8955_volatile(struct device *dev, unsigned int reg)
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}
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}
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static int wm8955_reset(struct snd_soc_codec *codec)
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static int wm8955_reset(struct snd_soc_component *component)
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{
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return snd_soc_write(codec, WM8955_RESET, 0);
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return snd_soc_component_write(component, WM8955_RESET, 0);
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}
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struct pll_factors {
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@ -242,9 +242,9 @@ static struct {
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{ 11289600, 88200, 0, 31, },
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};
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static int wm8955_configure_clocking(struct snd_soc_codec *codec)
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static int wm8955_configure_clocking(struct snd_soc_component *component)
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{
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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int i, ret, val;
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int clocking = 0;
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int srate = 0;
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@ -267,7 +267,7 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
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/* We should never get here with an unsupported sample rate */
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if (sr == -1) {
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dev_err(codec->dev, "Sample rate %dHz unsupported\n",
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dev_err(component->dev, "Sample rate %dHz unsupported\n",
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wm8955->fs);
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WARN_ON(sr == -1);
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return -EINVAL;
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@ -282,30 +282,30 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
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/* Use the last divider configuration we saw for the
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* sample rate. */
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ret = wm8995_pll_factors(codec->dev, wm8955->mclk_rate,
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ret = wm8995_pll_factors(component->dev, wm8955->mclk_rate,
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clock_cfgs[sr].mclk, &pll);
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if (ret != 0) {
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dev_err(codec->dev,
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dev_err(component->dev,
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"Unable to generate %dHz from %dHz MCLK\n",
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wm8955->fs, wm8955->mclk_rate);
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return -EINVAL;
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}
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snd_soc_update_bits(codec, WM8955_PLL_CONTROL_1,
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snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_1,
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WM8955_N_MASK | WM8955_K_21_18_MASK,
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(pll.n << WM8955_N_SHIFT) |
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pll.k >> 18);
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snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
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snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_2,
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WM8955_K_17_9_MASK,
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(pll.k >> 9) & WM8955_K_17_9_MASK);
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snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3,
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snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_3,
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WM8955_K_8_0_MASK,
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pll.k & WM8955_K_8_0_MASK);
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if (pll.k)
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snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
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snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
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WM8955_KEN, WM8955_KEN);
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else
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snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
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snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
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WM8955_KEN, 0);
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if (pll.outdiv)
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@ -314,17 +314,17 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
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val = WM8955_PLL_RB;
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/* Now start the PLL running */
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snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
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snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
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WM8955_PLL_RB | WM8955_PLLOUTDIV2, val);
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snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
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snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
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WM8955_PLLEN, WM8955_PLLEN);
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}
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srate = clock_cfgs[sr].usb | (clock_cfgs[sr].sr << WM8955_SR_SHIFT);
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snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
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snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
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WM8955_USB | WM8955_SR_MASK, srate);
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snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
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snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
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WM8955_MCLKSEL, clocking);
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return 0;
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@ -333,22 +333,22 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
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static int wm8955_sysclk(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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int ret = 0;
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/* Always disable the clocks - if we're doing reconfiguration this
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* avoids misclocking.
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*/
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_DIGENB, 0);
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snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
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snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
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WM8955_PLL_RB | WM8955_PLLEN, 0);
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switch (event) {
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case SND_SOC_DAPM_POST_PMD:
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break;
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case SND_SOC_DAPM_PRE_PMU:
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ret = wm8955_configure_clocking(codec);
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ret = wm8955_configure_clocking(component);
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break;
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default:
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ret = -EINVAL;
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@ -360,9 +360,9 @@ static int wm8955_sysclk(struct snd_soc_dapm_widget *w,
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static int deemph_settings[] = { 0, 32000, 44100, 48000 };
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static int wm8955_set_deemph(struct snd_soc_codec *codec)
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static int wm8955_set_deemph(struct snd_soc_component *component)
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{
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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int val, i, best;
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/* If we're using deemphasis select the nearest available sample
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@ -381,17 +381,17 @@ static int wm8955_set_deemph(struct snd_soc_codec *codec)
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val = 0;
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}
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dev_dbg(codec->dev, "Set deemphasis %d\n", val);
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dev_dbg(component->dev, "Set deemphasis %d\n", val);
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return snd_soc_update_bits(codec, WM8955_DAC_CONTROL,
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return snd_soc_component_update_bits(component, WM8955_DAC_CONTROL,
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WM8955_DEEMPH_MASK, val);
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}
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static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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ucontrol->value.integer.value[0] = wm8955->deemph;
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return 0;
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@ -400,8 +400,8 @@ static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
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static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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unsigned int deemph = ucontrol->value.integer.value[0];
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if (deemph > 1)
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@ -409,7 +409,7 @@ static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
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wm8955->deemph = deemph;
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return wm8955_set_deemph(codec);
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return wm8955_set_deemph(component);
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}
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static const char *bass_mode_text[] = {
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@ -592,8 +592,8 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct snd_soc_component *component = dai->component;
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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int ret;
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int wl;
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@ -613,25 +613,25 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
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snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
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WM8955_WL_MASK, wl);
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wm8955->fs = params_rate(params);
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wm8955_set_deemph(codec);
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wm8955_set_deemph(component);
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/* If the chip is clocked then disable the clocks and force a
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* reconfiguration, otherwise DAPM will power up the
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* clocks for us later. */
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ret = snd_soc_read(codec, WM8955_POWER_MANAGEMENT_1);
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ret = snd_soc_component_read32(component, WM8955_POWER_MANAGEMENT_1);
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if (ret < 0)
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return ret;
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if (ret & WM8955_DIGENB) {
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_DIGENB, 0);
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snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
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snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
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WM8955_PLL_RB | WM8955_PLLEN, 0);
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wm8955_configure_clocking(codec);
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wm8955_configure_clocking(component);
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}
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return 0;
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@ -641,8 +641,8 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
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static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct wm8955_priv *priv = snd_soc_codec_get_drvdata(codec);
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struct snd_soc_component *component = dai->component;
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struct wm8955_priv *priv = snd_soc_component_get_drvdata(component);
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int div;
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switch (clk_id) {
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div = 0;
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}
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snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
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snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
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WM8955_MCLKDIV2, div);
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break;
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@ -670,7 +670,7 @@ static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct snd_soc_component *component = dai->component;
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u16 aif = 0;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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@ -739,7 +739,7 @@ static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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return -EINVAL;
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}
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snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
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snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
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WM8955_MS | WM8955_FORMAT_MASK | WM8955_BCLKINV |
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WM8955_LRP, aif);
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@ -749,7 +749,7 @@ static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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static int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct snd_soc_component *component = codec_dai->component;
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int val;
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if (mute)
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@ -757,15 +757,15 @@ static int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
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else
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val = 0;
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snd_soc_update_bits(codec, WM8955_DAC_CONTROL, WM8955_DACMU, val);
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snd_soc_component_update_bits(component, WM8955_DAC_CONTROL, WM8955_DACMU, val);
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return 0;
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}
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static int wm8955_set_bias_level(struct snd_soc_codec *codec,
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static int wm8955_set_bias_level(struct snd_soc_component *component,
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enum snd_soc_bias_level level)
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{
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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int ret;
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switch (level) {
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@ -774,22 +774,22 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_PREPARE:
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/* VMID resistance 2*50k */
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_VMIDSEL_MASK,
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0x1 << WM8955_VMIDSEL_SHIFT);
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/* Default bias current */
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snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
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snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
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WM8955_VSEL_MASK,
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0x2 << WM8955_VSEL_SHIFT);
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break;
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case SND_SOC_BIAS_STANDBY:
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if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
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if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
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ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
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wm8955->supplies);
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if (ret != 0) {
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dev_err(codec->dev,
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dev_err(component->dev,
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"Failed to enable supplies: %d\n",
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ret);
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return ret;
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@ -798,7 +798,7 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
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regcache_sync(wm8955->regmap);
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/* Enable VREF and VMID */
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_VREF |
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WM8955_VMIDSEL_MASK,
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WM8955_VREF |
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@ -808,29 +808,29 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
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msleep(500);
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/* High resistance VROI to maintain outputs */
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snd_soc_update_bits(codec,
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snd_soc_component_update_bits(component,
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WM8955_ADDITIONAL_CONTROL_3,
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WM8955_VROI, WM8955_VROI);
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}
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/* Maintain VMID with 2*250k */
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_VMIDSEL_MASK,
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0x2 << WM8955_VMIDSEL_SHIFT);
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/* Minimum bias current */
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snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
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snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
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WM8955_VSEL_MASK, 0);
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break;
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case SND_SOC_BIAS_OFF:
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/* Low resistance VROI to help discharge */
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snd_soc_update_bits(codec,
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snd_soc_component_update_bits(component,
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WM8955_ADDITIONAL_CONTROL_3,
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WM8955_VROI, 0);
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/* Turn off VMID and VREF */
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snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
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WM8955_VREF |
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WM8955_VMIDSEL_MASK, 0);
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@ -865,70 +865,70 @@ static struct snd_soc_dai_driver wm8955_dai = {
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.ops = &wm8955_dai_ops,
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};
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static int wm8955_probe(struct snd_soc_codec *codec)
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static int wm8955_probe(struct snd_soc_component *component)
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{
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struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
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struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
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struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
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struct wm8955_pdata *pdata = dev_get_platdata(component->dev);
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int ret, i;
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for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++)
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wm8955->supplies[i].supply = wm8955_supply_names[i];
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ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8955->supplies),
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ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(wm8955->supplies),
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wm8955->supplies);
|
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if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
|
||||
wm8955->supplies);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8955_reset(codec);
|
||||
ret = wm8955_reset(component);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to issue reset: %d\n", ret);
|
||||
goto err_enable;
|
||||
}
|
||||
|
||||
/* Change some default settings - latch VU and enable ZC */
|
||||
snd_soc_update_bits(codec, WM8955_LEFT_DAC_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LEFT_DAC_VOLUME,
|
||||
WM8955_LDVU, WM8955_LDVU);
|
||||
snd_soc_update_bits(codec, WM8955_RIGHT_DAC_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_RIGHT_DAC_VOLUME,
|
||||
WM8955_RDVU, WM8955_RDVU);
|
||||
snd_soc_update_bits(codec, WM8955_LOUT1_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LOUT1_VOLUME,
|
||||
WM8955_LO1VU | WM8955_LO1ZC,
|
||||
WM8955_LO1VU | WM8955_LO1ZC);
|
||||
snd_soc_update_bits(codec, WM8955_ROUT1_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_ROUT1_VOLUME,
|
||||
WM8955_RO1VU | WM8955_RO1ZC,
|
||||
WM8955_RO1VU | WM8955_RO1ZC);
|
||||
snd_soc_update_bits(codec, WM8955_LOUT2_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LOUT2_VOLUME,
|
||||
WM8955_LO2VU | WM8955_LO2ZC,
|
||||
WM8955_LO2VU | WM8955_LO2ZC);
|
||||
snd_soc_update_bits(codec, WM8955_ROUT2_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_ROUT2_VOLUME,
|
||||
WM8955_RO2VU | WM8955_RO2ZC,
|
||||
WM8955_RO2VU | WM8955_RO2ZC);
|
||||
snd_soc_update_bits(codec, WM8955_MONOOUT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_MONOOUT_VOLUME,
|
||||
WM8955_MOZC, WM8955_MOZC);
|
||||
|
||||
/* Also enable adaptive bass boost by default */
|
||||
snd_soc_update_bits(codec, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
|
||||
snd_soc_component_update_bits(component, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
|
||||
|
||||
/* Set platform data values */
|
||||
if (pdata) {
|
||||
if (pdata->out2_speaker)
|
||||
snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_2,
|
||||
snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_2,
|
||||
WM8955_ROUT2INV, WM8955_ROUT2INV);
|
||||
|
||||
if (pdata->monoin_diff)
|
||||
snd_soc_update_bits(codec, WM8955_MONO_OUT_MIX_1,
|
||||
snd_soc_component_update_bits(component, WM8955_MONO_OUT_MIX_1,
|
||||
WM8955_DMEN, WM8955_DMEN);
|
||||
}
|
||||
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
/* Bias level configuration will have done an extra enable */
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
|
||||
|
@ -940,19 +940,20 @@ err_enable:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8955 = {
|
||||
.probe = wm8955_probe,
|
||||
.set_bias_level = wm8955_set_bias_level,
|
||||
.suspend_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8955_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8955_snd_controls),
|
||||
.dapm_widgets = wm8955_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
|
||||
.dapm_routes = wm8955_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8955 = {
|
||||
.probe = wm8955_probe,
|
||||
.set_bias_level = wm8955_set_bias_level,
|
||||
.controls = wm8955_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8955_snd_controls),
|
||||
.dapm_widgets = wm8955_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
|
||||
.dapm_routes = wm8955_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
|
||||
.suspend_bias_off = 1,
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8955_regmap = {
|
||||
|
@ -989,19 +990,12 @@ static int wm8955_i2c_probe(struct i2c_client *i2c,
|
|||
|
||||
i2c_set_clientdata(i2c, wm8955);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8955, &wm8955_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8955, &wm8955_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8955_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8955_i2c_id[] = {
|
||||
{ "wm8955", 0 },
|
||||
{ }
|
||||
|
@ -1013,7 +1007,6 @@ static struct i2c_driver wm8955_i2c_driver = {
|
|||
.name = "wm8955",
|
||||
},
|
||||
.probe = wm8955_i2c_probe,
|
||||
.remove = wm8955_i2c_remove,
|
||||
.id_table = wm8955_i2c_id,
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue